Burr-Brown MPC102 Wide-bandwidth differential 2 x 1 multiplexer Datasheet

®
MP
MPC102
C10
2
MPC
102
Wide-Bandwidth
DIFFERENTIAL 2 x 1 MULTIPLEXER
FEATURES
The MPC102 consists of four identical monolithic,
integrated, open-loop buffer amplifiers. Two buffer
outputs are each connected internally at the output.
The bipolar complementary buffers form a unidirectional transmission path and offer extremely high
output-to-input isolation. The MPC102 multiplexer
enables the user to connect one of two input signals to
the corresponding output. The output of the multiplexer is in a high-impedance state when no channel is
selected. When one channel is selected with a digital
“1” at the corresponding SEL input, the component
acts as a buffer with high input impedance and low
output impedance.
● BANDWIDTH: 210MHz (1.4Vp-p)
● LOW INTERCHANNEL CROSSTALK:
–68dB (30MHz, SO); –58dB (30MHz, DIP)
● LOW SWITCHING TRANSIENTS:
+6mV/–8mV
● LOW DIFFERENTIAL GAIN/PHASE
ERRORS: 0.02%, 0.02°
● LOW QUIESCENT CURRENT:
One Channel Selected: ±4.6mA
No Channel Selected: ±250µA
The wide bandwidth of over 210MHz at 1.4Vp-p
signal level, high linearity and low distortion, and low
input voltage noise of 4nV/√Hz make this crosspoint
switch suitable for RF and video applications. All
performance is specified with ±5V supply voltage,
which reduces power consumption in comparison with
±15V designs. The multiplexer is available in a spacesaving SO-14 and DIP packages. Both are designed
and specified for operation over the industrial temperature range (–40°C to +85°C.)
APPLICATIONS
● VIDEO ROUTING AND MULTIPLEXING
(CROSSPOINTS)
● RADAR SYSTEMS
● DATA ACQUISITION
● DISC R/W TEST SYSTEMS
● xDSL TEST SYSTEMS
DESCRIPTION
IN1
The MPC102 is dual, wide-bandwidth, differential 2to-1 multiplexer, which can be used in a wide variety
of applications.
IN2
It was designed for wide-bandwidth systems, including high-definition television and broadcast equipment. Although it is primarily used to route video
signals, the harmonic and dynamic attributes of the
MPC102 also make it appropriate for other analog
signal routing applications such as radar, communications, computer graphics, and data acquisition systems.
+1
VOUT1
+1
IN3
+1
VOUT2
IN4
+1
SEL1 SEL2 SEL3 SEL4
TRUTH TABLE
SEL1
SEL2
SEL3
SEL4
VOUT1
0
0
0
0
HI-Z
VOUT2
HI-Z
1
0
0
0
IN1
HI-Z
0
1
0
0
IN2
HI-Z
0
0
1
0
HI-Z
IN3
0
0
0
1
HI-Z
IN4
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©
1993 Burr-Brown Corporation
PDS-1202E
Printed in U.S.A. January, 1995
SPECIFICATIONS
ELECTRICAL
At VCC = ±5V, RL = 10kΩ, RIN = 150Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted.
MPC102AP, AU
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
14
60
–74
–50
–50
±3
±30
mV
µV/°C
dB
dB
dB
mV
±10
VCC = ±4.5V to ±5.5V
VCC = +4.5V to +5.5V
VCC = –4.5V to –5.5V
4
20
±710
0.26
1.7
µA
nA/°C
nA/V
µA/V
µA/V
Channel On
Channel On
Channel Off
0.88
1.0
1.0
MΩ
pF
pF
fOUT = 20kHz to 10MHz
S/N = 0.7/(VIN • √5MHz)
4.0
98
nV/√Hz
dB
Gain Error ≤ 10%
±3.6
V
0.982
0.992
V/V
V/V
±2.98
11
900
1.5
V
Ω
MΩ
pF
DC CHARACTERISTICS
INPUT OFFSET VOLTAGE
Initial
vs Temperature
vs Supply (Tracking)
vs Supply (Non-tracking)
vs Supply (Non-tracking)
Initial Matching
INPUT BIAS CURRENT
Initial
vs Temperature
vs Supply (Tracking)
vs Supply (Non-tracking)
vs Supply (Non-tracking)
INPUT IMPEDANCE
Resistance
Capacitance
Capacitance
INPUT NOISE
Voltage Noise Density
Signal-to-Noise Ratio
INPUT VOLTAGE RANGE
RIN = 0, RSOURCE = 0
VCC = ±4.5V to ±5.5V
VCC = +4.5V to +5.5V
VCC = –4.5V to –5.5V
All Four Buffers
TRANSFER CHARACTERISTICS
Voltage Gain
Voltage Gain
RL = 1kΩ, VIN = ±2V
RL = 10kΩ, VIN = ±2.8V
RATED OUTPUT
Voltage
Resistance
Resistance
Capacitance
VIN = ±3V, RL = 10kΩ
One Channel Selected
No Channel Selected
No Channel Selected
CHANNEL SELECTION INPUTS
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
SWITCHING CHARACTERISTICS
SEL to Channel ON Time
SEL to Channel OFF Time
Switching Transient, Positive
Switching Transient, Negative
POWER SUPPLY
Rated Voltage
Derated Performance
Quiescent Current
–40
0.98
±2.8
+2
VSEL = 5.0V
VSEL = 0.8V
100
VIN = –0.3V to +0.7V, f = 5MHz
90% Point of VOUT = 1Vp-p
10% Point of VOUT = 1Vp-p
Measured While Switching
Between Two Grounded Channels
One Channel Selected
No Channel Selected
Rejection Ratio
±5
±4.6
±250
–80
–40
–40
±5.5
±5
±350
+85
+125
90
V
V
µA
µA
µs
µs
mV
mV
0.25
0.25
6
–8
±4.5
TEMPERATURE RANGE
Operating
Storage
Thermal Resistance, θJA
VCC
+0.8
150
5
V
V
mA
µA
dB
°C
°C
°C/W
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
MPC102
2
SPECIFICATIONS—AC CHARACTERISTICS (CONT)
At VCC = ±5V, RL = 10kΩ, RIN = 150Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted.
MPC102AP, AU
PARAMETER
CONDITIONS
LARGE SIGNAL BANDWIDTH (–3dB)
VOUT = 5.0Vp-p, COUT = 1pF
VOUT = 2.8Vp-p, COUT = 1pF
VOUT = 1.4Vp-p, COUT = 1pF
SMALL SIGNAL BANDWIDTH
VOUT = 0.2Vp-p, COUT = 1pF
MIN
GROUP DELAY TIME
TYP
MAX
UNITS
55
100
210
MHz
MHz
MHz
370
MHz
450
ps
DIFFERENTIAL GAIN
f = 4.43MHz, VIN = 0.3Vp-p
VDC = 0 to 0.7V
0.02
%
DIFFERENTIAL PHASE
f = 4.43MHz, VIN = 0.3Vp-p
VDC = 0 to 0.7V
0.02
Degrees
VOUT = 0.2Vp-p, DC to 30MHz
VOUT = 0.2Vp-p, DC to 100MHz
0.04
0.05
dB
dB
–64
–66
dBc
dBc
VIN = 1.4Vp-p
f = 5MHz,
f = 30MHz,
f = 5MHz,
f = 30MHz,
f = 5MHz,
f = 30MHz,
f = 5MHz,
f = 30MHz
–75
–58
–70
–71
–78
–68
–75
–76
dB
dB
dB
dB
dB
dB
dB
dB
VOUT = 1.4Vp-p, Step 10% to 90%
COUT = 1pF, ROUT = 22Ω
2.5
ns
VOUT = 1.4Vp-p
COUT = 1pF
COUT = 22pF
COUT = 47pF
500
360
260
V/µs
V/µs
V/µs
GAIN FLATNESS PEAKING
HARMONIC DISTORTION
Second Harmonic
Third Harmonic
CROSSTALK
MPC102AP Channel-to-Channel
Off Isolation
MPC102AU Channel-to-Channel
Off Isolation
f = 30MHz, VOUT = 1.4Vp-p, RL = 350Ω
TIME DOMAIN
RISE/FALL TIME
SLEW RATE
®
3
MPC102
CONNECTION DIAGRAM
PIN DESCRIPTION
Top View
PIN
DIP/SO-14
DESCRIPTION
IN1 , IN2
Analog Inputs Channel 1 and 2
IN3 , IN4
IN1
1
GND
2
IN2
3
+VCC
4
IN3
5
GND
6
IN4
7
+1
14 SEL1
+1
+1
VOUT1
12 VOUT1
Channel Selection Inputs
Analog Output 1
VOUT2
Analog Output 2
11 –VCC
–VCC
Negative Supply Voltage; typical –5VDC
10 VOUT2
+VCC
Positive Supply Voltage; typical +5VDC
9
SEL3
8
SEL4
ELECTROSTATIC
DISCHARGE SENSITIVITY
MPC102
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ABSOLUTE MAXIMUM RATINGS
Power Supply Voltage (±VCC) .............................................................. ±6V
Analog Input Voltage (IN1 through IN4) ................................... ±VCC, ±0.7V
Operating Temperature ..................................................... –40°C to +85°C
Storage Temperature ...................................................... –40°C to +125°C
Output Current .................................................................................. ±6mA
Junction Temperature .................................................................... +175°C
Lead Temperature (soldering, 10s) ................................................ +300°C
Digital Input Voltages (SEL1 through SEL4) .............. –0.5V to +VCC +0.7V
Logic Voltage Input ................................................... –0.6V to +VCC +0.6V
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
PACKAGE/ORDERING INFORMATION
PRODUCT
PACKAGE
PACKAGE
DRAWING
NUMBER(1)
MPC102AP
MPC102AU
14-Pin DIP
SO-14 Surface Mount
010
235
TEMPERATURE
RANGE
–40°C to +85°C
–40°C to +85°C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
®
MPC102
Analog Shielding Grounds, Connect to System Ground
SEL1, SEL2
13 SEL2
+1
Analog Inputs Channel 3 and 4
GND
4
TYPICAL PERFORMANCE CURVES
At VCC = ±5V, RLOAD = 10kΩ, RIN = 150Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted.
INPUT OFFSET VOLTAGE vs TEMPERATURE
INPUT BIAS CURRENT vs TEMPERATURE
18
6
16
Input Offset Voltage (mV)
5
Input Bias Current (µA)
14
12
10
8
6
4
4
3
2
1
2
0
–40
0
–40
–20
0
20
40
60
80
100
–20
0
Temperature (°C)
40
60
80
100
OUTPUT IMPEDANCE vs FREQUENCY
100
100k
30
Output Impedance (Ω)
Input Impedance (Ω)
INPUT IMPEDANCE vs FREQUENCY
1.0M
10k
1k
100
10
3
1
10k
100k
1M
10M
100M
1G
10k
100k
1M
Frequency (Hz)
10M
100M
1G
Frequency (Hz)
QUIESCENT CURRENT vs TEMPERATURE
QUIESCENT CURRENT vs TEMPERATURE
300
9
No Channel Selected
8
One Channel Selected
250
7
Supply Current (µA)
Supply Current (mA)
20
Temperature (°C)
6
5
4
3
200
150
100
2
50
1
0
–40
0
–20
0
20
40
60
80
100
–40
Temperature (°C)
–20
0
20
40
60
80
100
Temperature (°C)
®
5
MPC102
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5V, RLOAD = 10kΩ, RIN = 150Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted.
TRANSFER FUNCTION
INPUT VOLTAGE NOISE SPECTRAL DENSITY
100
5
4
Voltage Noise (nV/√Hz)
Output Voltage (V)
3
2
1
0
–1
–2
–3
–4
–5
10
1
0.1
–5
–4
–3
–2
–1
0
1
2
3
4
5
100
1k
10k
Input Voltage (V)
100k
1M
10M
100M
Frequency (Hz)
SWITCHING TRANSIENTS
(Channel-to-Channel)
SWITCHING ENVELOPE
(Channel-to-Channel Switching)
5V
15
0V SEL1
10
Output Voltage (mV)
Output Voltage (V)
20
+0.7V
0V
SEL1
Without Bandwidth
Limiting Lowpass Filter
tRISE = tFALL = 5ns
SEL2
5V
5V
5
0
–5
–10
–15
–0.7V
–20
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
0
2
20
40
60
80 100 120 140 160 180 200
Time (ns)
Time (µs)
SEL1
150Ω
VIN
DB1
VOUT1
150Ω
DB2
SEL2
SMALL SIGNAL PULSE RESPONSE
SWITCHING TRANSIENTS
(Channel-to-Channel)
150
20
100
5V
36MHz Low Pass Filter
Acc. Eureka Rec. EU95-PG03
in the Signal Path
SEL2
5V
tRISE = tFALL = 5ns
Output Voltage (mV)
10
5
Output Voltage (mV)
SEL1
15
0
–5
50
0
–50
–100
–10
–150
–15
0
–20
0
20
40
60
40
60
Time (ns)
COUT = 1pF, tRISE = t FALL = 2ns
(Generator), VIN = 0.2Vp-p
80 100 120 140 160 180 200
Time (ns)
®
MPC102
20
6
80
100
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5V, RLOAD = 10kΩ, RIN = 150Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted.
LARGE SIGNAL PULSE RESPONSE
3
100
2
Output Voltage (V)
Output Voltage (mV)
SMALL SIGNAL PULSE RESPONSE
150
50
0
–50
–100
1
0
–1
–2
–150
–3
0
20
40
60
80
100
0
20
Time (ns)
COUT = 47pF, tRISE = t FALL = 2ns
(Generator), VIN = 0.2Vp-p
40
60
80
100
Time (ns)
COUT = 1pF, tRISE = t FALL = 5ns
(Generator), VIN = 5Vp-p
LARGE SIGNAL PULSE RESPONSE
GROUP DELAY TIME vs FREQUENCY
3
3
2
1
Delay Time (ns)
Output Voltage (V)
2
0
–1
1
150Ω
22Ω
0
VIN
BUF601
150Ω
DUT
+1
VOUT
1pF
50Ω
–2
VIN = 2.8Vp-p
–3
–1
0
20
40
60
80
1M
100
10M
BANDWIDTH vs COUT WITH RECOMMENDED ROUT
2
5
1.5
0
–10
–15
–20
COUT
ROUT
f–3dB
1pF
0Ω
410MHz
10pF
30Ω 310MHz
–25
22pF
22Ω 220MHz
–30
33pF
13Ω 155MHz
–35
47pF
11Ω 140MHz
1
1pF
Output (dB)
Output (dB)
10pF
1G
GAIN FLATNESS
10
–5
100M
Frequency (Hz)
Time (ns)
COUT = 47pF, tRISE = t FALL = 5ns
(Generator), VIN = 5Vp-p
22pF
33pF
47pF
0.5
0
–0.5
–1
–1.5
–40
VIN = 0.2Vp-p
–2
1M
10M
100M
1M
1G
10M
100M
1G
Frequency (Hz)
Frequency (Hz)
®
7
MPC102
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5V, RLOAD = 10kΩ, RIN = 150Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted.
BANDWIDTH vs RLOAD
BANDWIDTH vs OUTPUT VOLTAGE
20
20
5Vp-p
2.8Vp-p
1.4Vp-p
Output (dBm)
0
–10
RL = 10kΩ
10
RL = 500Ω
0
Output (dBm)
10
0.2Vp-p
–20
–30
–10
–20
–30
–40
–40
–50
–50
–60
–60
VIN = 2.8Vp-p, COUT = 22pF
1M
10M
100M
1G
1M
Frequency (Hz)
10M
100M
1G
Frequency (Hz)
BANDWIDTH MATCHING (DB1...DB4)
30MHz HARMONIC DISTORTION
20
15
10
Harmonic Distortion (dBc)
10dB/div
2.8Vp-p
0
–5
–10
–15
–20
–25
COUT = 22pF, ROUT = 15Ω, VOUT = 2.8Vp-p
dB
300k
1M
10M
100M
1G
30M
60M
Frequency (Hz)
VOUT
ON/OFF CHARACTERISTIC
SEL1
+0.7V
Output Voltage (V)
Output (dBm)
5
0V
–0.7V
0
0.2
0.4 0.6 0.8
0
1.2 1.4 1.6 1.8 2.0
Time (µs)
SEL1
150Ω
VIN
DB1
VOUT1
150Ω
DB2
®
MPC102
8
Frequency (Hz)
= 1.4Vp-p, RL = 350Ω, COUT = 1pF
90M
APPLICATIONS INFORMATION
+6mV and –8mV. The MPC102 consists of four identical
unity-gain buffer amplifiers. Two of the four amplifiers are
connected together internally at the output. The open-loop
buffer amps, which consist of complementary emitter followers, apply no feedback so their low-frequency gain is
slightly less than unity and somewhat dependent on loading.
Unlike devices using MOS bilateral switching elements, the
bipolar complementary buffers form a unidirectional transmission path, thus providing high output-to-input isolation.
Switching stages compatible to TTL-level digital signals are
provided for each buffer to select the input channel. When
no channel is selected, the outputs of the device are highimpedance. This allows the user to wire several MPC102s
together to create multichannel switch matrices.
The MPC102 operates from ±5V power supplies (±6V
maximum). Do not attempt to operate with larger power
supply voltages or permanent damage may occur. The buffer
outputs are not current-limited or protected. If the output is
shorted to ground, currents up to 18mA could flow. Momentary shorts to ground (a few seconds) should be avoided, but
are unlikely to cause permanent damage.
INPUT PROTECTION
As shown below, all pins on the MPC102 are internally
protected from ESD by a pair of back-to-back reverse-biased
diodes to either power supply. These diodes will begin to
conduct when the input voltage exceeds either power supply
by about 0.7V. This situation can occur with loss of the
amplifier’s power supplies while a signal source is still
present. The diodes can typically withstand a continuous
current of 30mA without destruction. To insure long term
reliability, however, diode current should be externally limited to 10mA whenever possible.
Chip select logic is not integrated. The selected design
increases the flexibility of address decoding in complex
distribution fields, eases bus-controlled channel selection,
simplifies channel selection monitoring for the user, and
lowers transient peaks. All of these characteristics make the
multiplexer, in effect, a quad switchable high-speed buffer.
The buffers require DC coupling and termination resistors
when driven directly from a low-impedance cable. Highcurrent output amplifiers are recommended when driving
low-impedance transmission lines or inputs.
The internal protection diodes are designed to withstand
2.5kV (using Human Body Model) and will provide adequate ESD protection for most normal handling procedures. However, static damage can cause subtle changes in
the characteristics of the buffer amplifier input without
necessarily destroying the device. In precision buffer amplifiers, such damage may cause a noticeable degradation of
offset voltage and drift. Therefore, static protection is strongly
recommended when handling the MPC102.
An advanced complementary bipolar process, consisting of
pn-junction isolated, high-frequency NPN and PNP transistors, provides wide bandwidth while maintaining low
crosstalk and harmonic distortion. Bandwidth of over
210MHz at an output voltage of 1.4Vp-p allows the design
of multi-channel crosspoint or distribution fields in HDTVquality with an overall system bandwidth of 36MHz. The
buffer amplifiers also offer low differential gain (0.02%)
and phase (0.02°) errors. These parameters are essential for
video applications and demonstrate how well the signal path
maintains a constant small-signal gain and phase for the
low-level color subcarrier at 4.43MHz (PAL) or 3.58MHz
(NSTC) as the luminance signal is ramped through its
specified range. The bipolar construction also ensures that
the input impedance remains high and constant between ON
and OFF states. The ON/OFF input capacitance ratio is near
unity and does not vary with power supply voltage variations. The low output capacitance of 1.5pF when no channel
is selected is a very important parameter for large distribution fields. Each parallel output capacitance is an additional
load and reduces the overall system bandwidth.
Static damage has been well-recognized as a problem for
MOSFET devices, but any semiconductor device deserves
protection from this potentially damaging source. The
MPC102 incorporates on-chip ESD protection diodes as
shown in Figure 1. Thus the user does not need to add
external protection diodes, which can add capacitance and
degrade AC performance.
+VCC
External Pin
ESD Protection diodes
internally connected to all pins.
Internal Circuitry
–VCC
Bipolar video crosspoint switches are virtually glitch-free
when compared to signal switches using CMOS or DMOS
devices. The MPC102 operates with a fast make-beforebreak switching action to keep the output switching transients small and short. Switching from one channel to
another causes the signal to mix at the output for a short
time, but it interferes minimally with the input signals. The
transient peaks remain less than +6mV and –8mV. The
generated output transients are extremely small, so DC
clamping during switching between channels is unnecessary. DC clamping during the switching dead time is required to avoid synchronization by large negative output
glitches in subsequent equipment.
FIGURE 1. Internal ESD Protection.
DISCUSSION
OF PERFORMANCE
The MPC102 is a dual, 2-to-1, wide-band analog signal
multiplexer. It allows the user to connect one of the two
inputs (IN1/IN2 or IN3/IN4) to the corresponding output. The
switching speed between two input channels is typically less
than 300ns.
However, in contrast to signal switches using CMOS or
DMOS transistors, the switching transients are very low at
®
9
MPC102
The SEL-to-channel-ON time is typically 25ns and is always
shorter than the typical SEL-to-channel-OFF time of 250ns.
In the worst case, an ON/OFF margin of 150ns ensures safe
switching even for timing spreads in the digital control
latches. The short interchannel switching time of 300ns
allows channel change during the vertical blanking time,
even in high-resolution graphic or broadcast systems. As
shown in the typical performance curves, the signal envelope during transition from one channel to another rises and
falls symmetrically and shows less overshooting and DC
settling effects.
• Bypass power supplies very close to the device pins. Use
tantalum chip capacitors (approximately 2.2µF), a parallel
470pF ceramic chip capacitor may be added if desired.
Surface-mount types are recommended due to their low
lead inductance.
• PC board traces for signal and power lines should be wide
to reduce impedance.
• Make short and low inductance traces. The entire circuit
layout should be as small as possible.
• Use a low-impedance ground plane on the component side
to ensure that low-impedance ground is available throughout the layout. Grounded traces between the input traces
are essential to achieve high interchannel crosstalk rejection.
Power consumption is a serious problem when designing
large crosspoint fields with high component density. Since
most of the buffer amplifiers are in the off-state, one
important design goal was to attain low off-state quiescent current when no channel is selected. The low supply
current of ±250µA when no channel is selected and
±4.6mA when one channel is selected, as well as the
reduced ±5V supply voltage, conserves power, simplifies
the power supply design, and results in cooler, more
reliable operation.
• Do not extend the ground plane under high-impedance
nodes sensitive to stray capacitances, such as the buffer’s
input terminals.
• Sockets are not recommended, because they add significant inductance and parasitic capacitance. If sockets are
required, use zero-profile solderless sockets.
• Use low-inductance and surface-mounted components for
best ac-performance.
CIRCUIT LAYOUT
The high-frequency performance of the MPC102 can be
greatly affected by the physical layout of the circuit. The
following tips are offered as suggestions, not as absolutes.
Oscillations, ringing, poor bandwidth and settling, higher
crosstalk, and peaking are all typical problems which plague
high-speed components when they are used incorrectly.
• A resistor (100Ω to 200Ω) in series with the input of the
buffers may help to reduce peaking. Place the resistor as
close as possible to the pin.
• Plug-in prototype boards and wire-wrap boards will not
function well. A clean layout using RF techniques is
essential.
SEL1
(14)
IN1
DB1
(1)
GND
(2)
+VCC = +5V
(4)
SEL2
(13)
IN2
(3)
VOUT1
(12)
DB2
SEL3
–VCC = –5V
(11)
(9)
IN3
DB3
(5)
GND
SEL4
VOUT2
(6)
(8)
(10)
IN4
DB4
(7)
Note: DB = Diamond Buffer
FIGURE 2. Simplified Circuit Diagram.
®
MPC102
10
VOUT1 50Ω
50Ω
BUF601
150Ω
VIN1
DB1
IN1
20
150Ω
22Ω
50Ω
VOUT1
1kΩ
DB2
IN2
VIN = 1.4Vp –p
VOUT2 50Ω
50Ω
BUF601
150Ω
150Ω
VIN2
DB3
IN3
150Ω
22Ω
50Ω
VOUT2
SEL1
SEL2
SEL3
SEL4
1kΩ
DB4
IN4
Interchannel Crosstalk (dB)
150Ω
0
1
0
1
0
–20
–40
–60
MPC102AP
–80
–100
100k
MPC102AU
1M
10M
100M
300M
MPC102
Frequency (Hz)
FIGURE 3. Channel Crosstalk – Grounded Input.
VOUT1 50Ω
50Ω
BUF601
VIN1
20
150Ω
IN1
DB1
150Ω
22Ω
50Ω
VOUT1
1kΩ
IN2
DB2
VIN = 1.4Vp –p
VOUT2 50Ω
50Ω
BUF601
150Ω
VIN2
150Ω
IN3
DB3
150Ω
22Ω
50Ω
VOUT2
1kΩ
IN4
DB4
SEL1
SEL2
SEL3
SEL4
Interchannel Crosstalk (dB)
150Ω
0
1
0
1
0
–20
–60
MPC102AU
–80
–100
100k
MPC102
MPC102AP
–40
1M
10M
100M
300M
Frequency (Hz)
FIGURE 4. Off Isolation 150Ω Input.
VOUT1 50Ω
20
50Ω
BUF601
150Ω
VIN1
IN1
DB1
150Ω
0
22Ω
50Ω
VOUT1
1kΩ
150Ω
IN2
DB2
VIN = 1.4Vp-p
VOUT2 50Ω
50Ω
BUF601
50Ω
150Ω
VIN2
IN3
DB3
–20
–40
–60
150Ω
–80
22Ω
50Ω
VOUT2
1kΩ
150Ω
IN4
Off Isolation (dB)
50Ω
DB4
SEL1
SEL2
SEL3
SEL4
MPC102AP
0
0
0
0
–100
100k
1M
10M
MPC102AU
100M
300M
Frequency (Hz)
MPC102
FIGURE 5. Off Isolation Test Circuit 2.
®
11
MPC102
50Ω
RIN
150Ω
In
RIN =
50Ω
ROUT
RB
51Ω
150Ω
50Ω
Out
RIN =
50Ω
COUT
DB1 to DB4
400MHz
Scope
50Ω
+1
DUT
BUF601
Pulse
Generator
FIGURE 6. Test Circuit Pulse Response.
MPC102
OPA623
VIN
75Ω
Generator
150Ω
150Ω
RIN =
75Ω
75Ω
+
DUT
75Ω
Video
Analyzer
75Ω
–
10kΩ
RIN =
75Ω
330Ω
1 of 4
4.43MHz
330Ω
VDC
FIGURE 7. Test Circuit Differential Gain and Phase.
MPC102
SEL Inputs
MPC102
SEL Inputs
SER In
2
1
3
5
4
5
6
7
1
7
14 13 12 11
Parallel Out
HC4094
D
3
1
15
3
5
MPC102
SEL Inputs
7
SER 3
Out
1
3
5
4
5
6
MPC102
SEL Inputs
7
1
7
14 13 12 11
Parallel Out
HC4094
2
3
1
15
Clock
STR
OE
FIGURE 8. Serial Bus-Controlled Distribution Field.
®
MPC102
12
3
5
MPC102
SEL Inputs
7
1
3
5
4
5
6
MPC102
SEL Inputs
7
1
7
14 13 12 11
Parallel Out
HC4094
2
SER 3
•••
Out
3
1
15
3
5
7
SER 3
Out