Fairchild FAN7842M High and low side gate driver Datasheet

FAN7842
High and Low Side Gate Driver
Features
Description
„ Floating Channels Designed for Bootstrap Operation
The FAN7842, a monolithic high and low side gate drive
IC, which can drive MOSFETs and IGBTs that operate up
to +200V.
„
„
„
„
„
„
„
„
to +200V
Typically 350mA/650mA Sourcing/Sinking Current
Driving Capability for Both Channels
Common-Mode dv/dt Noise Canceling Circuit
Extended Allowable Negative VS Swing to -9.8V for
Signal Propagation at VCC=VBS=15V
VCC & VBS Supply Range from 10V to 20V
UVLO Functions for Both Channels
TTL-Compatible Input Logic Threshold Levels
Matched Propagation Delay Below 50ns
Output In-phase with Input Signal
Fairchild’s high-voltage process and common-mode
noise canceling technique provide stable operation of the
high-side driver under high-dv/dt noise circumstances.
An advanced level-shift circuit allows high-side gate
driver operation up to VS=-9.8V (typical) for VBS=15V.
The input logic level is compatible with standard TTLseries logic gates.
The UVLO circuits for both channels prevent malfunction
when VCC and VBS are lower than the specified threshold voltage. Output driver current (source/sink) is typically 350mA/650mA, respectively.
Applications
„ Half- and Full-Bridge Converters
8-SOP
„ Current-Fed Push-Pull Converters
„ Synchronous Buck Converters
Ordering Information
Part Number
Operating Temp.
Range
Pb-Free
Package
-40°C to +125°C
Yes
8-SOP
FAN7842M(1)
FAN7842MX
(1)
Packing Method
Tube
Tape & Reel
Note:
1. These devices passed wave soldering test by JESD22A-111.
© 2006 Fairchild Semiconductor Corporation
FAN7842 Rev. 1.0.2
www.fairchildsemi.com
FAN7842 High and Low Side Gate Driver
February 2007
FAN7842 High and Low Side Gate Driver
Typical Application Diagrams
15V
Up to 200V
RBOOT
DBOOT
1 VCC
VB 8
Q1
HIN
2
HIN
HO 7
LIN
3 LIN
VS 6
4 COM
LO 5
R1
CBOOT
R2
Q2
C1
R3
Load
R4
FAN7842 Rev.01
Figure 1. Application Circuit for Half-Bridge
Internal Block Diagram
8
VB
7
HO
6
VS
1
VCC
5
LO
4
COM
UVLO
HS(ON/OFF)
500K
NOISE
CANCELLER
R
DRIVER
2
PULSE
GENERATOR
HIN
R
S
Q
UVLO
DELAY
3
DRIVER
LS(ON/OFF)
LIN
500K
FAN7842 Rev.02
Figure 2. Functional Block Diagram
© 2006 Fairchild Semiconductor Corporation
FAN7842 Rev. 1.0.2
www.fairchildsemi.com
2
FAN7842 High and Low Side Gate Driver
Pin Configuration
VCC
1
8
VB
HIN
2
7
HO
LIN
3
6
VS
COM
4
5
LO
FAN7842 Rev.01
Figure 3. Pin Configuration (Top View)
Pin Definitions
Pin #
Name
Description
1
VCC
Low-Side Supply Voltage
2
HIN
Logic Input for High-Side Gate Driver Output
3
LIN
Logic Input for Low-Side Gate Driver Output
4
COM
5
LO
Low-Side Driver Output
6
VS
High Voltage Floating Supply Return
7
HO
High-Side Driver Output
8
VB
High-Side Floating Supply
Logic Ground and Low-Side Driver Return
© 2006 Fairchild Semiconductor Corporation
FAN7842 Rev. 1.0.2
www.fairchildsemi.com
3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. TA=25°C unless otherwise specified.
Symbol
Parameter
VS
High-side offset voltage
VB
High-side floating supply voltage
Min.
Max.
VB-25
VB+0.3
-0.3
225
VS-0.3
VB+0.3
VHO
High-side floating output voltage HO
VCC
Low-side and logic fixed supply voltage
-0.3
25
VLO
Low-side output voltage LO
-0.3
VCC+0.3
VIN
Logic input voltage (HIN, LIN)
-0.3
VCC+0.3
VCC-25
VCC+0.3
COM
Logic ground
dVs/dt
Allowable offset voltage slew rate
PD(2)(3)(4)
Power dissipation
Unit
V
50
V/ns
0.625
W
θJA
Thermal resistance, junction-to-ambient
200
°C/W
TJ
Junction temperature
150
°C
TSTG
Storage temperature
150
°C
Note:
2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material).
3. Refer to the following standards:
JESD51-2: Integral circuits thermal test method environmental conditions - natural convection
JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages
4. Do not exceed PD under any circumstances.
Recommended Operating Ratings
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
Min.
Max.
VB
High-side floating supply voltage
VS+10
VS+20
VS
High-side floating supply offset voltage
6-VCC
200
VHO
High-side (HO) output voltage
VS
VB
VLO
Low-side (LO) output voltage
COM
VCC
VIN
Logic input voltage (HIN, LIN)
COM
VCC
VCC
Low-side supply voltage
10
20
Ambient temperature
-40
125
TA
© 2006 Fairchild Semiconductor Corporation
FAN7842 Rev. 1.0.2
Unit
V
°C
www.fairchildsemi.com
4
FAN7842 High and Low Side Gate Driver
Absolute Maximum Ratings
VBIAS (VCC, VBS) = 15.0V, TA = 25°C, unless otherwise specified. The VIN and IIN parameters are referenced to COM.
The VO and IO parameters are referenced to VS and COM and are applicable to the respective outputs HO and LO
Symbol
Min.
Typ.
Max.
VCCUV+
VBSUV+
VCC and VBS supply under voltage
positive going threshold
Parameter
Condition
8.2
9.2
10.0
VCCUVVBSUV-
VCC and VBS supply under voltage
negative going threshold
7.6
8.7
9.6
VCCUVH
VBSUVH
VCC supply under voltage lockout
hysteresis
Unit
V
0.6
ILK
Offset supply leakage current
VB=VS=200V
10
IQBS
Quiescent VBS supply current
VIN=0V or 5V
45
120
IQCC
Quiescent VCC supply current
VIN=0V or 5V
70
180
IPBS
Operating VBS supply current
fIN=20kHz, rms value
600
IPCC
Operating VCC supply current
fIN=20kHz, rms value
600
VIH
Logic "1" input voltage
VIL
Logic "0" input voltage
VOH
High level output voltage,
VBIAS-VO
VOL
Low level output voltage, VO
IIN+
Logic "1" input bias current
VIN=5V
10
20
IIN-
Logic "0" input bias current
VIN=0V
1.0
2.0
IO+
Output high short circuit pulse current
VO=0V, VIN=5V with PW<10µs
250
350
IO-
Output low short circuit pulsed current
VO=15V, VIN=0V with PW<10µs
500
650
VS
Allowable negative VS pin voltage for
HIN signal propagation to HO
µA
µA
2.9
0.8
1.0
IO=20mA
V
0.6
-9.8
µA
mA
-7.0
V
Dynamic Electrical Characteristics
VBIAS (VCC, VBS)=15.0V, VS=COM, CL=1000pF, and TA=25°C, unless otherwise specified.
Symbol
Parameter
ton
Turn-on propagation delay
toff
Turn-off propagation delay
tr
Turn-on rise time
tf
Turn-off fall time
MT
Conditions
VS=0V
VS=0V or 200V(5)
Delay matching, HS & LS turn-on/off
Min.
Typ.
Max.
100
170
300
100
200
300
20
60
140
30
80
Unit
ns
50
Note:
5. This parameter guaranteed by design.
© 2006 Fairchild Semiconductor Corporation
FAN7842 Rev. 1.0.2
www.fairchildsemi.com
5
FAN7842 High and Low Side Gate Driver
Electrical Characteristics
Turn-On
PropagationDelay
Delay[ns]
[nsec]
Turn-on Propagation
Turn-On
[nsec]
Turn-onPropagation
Propagation Delay
Delay [ns]
300
V
VCC=VBS
CC=VBS
COM=0V
COM=0V
CL=1nF
=1nF
C
L
Ta=25°C
TA=25°C
250
High-Side
200
150
Low-Side
100
300
VVCC=VBS=15V
CC=VBS=15V
COM=0V
COM=0V
CL=1nF
CL=1nF
275
250
225
High-Side
200
175
Low-Side
150
125
100
75
50
10
12
14
16
18
-40
20
-20
0
Supply Voltage [V]
Turn-Off
PropagationDelay
Delay[ns]
[nsec]
Turn-off Propagation
Turn-Off
[nsec]
Turn-offPropagation
Propagation Delay
Delay [ns]
VCC=V
VCC=VBS
BS
COM=0V
COM=0V
CL=1nF
CL=1nF
Ta=25°C
TA=25°C
240
High-Side
220
200
Low-Side
180
160
140
120
80
100
120
300
V
=VBS=15V
VCC=VBS=15V
CC
COM=0V
COM=0V
CL=1nF
CL=1nF
275
250
High-Side
225
Low-Side
200
175
150
125
100
10
12
14
16
18
-40
20
-20
0
Supply Voltage [V]
80
75
58
56
Turn-On
[nsec]
Turn-on Rising
Rising Time
Time [ns]
VCC=V
VCC=VBS
BS
COM=0V
COM=0V
CL=1nF
CL=1nF
Ta=25°C
TA=25°C
60
54
52
Low-Side
50
High-Side
48
40
60
80
100
120
Figure 7. Turn-Off Propagation Delay vs. Temp.
64
62
20
Temperature [°C]
Figure 6. Turn-Off Propagation Delay vs.
Supply Voltage
Turn-On
RisingTime
Time[ns]
[nsec]
Turn-on Rising
60
Figure 5. Turn-On Propagation Delay vs. Temp.
300
260
40
Temperature[°C]
Figure 4. Turn-On Propagation Delay vs.
Supply Voltage
280
20
46
44
VVCC=VBS=15V
=VBS=15V
CC
COM=0V
COM=0V
CL=1nF
CL=1nF
70
65
60
55
50
Low-Side
45
40
35
High-Side
30
25
20
15
10
5
0
42
10
11
12
13
14
15
16
17
18
19
-40
20
Supply Voltage [V]
0
20
40
60
80
100
120
Temperature [°C]
Figure 8. Turn-On Rising Time vs. Supply Voltage
Figure 9. Turn-On Rising Time vs. Temp.
© 2006 Fairchild Semiconductor Corporation
FAN7842 Rev. 1.0.2
-20
www.fairchildsemi.com
6
FAN7842 High and Low Side Gate Driver
Typical Characteristics
50
VCC=V
BS
VCC=VBS
COM=0V
COM=0V
CL=1nF
CL=1nF
Ta=25°C
T =25
°C
32
30
Turn-Off
FallingTime
Time[ns]
[nsec]
Turn-off Falling
Turn-OffFalling
FallingTime
Time
[nsec]
Turn-off
[ns]
34
A
28
High-Side
26
24
22
Low-Side
20
18
V
=VBS=15V
VCC=VBS=15V
CC
COM=0V
COM=0V
CL=1nF
CL=1nF
45
40
High-Side
35
30
25
Low-Side
20
15
16
10
10
11
12
13
14
15
16
17
18
19
-40
20
-20
0
Supply Voltage [V]
Output Sourcing Current [mA]
Output Sourcing Current [mA]
VVCC=VBS
CC=VBS
COM=0V
COM=0V
LO=HO=0V
LO=HO=0V
Ta=25°C
TA=25°C
450
400
High-Side
350
300
Low-Side
250
60
80
100
120
Figure 11. Turn-Off Falling Time vs. Temp.
600
500
40
Temperature [°C]
Figure 10. Turn-Off Falling Time vs. Supply Voltage
550
20
200
150
440
VVCC=VBS=15V
=VBS=15V
CC
COM=0V
COM=0V
LO=HO=0V
LO=HO=0V
420
400
380
High-Side
360
340
Low-Side
320
300
280
100
10
12
14
16
18
-40
20
-20
0
40
60
80
100
120
Temperature [°C]
Supply Voltage [V]
Figure 12. Output Sourcing Current vs.
Supply Voltage
Figure 13. Output Sourcing Current vs. Temp.
850
900
VVCC=VBS
CC=VBS
COM=0V
COM=0V
LO=VCC,
HO=VB
, HO=V
LO=V
CC
B
Ta=25°C
TA=25°C
800
700
Low-Side
Output Sinking Current [mA]
Output Sinking Current [mA]
20
High-Side
600
500
400
VVCC=VBS=15V
CC=VBS=15V
COM=0V
COM=0V
LO=VCC, HO=VB
LO=VCC, HO=VB
800
750
700
High-Side
650
Low-Side
600
550
500
300
10
12
14
16
18
-40
20
Figure 14. Output Sinking Current vs. Temp.
0
20
40
60
80
100
120
Figure 15. Output Sinking Current vs. Temp.
© 2006 Fairchild Semiconductor Corporation
FAN7842 Rev. 1.0.2
-20
Temperature [° C]
Supply Voltage [V]
www.fairchildsemi.com
7
FAN7842 High and Low Side Gate Driver
Typical Characteristics (Continued)
Allowable
AllowableNegative
NegativeVVS
Voltage
S Voltage
for for
Signal
Propagation
toto
High
Side [V]
Signal
Propagation
High-Side
[V]
AllowableNegative
NegativeVVSVoltage
Voltage
Allowable
S
for Signal
PropagatiototoHigh
High-Side
[V]
for Signal
Propagation
Side [V]
-4
VCC=VVCC=VBS
BS
COM=0V
COM=0V
°C
TA=25Ta=25°C
-6
-8
-10
-12
-14
-16
-18
10
12
14
16
18
20
-9.0
VCC=VBS=15V
VCC=VBS=15V
COM=0V
COM=0V
-9.2
-9.4
-9.6
-9.8
-10.0
-10.2
-10.4
-40
-20
0
Supply Voltage [V]
40
60
80
100
120
Temperature [°C]
Figure 16. Allowable Negative VS Voltage for Signal
Propagation to High Side vs. Supply Voltage
Figure 17. Allowable Negative VS Voltage for Signal
Propagation to High Side vs. Temp.
95
100
VVBS=15V
BS=15V
COM=0V
COM=0V
HIN=LIN=0V
HIN=LIN=0V
Ta=25 °C
80
VCC
=VBS=15V
VCC=VBS=15V
COM=0V
COM=0V
HIN=LIN=0V
HIN=LIN=0V
90
85
80
TA=25°C
IQCC
[uA]
IQCC [μA]
IQCC
[uA]
IQCC [μA]
20
60
40
75
70
65
60
55
20
50
45
0
0
5
10
15
-40
20
-20
0
Supply Voltage [V]
20
40
60
80
100
120
Temperature [°C]
Figure 18. IQCC vs. Supply Voltage
Figure 19. IQCC vs. Temp.
80
50
VCCVCC=15V
=15V
COM=0V
COM=0V
HIN=LIN=0V
HIN=LIN=0V
50
48
IQBS
[uA]
IQBS [μA]
60
IQBS
IQBS [μA]
[uA]
52
VVCC=15V
CC=15V
COM=0V
COM=0V
HIN=LIN=0V
HIN=LIN=0V
Ta=25°C
TA=25°C
70
40
30
46
44
42
40
20
38
10
36
0
0
5
10
15
-40
20
0
20
40
60
80
100
120
Temperature [°C]
Supply Voltage [V]
Figure 20. IQBS vs. Supply Voltage
Figure 21. IQBS vs. Temp.
© 2006 Fairchild Semiconductor Corporation
FAN7842 Rev. 1.0.2
-20
www.fairchildsemi.com
8
FAN7842 High and Low Side Gate Driver
Typical Characteristics (Continued)
0.60
0.7
VCCVCC=VBS
=VBS
COM=0V
COM=0V
HIN=LIN=5V
HIN=LIN=5V
IL=20mA
IL=20mA
Ta=25°C
TA=25°C
0.5
0.50
[V]
VVOH
OH [V]
VVOH
OH [V][V]
0.6
VVCC=VBS=15V
CC=VBS=15V
COM=0V
COM=0V
HIN=LIN=5V
HIN=LIN=5V
IL=20mA
IL=20mA
0.55
High-Side
0.4
Low-Side
0.45
Low-Side
0.40
High-Side
0.35
0.3
0.30
0.25
0.2
10
12
14
16
18
-40
20
-20
0
20
Figure 22. High Level Output Voltage vs. Supply
Voltage
0.22
100
120
VVCC=VBS=15V
CC=VBS=15V
COM=0V
COM=0V
HIN=LIN=0V
HIN=LIN=0V
IL=20mA
IL=20mA
0.20
0.18
VOL[V]
[V]
V
OL
[V]
VVOL
OL [V]
0.16
80
Figure 23. High Level Output Voltage vs. Temp.
VCCVCC=VBS
=VBS
COM=0V
COM=0V
HIN=LIN=0V
HIN=LIN=0V
IL=20mA
IL=20mA
Ta=25°C
TA=25°C
0.17
60
Temperature [°C]
Supply Voltage [V]
0.18
40
0.15
High-Side
High-Side
0.16
Low-Side
0.14
0.14
0.12
Low-Side
0.13
0.10
0.12
10
12
14
16
18
-40
20
-20
0
20
Supply Voltage [V]
60
80
100
120
Temperature [°C]
Figure 24. Low Level Output Voltage vs. Supply
Voltage
Figure 25. Low Level Output Voltage vs. Temp.
16
40
HIN=LIN=5V
VCC=VBS
V
=VBS
CC
COM=0V
COM=0V
IN=VCC or IN=0V
IN=VCC or IN=0V
Ta=25°C
TA=25°C
30
25
14
12
IN+[μA]
[uA]
IN+
35
IN+/IN-[μA]
[uA]
IN+/IN-
40
IN+
20
15
LIN
10
HIN
8
10
6
5
IN-
0
0
5
10
4
15
-40
20
Figure 26. Input Bias Current vs. Supply Voltage
0
20
40
60
80
100
120
Figure 27. Input Bias Current vs. Temp.
© 2006 Fairchild Semiconductor Corporation
FAN7842 Rev. 1.0.2
-20
Temperature [° C]
Supply Voltage [V]
www.fairchildsemi.com
9
FAN7842 High and Low Side Gate Driver
Typical Characteristics (Continued)
10.0
9.8
9.8
9.6
VBSUV+/VBSUVVBSUV+/VBSUV- [V] [V]
VCCUV+/VCCUVVCCUV+/VCCUV- [V] [V]
10.0
VCCUV+
VCCUV+
9.4
9.2
9.0
VCCUVVCCUV-
8.8
8.6
8.4
8.2
9.6
VBSUV+
VBSUV+
9.4
9.2
9.0
VBSUVVBSUV-
8.8
8.6
8.4
8.2
8.0
8.0
-40
-20
0
20
40
60
80
100
120
-40
-20
0
Temperature [° C]
Input Logic Threshold Voltage [V]
=200V
VVB-to-COM
B-to-COM=200V
ILK
[uA]
ILK [μA]
4
3
2
1
0
0
20
40
60
80
100
120
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
80
100
120
VVCC=VBS=15V
CC=VBS=15V
COM=0V
COM=0V
VIH(LIN)
VIH(HIN)
VIL(LIN)
VIL(HIN)
-40
Temperature [°C]
-20
0
20
40
60
80
100
120
Temperature [°C]
Figure 30. VB to COM Leakage Current vs. Temp.
Figure 31. Input Logic Threshold Voltage vs. Temp.
© 2006 Fairchild Semiconductor Corporation
FAN7842 Rev. 1.0.2
60
Figure 29. VBS UVLO Threshold Voltage vs. Temp.
5
-20
40
Temperature [° C]
Figure 28. VCC UVLO Threshold Voltage vs. Temp.
-40
20
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10
FAN7842 High and Low Side Gate Driver
Typical Characteristics (Continued)
15V
100nF
15V
1 VCC
VB 8
4 COM
VS 6
10uF
10uF
100nF
HIN
LIN
1nF
HIN
2
HIN
HO 7
LIN
3 LIN
LO 5
1nF
HO
LO
FAN7842 Rev.01
Figure 32. Switching Time Test Circuit
HIN
LIN
t on : Turn-on Delay Time
t off : Turn-off Delay Time
t r : Turn-on Rise Time
t f : Turn-off Fall Time
50%
t on
50%
to f f
tr
Figure 33. Input / Output Timing Diagram
HIN
LIN
50%
LO
tf
50%
10%
HO
LO
90%
10%
MT
10%
Figure 34. Switching Time Waveform Definitions
90%
LO
HO
Figure 35. Delay Matching Waveform Definition
© 2006 Fairchild Semiconductor Corporation
FAN7842 Rev. 1.0.2
toff- H
toff- L
ton-H
ton-L
90%
MT
HO
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11
FAN7842 High and Low Side Gate Driver
Applications Information
8-SOP
Dimensions are in millimeters unless otherwise noted.
MIN
#5
6.00 ±0.30
0.236 ±0.012
0.41 ±0.10
0.016 ±0.004
#4
1.27
0.050
#8
5.13
MAX
0.202
#1
4.92 ±0.20
0.194 ±0.008
(
0.56
)
0.022
1.55 ±0.20
0.061 ±0.008
0.1~0.25
0.004~0.001
MAX0.10
MAX0.004
+0.10
0.15 -0.05
+0.004
0.006 -0.002
1.80
MAX
0.071
3.95 ±0.20
0.156 ±0.008
0~
8°
5.72
0.225
0.50 ±0.20
0.020 ±0.008
September 2001, Rev B1
sop8_dim.pdf
Figure 36. 8-Lead Small Outline Package (SOP)
© 2006 Fairchild Semiconductor Corporation
FAN7842 Rev. 1.0.2
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12
FAN7842 High and Low Side Gate Driver
Package Dimensions
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