Fairchild FQI13N10 100v n-channel mosfet Datasheet

QFET
TM
FQB13N10 / FQI13N10
100V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand a high energy pulse in the
avalanche and commutation modes. These devices are
well suited for low voltage applications such as audio
amplifier, high efficiency switching DC/DC converters, and
DC motor control.
•
•
•
•
•
•
•
12.8A, 100V, RDS(on) = 0.18Ω @VGS = 10 V
Low gate charge ( typical 12 nC)
Low Crss ( typical 20 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
175°C maximum junction temperature rating
D
D
!
"
G
S
D2-PAK
G D S
FQB Series
Absolute Maximum Ratings
Symbol
VDSS
ID
! "
"
"
G!
I2-PAK
!
FQI Series
S
TC = 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
FQB13N10 / FQI13N10
100
Units
V
12.8
A
- Continuous (TC = 100°C)
IDM
Drain Current
- Pulsed
(Note 1)
9.05
A
51.2
A
VGSS
Gate-Source Voltage
± 25
V
EAS
Single Pulsed Avalanche Energy
(Note 2)
95
mJ
IAR
Avalanche Current
(Note 1)
12.8
A
EAR
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C) *
(Note 1)
6.5
6.0
3.75
mJ
V/ns
W
65
0.43
-55 to +175
W
W/°C
°C
300
°C
dv/dt
PD
TJ, TSTG
TL
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8” from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
Parameter
Thermal Resistance, Junction-to-Case
Typ
--
Max
2.31
Units
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient *
--
40
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient
--
62.5
°C/W
* When mounted on the minimum pad size recommended (PCB Mount)
©2000 Fairchild Semiconductor International
Rev. A1, January 2001
FQB13N10 / FQI13N10
January 2001
Symbol
TC = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Units
100
--
--
V
--
0.09
--
V/°C
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
∆BVDSS
/
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, Referenced to 25°C
IDSS
IGSSF
IGSSR
VDS = 100 V, VGS = 0 V
--
--
1
µA
VDS = 80 V, TC = 150°C
--
--
10
µA
Gate-Body Leakage Current, Forward
VGS = 25 V, VDS = 0 V
--
--
100
nA
Gate-Body Leakage Current, Reverse
VGS = -25 V, VDS = 0 V
--
--
-100
nA
2.0
--
4.0
V
--
0.142
0.18
Ω
--
6.8
--
S
pF
Zero Gate Voltage Drain Current
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
RDS(on)
Static Drain-Source
On-Resistance
VGS = 10 V, ID = 6.4 A
gFS
Forward Transconductance
VDS = 40 V, ID = 6.4 A
(Note 4)
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
--
345
450
--
100
130
pF
--
20
25
pF
ns
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = 50 V, ID = 12.8 A,
RG = 25 Ω
(Note 4, 5)
VDS = 80 V, ID = 12.8 A,
VGS = 10 V
(Note 4, 5)
--
5
20
--
55
120
ns
--
20
50
ns
--
25
60
ns
--
12
16
nC
--
2.5
--
nC
--
5.1
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
12.8
A
ISM
--
--
51.2
A
VSD
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = 12.8 A
Drain-Source Diode Forward Voltage
--
--
1.5
V
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 12.8 A,
dIF / dt = 100 A/µs
(Note 4)
--
72
--
ns
--
0.17
--
µC
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 0.87mH, IAS = 12.8A, VDD = 25V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 12.8A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2000 Fairchild Semiconductor International
Rev. A1, January 2001
FQB13N10 / FQI13N10
Electrical Characteristics
FQB13N10 / FQI13N10
Typical Characteristics
VGS
15.0 V
10.0 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
Top :
ID, Drain Current [A]
1
10
ID , Drain Current [A]
1
10
0
10
175℃
0
25℃
10
-55℃
※ Notes :
1. VDS = 40V
2. 250μs Pulse Test
※ Notes :
1. 250μs Pulse Test
2. TC = 25℃
-1
-1
10
10
-1
0
10
1
10
2
10
4
6
8
10
VGS , Gate-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
0.8
VGS = 10V
1
IDR , Reverse Drain Current [A]
RDS(ON) [Ω ],
Drain-Source On-Resistance
0.6
VGS = 20V
0.4
0.2
0
10
175℃
※ Notes :
1. VGS = 0V
2. 250μs Pulse Test
25℃
※ Note : TJ = 25℃
-1
0.0
0
10
20
30
10
40
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
ID, Drain Current [A]
VSD, Source-Drain voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
12
900
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
600
Ciss
450
Coss
300
※ Notes :
1. VGS = 0 V
2. f = 1 MHz
Crss
150
VDS = 50V
10
VGS, Gate-Source Voltage [V]
750
Capacitance [pF]
10
VDS = 80V
8
6
4
2
※ Note : ID = 12.8A
0
-1
10
0
0
10
1
10
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2000 Fairchild Semiconductor International
0
2
4
6
8
10
12
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. A1, January 2001
FQB13N10 / FQI13N10
Typical Characteristics
(Continued)
3.0
1.2
RDS(ON) , (Normalized)
Drain-Source On-Resistance
BV DSS , (Normalized)
Drain-Source Breakdown Voltage
2.5
1.1
1.0
※ Notes :
1. VGS = 0 V
2. ID = 250 μA
0.9
0.8
-100
-50
0
50
100
150
2.0
1.5
1.0
※ Notes :
1. VGS = 10 V
2. ID = 6.4 A
0.5
0.0
-100
200
-50
o
0
50
100
150
200
o
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
15
Operation in This Area
is Limited by R DS(on)
2
10
12
ID, Drain Current [A]
ID, Drain Current [A]
100 µs
1 ms
1
10
10 ms
DC
0
10
※ Notes :
9
6
3
o
1. TC = 25 C
o
2. TJ = 175 C
3. Single Pulse
-1
10
0
1
10
0
25
2
10
10
50
100
125
150
175
Figure 10. Maximum Drain Current
vs. Case Temperature
D = 0 .5
0
※ N o te s :
1 . Z θ J C ( t) = 2 .3 1 ℃ /W M a x .
2 . D u ty F a c to r , D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C ( t)
0 .2
0 .1
0 .0 5
10
-1
0 .0 2
0 .0 1
θ JC
( t) , T h e r m a l R e s p o n s e
Figure 9. Maximum Safe Operating Area
10
75
TC, Case Temperature [℃]
VDS, Drain-Source Voltage [V]
PDM
t1
Z
s i n g l e p u ls e
10
t2
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
Figure 11. Transient Thermal Response Curve
©2000 Fairchild Semiconductor International
Rev. A1, January 2001
FQB13N10 / FQI13N10
Gate Charge Test Circuit & Waveform
VGS
Same Type
as DUT
50KΩ
Qg
200nF
12V
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RL
VDS
90%
VDD
VGS
RG
VGS
DUT
10V
10%
td(on)
tr
td(off)
t on
tf
t off
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
VDS
BVDSS
IAS
ID
RG
VDD
DUT
10V
tp
©2000 Fairchild Semiconductor International
ID (t)
VDS (t)
VDD
tp
Time
Rev. A1, January 2001
FQB13N10 / FQI13N10
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
I SD
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
VDD
Body Diode
Forward Voltage Drop
©2000 Fairchild Semiconductor International
Rev. A1, January 2001
FQB13N10 / FQI13N10
Package Dimensions
4.50 ±0.20
9.90 ±0.20
+0.10
2.00 ±0.10
2.54 TYP
(0.75)
°
~3
0°
0.80 ±0.10
1.27 ±0.10
2.54 ±0.30
15.30 ±0.30
0.10 ±0.15
2.40 ±0.20
4.90 ±0.20
1.40 ±0.20
9.20 ±0.20
1.30 –0.05
1.20 ±0.20
(0.40)
D2PAK
+0.10
0.50 –0.05
2.54 TYP
9.20 ±0.20
(2XR0.45)
4.90 ±0.20
15.30 ±0.30
10.00 ±0.20
(7.20)
(1.75)
10.00 ±0.20
(8.00)
(4.40)
0.80 ±0.10
©2000 Fairchild Semiconductor International
Rev. A1, January 2001
FQB13N10 / FQI13N10
Package Dimensions
(Continued)
I2PAK
4.50 ±0.20
(0.40)
9.90 ±0.20
+0.10
MAX13.40
9.20 ±0.20
(1.46)
1.20 ±0.20
1.30 –0.05
0.80 ±0.10
2.54 TYP
2.54 TYP
10.08 ±0.20
1.47 ±0.10
MAX 3.00
(0.94)
13.08 ±0.20
)
5°
(4
1.27 ±0.10
+0.10
0.50 –0.05
2.40 ±0.20
10.00 ±0.20
©2000 Fairchild Semiconductor International
Rev. A1, January 2001
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In
Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
©2000 Fairchild Semiconductor International
Rev. F1