SILABS C8051F333-GM 25 mips, 4 kb flash, 20-pin mixed-signal mcu Datasheet

C8051F333
25 MIPS, 4 kB Flash, 20-Pin Mixed-Signal MCU
Analog Peripherals
High-Speed 8051 µC Core
-
Comparator
-
Programmable hysteresis and response time
Configurable to generate interrupts or reset
Low current (0.4 µA)
-
Memory
On-Chip Debug
-
On-chip debug circuitry facilitates full speed, non-intrusive in-system
debug (no emulator required)
Provides breakpoints, single stepping, watchpoints
Inspect/modify memory, registers, and stack
Superior performance to emulation systems using ICE-chips, target
pods, and sockets
Supply Voltage: 2.7 to 3.6 V
-
Pipelined instruction architecture; executes 70% of instructions in 1 or 2
system clocks
Up to 25 MIPS throughput with 25 MHz clock
Expanded interrupt handler
-
Digital Peripherals
-
Typical operating current: 6.4 mA at 25 MHz
9 µA at 32 kHz
Typical stop mode current: <0.1 µA
-
Temperature Range: –40 to +85 °C
768 bytes data RAM
4 kB Flash; in-system programmable in 512 byte sectors (512 bytes are
reserved)
17 port I/O; all are 5 V tolerant
Hardware SMBus™ (I2C™ compatible), SPI™, and UART serial ports
available concurrently
Programmable 16-bit counter/timer array with three capture/compare
modules, WDT
4 general-purpose 16-bit counter/timers
Real-time clock mode using PCA or timer and external clock source
Clock Sources
-
Two internal oscillators:
-
External oscillator: Crystal, RC, C, or Clock (1 or 2 pin modes)
Can switch between clock sources on-the-fly
-24.5 MHz, 2% accuracy supports UART operation
-80 kHz low frequency, low-power
Package
-
20-Pin QFN (lead-free package)
Ordering Part Numbers
-
C8051F333-GM
Port 0
Latch
P0.0/VREF
UART
VDD
Timer 0,
1, 2, 3
Analog/Digital
Power
GND
C2D
Debug HW
Reset
RST/C2CK
POR
XTAL1
XTAL2
BrownOut
External
Oscillator
Circuit
24.5 MHz (2%)
Internal
Oscillator
System Clock
8
0
5
1
4 kB
FLASH
256 Byte
SRAM
512 Byte
XRAM
3-Chnl
PCA/
WDT
SMBus
SPI
D
r
v
P0.1/IDAC
P0.2/XTAL1
P0.3/XTAL2
P0.4/TX
P0.5/RX
P0.6/CNVST
X
B
A
R
P0.7
P1.0
Port 1
Latch
P1.1
C
o SFR Bus
r
e
P
1
P1.2
P1.3
D
r
v
P1.4
P1.5
P1.6
P1.7
CP0
80kHz
Internal
Oscillator
Port 2
Latch
Small Form Factor
P
0
Copyright © 2005 by Silicon Laboratories
+
-
C2D
P2.0/C2D
4.19.2005
C8051F333
25 MIPS, 4 kB Flash, 20-Pin Mixed-Signal MCU
Selected Electrical Specifications
(TA = –40 to +85 C°, VDD = 2.7 V unless otherwise specified)
Parameter
Global Characteristics
Conditions
Min
Typ
Max
Units
Clock = 25 MHz
Clock = 1 MHz
Clock = 80 kHz; VDD Monitor Disabled Clock = 32 kHz;
VDD Monitor Disabled
Oscillator off; VDD Monitor Disabled
2.7
—
—
—
—
—
DC
6.4
0.36
20
9
<0.1
—
3.6
—
—
—
—
—
25
V
mA
mA
µA
µA
µA
MHz
24.0
—
24.5
80
25.0
—
MHz
kHz
—
—
—
—
—
—
—
—
0.1
7.6
0.18
3.2
0.32
1.3
1
0.4
—
—
—
—
—
—
—
—
µs
µA
µs
µA
µs
µA
µs
µA
Supply Voltage
Supply Current with
CPU active
Supply Current (shutdown)
Clock Frequency Range
Internal Oscillators
Frequency (OSC0)
Frequency (OSC1)
See Note
Comparator
Response Time Mode0
Current Consumption Mode0
Response Time Mode1
Current Consumption Mode1
Response Time Mode2
Current Consumption Mode2
Response Time Mode3
Current Consumption Mode3
(CP+) – (CP-) = 100 mV
(CP+) – (CP-) = 100 mV
(CP+) – (CP-) = 100 mV
(CP+) – (CP-) = 100 mV
Note: OSC1 can be calibrated in 2.5% steps using an internal calibration register.
C8051F330DK Development Kit
Package Information
11
E2
2
15
17
18
19
13
14
DETAIL 1
20
1
R
E2
2
e
3
4xe
E
12
D2
2
4xe
D
Side View
0.18
2.00
2.00
0.45
MM
TYP
0.90
0.02
0.65
0.25
0.23
4.00
2.15
4.00
2.15
0.5
0.55
20
5
5
0.30
2.35
2.35
0.65
0.09
0.435
0.435
0.18
0.18
A1
A
AA
CC
Small Form Factor
MAX
1.00
0.05
1.00
DETAIL 1
A2
A3
e
MIN
0.80
0
0
BB
D2
4
16
b
L
5
A
A1
A2
A3
b
D
D2
E
E2
e
L
N
ND
NE
R
AA
BB
CC
DD
DD
9
10
8
7
6
Bottom View
Copyright © 2005 by Silicon Laboratories
4.19.2005
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