VISHAY APD

APD-128G064D
Vishay Dale
Plasma Panel Display Modules
128 x 64 Graphics Display with Video Interface, DC Converter and Drive Circuitry
FEATURES
•
•
•
•
The APD-128G064D is a dot matrix graphic display with an
array of 128 x 64 pixels available. The module is composed
of a highly reliable DC plasma display, Video Interface, DC
converter and drive circuitry which are assembled to form a
rugged, slim profile display sub-system.
Interface to the APD-128G064D is through a video interface.
Patented open construction display technology assures a
stable, flicker free screen.
OPTICAL SPECIFICATIONS
Pixel Pitch: 0.040.
Pixel Size: 0.020" [0.610] square.
Pixel Array: 128 x 64.
Luminance: 50 foot lamberts typical.
Color: Neon orange.
Refresh Cycle: 120 Hz typical.
Viewing Angle: 150° cone.
Contrast Ratio: 30:1
STANDARD ELECTRICAL SPECIFICATIONS
DESCRIPTION
SYMBOL
MIN.
TYP.
MAX.
UNITS
Panel Supply Voltage
VDC
8.0
12.0
28.0
V
Panel Supply Current
IDC
0.15
0.4
1.5
A
128 x 64 pixel array for bright and vivid graphics.
Video interface.
Powerful software commands make display integration
simple and efficient.
+ 8 to + 24 VDC display voltage.
ELECTROSTATIC CAUTION
Vishay Dale display panels use electrostatic sensitive
components. These assemblies should be unpacked and
handled in an ESD controlled area only. When shipping use
packing materials designed for protection of electrostatic
sensitive components.
ENVIRONMENTAL SPECIFICATIONS
Operating Temperature: 20°C to + 70°C.
Storage Temperature: - 40°C to + 85°C.
Operating Humidity: 95% RH non-condensing.
Mechanical Shock: 30 G.
Vibration: 0.018" [0.457mm] displacement amplitude from
10-50Hz, 2 G acceleration from 50 to 2000Hz logarithmic
sweep rate.
Mean Time Between Failure: 60,000 hours.
Vishay Dale believes that the information described in this
publication is accurate and reliable, and much care has
been taken in its preparation. However, no responsibility,
financial or otherwise, is accepted for any consequences
arising out of the use of this information.
DIMENSIONS in inches [millimeters]
Mounting Holes
0.150 Dia. 4 Places
B
A
128 X 64 Full Field
Pixel Size: 0.020 Square
Pixel Pitch: 0.040
Ansiotropic Connectors
C
E
F
D
M
G
H
I
N
J
K
L
128 X 64 Full Field
Q
P
O
Pin 1 of P2
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Pin 1 of P1
R
S Component
Height
T
U
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
0.150 [3.81]
7.70 [195.58]
5.00 [127.00]
4.70 [119.38]
3.55 [90.17]
2.548 [64.72]
0.150 [3.81]
0.650 [16.51]
1.45 [36.83]
5.10 [129.54]
6.80 [172.72]
8.00 [203.20]
0.925 [23.50]
1.226 [31.14]
0.062 [1.57]
0.395 [10.03]
0.040 [1.02]
0.020 [0.508]
0.970 [24.64]
0.020 [0.508]
0.040 [1.02]
Document Number: 37055
Revision 05-Dec-00
APD-128G064D
Vishay Dale
DESCRIPTION OF INPUT SIGNALS
DOT CLOCK: This signal enters the SERIAL DATA on each
low to high transition. A total of 128 DOT CLOCK transitions
must be present for each line of column/anode data.
SERIAL DATA: This signal presents the pixel data in
positive logic format. A logic one represents a lit pixel and a
logic zero represents an extinguished pixel. Data is entered
from right to left. The first pixel data entered will represent
the leftmost pixel in the row.
COLUMN LATCH: This signal latches the pixel data into the
driver outputs. When the COLUMN LATCH signal goes to
logic one the data entered previously will fall through to the
driver outputs. When the signal returns to a logic zero, the
data is latched and the shift register is now ready to accept
the next row of data. Must be held low while entering new
SERIAL DATA.
DISPLAY ENABLE: This signal enables the output drivers.
Using a duty cycle control, this signal may also be used for
intensity control. The DISPLAY ENABLE must be at logic
zero before the COLUMN LATCH signal transitions. To
avoid display blurring, the ROW CLOCK signal should also
transition while DISPLAY ENABLE is a logic zero. It is
recommended that this signal remain low for 10µS minutes.
ROW DATA: This signal is the first line marker for the scan.
This input should be held high to correspond to the first row
of pixel data.
ROW CLOCK: This signal clocks ROW DATA on the falling
edge. The ROW CLOCK signal is repetitive and must be
present for proper scanning of the display module.
The APD-128G064D has a unique input protection circuit
that assures the column drivers stay blanked on power up.
The protection circuit unblanks the column drivers when the
ROW CLOCK signal begins (i.e. the display begins scanning).
LOGIC AND DATA TIMING
t4
Row Data
t2
t3
t1
Row Clock
Display
Enable
0
1
62
2
1
0
2
0
63
62
63
0
1
1
Row Clock
Column
Latch
Display
Enable
1st Bit of Row Will Appear in Leftmost Column
0
Serial Data
1
2
126
127
t5
Dot Clock
t6
t7
MINIMUM
TYPICAL
MAXIMUM
UNITS
t1
130
112
—
nS
t2
75
1000
—
uS
POWER SUPPLY: (Recommended)
t3
16.6
14.3
—
uS
+ 12 V ± 0.6 V
t4
5
20
200
Hz
t5
25
—
—
nS
t6
75
—
—
nS
t7
75
—
—
nS
VDC
1.5 A Max.*, 0.4 A Typ.
*NOTE: The maximum VDC draw denotes a power up condition
when the DC converter starts. Typical duration is 15-30 mS.
PARAMETER
Positive Edge x 192
POWER SUPPLY CONNECTION
CONNECTOR
J1
PIN
1
2
3
4
SIGNAL
+ 12 VDC
GROUND
GROUND
N/C
SIGNAL DESCRIPTION
PIN
1
3
5
7
9
11
*
FUNCTION
DEm
Rdata
Rclk
latch
Dot CLK
Sdata
GND
DESCRIPTION
Display enable signal
Row driver data input
Row clock
Column latch
Dot clock
Serial column data
Common Ground
This information is subject to change without notice.
Document Number: 37055
Revision 05-Dec-00
ORDERING INFORMATION
DESCRIPTION
PART NUMBER
Display Unit ........................................................ APD-128G064D
Non-Glare Filter (Amber CP) ...................................... 280109-19
Video Controller (+ 5V) .................................................. PDS-500
Video Controller (+ 12V) ............................................. PDS-500-1
APPLICABLE MATING
CONNECTORS
MANUFACTURER PART NUMBER
TO POWER INPUT (P1) ........... MOLEX .................. 09-50-3081
MOLEX .................. 09-06-5087
Vishay Dale Power
AMP ....................... 640428-8
Connector Kit 280108-05
METHODE .................. 3300-108
TO LOGIC INPUT (P2) ............. MOLEX .................. 39-27-1146
ROBINSON NUGENT....IDS-C14PK-TC
Vishay Dale Data
AMP ...... 746195-2, 746582-2
Connector Kit
3M .... 3314-5002, 3314-5202
280108-05
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Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
products designed for such applications.
Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
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