IS31LT3918 HIGH VOLTAGE LED LIGHTING DRIVER WITH SWITCH DIMMING OCTOBER 2011 GENERAL DESCRIPTION IS31LT3918 LED driver IC is a peak current detection buck converter which operates in constant off time mode. It operates over a very wide input voltage supply range of 6VDC to 450VDC or 110VAC/220VAC. IS31LT3918 incorporates the special feature of switch dimming by detecting OFF-ON cycles of the main power switch. When the switch is cycled within a 2 second period (typical) the device automatically switches the dimming level to the next step. As a result, dimming can be achieved without replacing any wiring in the original system. There are multiple modes of switch dimming that the user may configure 2 steps or 3 steps, as well as different levels of dimming via the external pins DIM1 and DIM2. IS31LT3918 can also realize LED dimming using an external PWM signal. It can accept a PWM signal from 0% to 100% duty cycle. The LED current may also be adjusted linearly by applying an analog input voltage in the range of 0.5V to 2.5V. IS31LT3918 adopts a peak current mode control architecture, which eliminates the need for any additional loop compensation while maintaining a good degree of constant output current regulation. FEATURES User configurable switch dimming levels 3% output current accuracy Over current, voltage and temperature protection High efficiency (typical up to 95%) Wide input voltage range: 6VDC~450VDC or 85Vac~ 265Vac Linear and PWM dimming Very few external components APPLICATIONS DC/DC or AC/DC constant current LED driver Signal and decorative lighting Backlight LED driver TYPICAL APPLICATION CIRCUIT LED+ Switch K D1 D2 85Vac- 265Vac C3 D5 R1 C1 LED- R5 Q2 D3 D4 Fuse C2 L1 DZ D6 R2 R6 VIN DIM1 Q1 Gate CS IS3918 IS31LT3918 C6 C4 DIM2 ADJ GND TOFF R4 R3 Copyright © 2011 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 09/01/2011 1 IS31LT3918 PIN CONFIGURATION Package Pin Configurations SOP-8 PIN DESCRIPTION Pin Name Pin Number DIM1 1 DIM2 2 ADJ 3 GND GATE CS 4 5 6 Toff 7 Vin 8 Description These two pins configure the dimming levels as follows: DIM1=“floating”DIM2=“floating”, no dimming (100% only)； DIM1=“floating”DIM2=“GND” , 100%-30%-100% DIM1=“GND”DIM2=“floating”, 100%-50%-100% DIM1=“GND”DIM2=“GND”, 100%-50%-20%-100% Linear and PWM dimming input pin. Linear dimming range: 0.5V to 2.5V. If VADJ < 0.5V, GATE output is off. If 0.5V ≤ VADJ ≤ 2.5V, VCSTH = VADJ/10. If VADJ > 2.5V, VCSTH = 0.25V. When this pin is floating, there is an internal pull up to 4.5V (typical) and VCSTH = 0.25V. PWM dimming frequency range: 200Hz -1kHz. Ground pin. All internal currents return through this pin. This pin connects to the external NMOS’s gate Current detect pin, uses an external resistor to sense the peak inductor current. This pin sets the off time for the switch by connecting a resistor between this pin and GND. 8V – 450V supply voltage is connected to this pin via an external resistor. It is internally clamped and must be bypassed using a capacitor to GND. ORDERING INFORMATION INDUSTRIAL RANGE: -40°C TO +85°C Order Part No. Package QTY/Reel IS31LT3918–GRLS2-TR SOP-8, Lead-free 2500 Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 09/01/2011 2 IS31LT3918 ABSOLUTE MAXIMUM RATINGS Parameter Range Unit Vin pin to GND -0.3 – 6.0 V DIM1,DIM2,CS, ADJ, GATE, Toff pin to GND -0.3 - 6.0 V 10 mA Junction temperature -40 – 150 ℃ Device storage temperature -65 - 150 ℃ ESD（Human Body model） 3500 V Vin pin input current (Note1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (The specifications are at TA=25°C and VINDC=10V (Note 2), RIN =10K, unless otherwise noted) Symbol Parameter Conditions Supply voltage connected to Min Typ Max Unit 4.3 5 5.5 V Vclamp Vin PIN clamp voltage UVLO Undervoltage lockout △UVLO UVLO hysteresis IIN Quiescent Current Vin=5V 300 400 uA IIN,UV Input current in UVLO Vin=4V 90 120 uA VCSTH Current sense threshold ADJ=5V 245 250 255 mV TBLANK Current sense blanking time VCS=VCSTH+50mV 445 500 650 ns Toff Off time REXT=250KΩ 9.8 10 10.2 us Vin via an appropriate resistor Vin rising PWM input voltage high threshold VADJ (Note 3) 4.8 V 400 mV 2.5 PWM input voltage low threshold 0.25 Linear dimming input voltage range 0.5 0.5 V 0.75 V 2.5 V ISOURCE GATE source current GATE=0 75 90 mA ISINK GATE sink current GATE=5V 75 90 mA TP Over temperature protection threshold △TP VOCP Toff_reset TMAX Over temperature protection hysteresis Over current protection CS voltage threshold Over current protection Toff delay time Maximum switch off time for switch dimming ADJ=5V,CS rising 0.35 150 o C 20 o C 0.4 0.45 V 500 us 2 s Notes: 1. Beyond the input current range, Vin pin may not clamp at 5V. 2. VIN is the input voltage. When VIN>5V, input voltage connected to Vin pin should via a appropriate resistor. 3. When VADJ>2.5V, Iout is 100% output current. When VADJ<0.5V, Iout is shutdown. When 0.5V ≤VADJ≤2.5V, Iout is linear dimming. Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 09/01/2011 3 IS31LT3918 Input Voltage Regulation APPLICATION INFORMATION IS31LT3918 is a peak current control LED driver IC. It The VIN pin is internally clamped at 5V (typical). does not require any high side current sensing or the When supplying a voltage larger than 5V, an external design of any closed loop control, but provides a very resistor must be used between the input voltage and accurate constant LED driving current. IS31LT3918 the VIN pin. Bypass the VIN pin using a low ESR includes an dimming input allowing either a PWM or an capacitor to provide a high frequency path to GND. The analog dimming signal. current required by the device is 0.3mA plus the switching current of the external switch. The switching An external resistor connected to the Toff pin frequency of the external NMOS affects the amount of determines the internal oscillator’s constant off time. current required, as does the NMOS’s gate charge The off time adds to the on time, controlled by the requirement (found on the NMOS data sheet). internal switching control logic, to set the oscillation IIN 0.3mA QG fS frequency. The inductor current increases when the switch is on. This current also flows through the In the above equation, fS is the switching frequency, QG external current sense resistor RCS, and when the is the external NMOS gate charge (from the NMOS voltage across RCS reaches the current sense threshold, datasheet). VCSTH or 1/10 of the ADJ input voltage, whichever is lower, the switch turns off. The current through the Current Detection inductor will continue to flow through the LEDs, but will The voltage input to the CS pin is provided to two decrease linearly during the switch off time. After the internal comparators. One of the comparators uses a programmed off-time, the switch will turn on again. A fixed 250mV reference, while the other uses a scaled short blanking time of 500ns (typical) is implemented to value of the ADJ pin voltage as reference. The outputs block the voltage spike encountered across RCS, of the comparators are ORed, thus causing the lower of caused by the parasitic capacitance of the switch the two thresholds to trigger the switch control logic. At discharging. After the blanking time the control logic the moment the switch control logic changes the gate again compares the CS input voltage to the current signal to low, the TOFF timer is started. The external sense threshold. switch will remain off for the length of time programmed, and once the TOFF time is expired, the switch control Choose the acceptable level of ripple current, K，then logic again toggles the gate signal, this time from low to calculate the value of the current sense resistor: high, and the external switch turns on. As the external RCS VCSTH (1 K / 2) I LED switch turns on, the parasitic capacitance on the drain of the switch must discharge through the switch channel causing a spike of current which can be quite VCSTH: If VADJ < 0.5V, GATE output is off. If 0.5V ≤ VADJ ≤ 2.5V, VCSTH = VADJ/10. If VADJ > 2.5V, VCSTH = 0.25V. When ADJ pin is floating, there is an internal pull up to 4.5V (typical) and VCSTH = 0.25V. K: acceptable current ripple, the recommended value large, but only lasts for a very short period of time. To range is 1~1.8. sufficient to prevent false triggering of the CS threshold A constant off-time peak current control scheme can easily operate at duty cycles greater than 0.5 and also gives inherent input voltage rejection making the LED current almost insensitive to input voltage variations. prevent this current from causing a false trip of the current sense comparators, the signal is blocked from the internal comparators for 500ns (typical). In some special cases, the 500ns blanking time may not be logic. Under these circumstances, an additional RC filter may be added to the CS input pin to help filter out the voltage spike. Carefully layout of the PCB to minimize parasitic capacitance, trace resistance and inductance greatly aids in the elimination of false triggering. Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 09/01/2011 4 IS31LT3918 Oscillator output current is： IS31LT3918’s TOFF pin controls the off time of the a) 100% at power on. internal oscillator. Oscillator off time is determined by b) The first switch dimming action causes the current to change to 30%. the following equation: c) A second switch dimming action causes the Toff ( s ) 40 10 12 REXT current to return to 100%. REXT：resistor connected between TOFF and GND d) A third switch dimming action has the same Switch Dimming e) Subsequent switch dimming actions causes effect as the first switch dimming action. the cycle to continue. IS31LT3918 detects the external switch action of the main power switch, and can automatically adjust the 3. When DIM1 is GND and DIM2 is floating, the level of the output current based on the action of the dimming sequence is as described in (2) above, main power switch. except that the current sequence is 100%-50%-100%. The action of the external power switch can be divided 4. When both DIM1 and DIM2 are connected to GND, into two types. The first is “normal switch operation” in the dimming sequence is as described in (2) above, which the switch is toggled from ON to OFF, remaining except that the current sequence is OFF for longer than 2 seconds (typical). The second is 100%-50%-20%-100%. “switch dimming action” in which the switch is toggled If the switch is operated normally, that is, switched on from ON to OFF and back ON within 2 seconds once after being in the OFF position for a long time, or if (typical). both the DIM1 and DIM2 pins are floating, then the When the device is in normal switch operation, it merely output current always starts up at the initial value of powers on in the first state when the power switch is 100%. toggled to ON, and the device turns off when the Note: Because the main power switch is used to initiate external power switch is changed to OFF. the switch dimming function, the device must have a Switch dimming output current levels are configured by large enough external capacitor on VIN to maintain connecting the DIM1 and DIM2 pins as indicated in the device operation for 2 seconds. table below： Applications Examples for specific values. Please refer to the DIM1 DIM2 Dimming levels Linear Dimming Floating Floating No Dimming An external voltage, 0.5V to 2.5V, connected to the ADJ Floating GND 2 levels：100%-30%-100% pin can adjust the LED current. Two possible situations GND Floating 2 levels：100%-50%-100% might be used are： GND GND 3 levels：100%-50%-20%-100% If it is not possible to change the value of RCS to obtain the desired value of LED current, an external voltage When operating in switch dimming mode, normally the reference can be connected to the ADJ pin to adjust the device will always power up at 100% output current. voltage sense level across RCS, equivalent to changing The operation of the power switch and the configuration the value of RCS. of the DIM1 and DIM2 pins control the dimming process Connecting a resistor between the VIN and ADJ pin, as follows： then connecting a thermistor from the ADJ pin to GND 1. When DIM1 and DIM2 pins are both floating, there can adjust the LED current based on temperature, thus is no switch dimming, and the output current is 100% realizing the temperature compensation feature. of the programmed value when the power is on. 2. When DIM1 is floating and DIM2 is GND, the Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 09/01/2011 5 IS31LT3918 PWM Dimming PWM signal does not shut down the other circuit blocks PWM dimming may be realized by applying a low of the device, thus the response to the PWM signal is frequency PWM waveform to the ADJ pin. When the relatively fast, and primarily determined by the rise and PWM signal is low, less than 0.5V, the IS31LT3918 fall time of the inductor current. remains off；When the PWM signal is high, greater than To disable PWM dimming, just leave the ADJ pin not 2.5V, the driver is enabled and operates normally. connected. Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 09/01/2011 The 6 IS31LT3918 Application Example DC Input Voltage： VINAC =220V =R4 with 1% precision. 4. Inductor（L1） Output：Vo=40V（12, 1W LEDs in series, Vf=3.3V） The inductance of inductor L1 is dependent on the LED ILED=0.35A current, in this case 350mA. 1. Vin power supply circuit Toff=15.6uS, thus: Refer to the Typical Application Circuit. The circuit consists of R1, C2, DZ, R5, Q1, Q2, D6, R2, C4, C6. R1, C2 and DZ, provide a steady, approximately 12V to the gate of Q2. MOS Q2 starts in conduction state, L We have already chosen VO TOFF VO TOFF 40 15.6 10 6 1mH I Ripple K I LED 1.8 0.35 Where, Iripple is the design target for ripple current. and begins to charge C4 via R2 and D6. When Vin reaches about 5V, the device starts to operate. Component Parameters: R1=0.5MΩ, C1=22uF, 5. Freewheeling diode (D5) and NMOS (Q1, Q2) Choose Q2 to have a voltage rating at least as large as C2=10uF, DZ=12V, D6=SS16, R2=3KΩ, C4=10uF, the maximum input voltage with approximately 50% C6=10uF, R5=150Ω。 margin. V FET =1.5×V INDC 2. Off time（TOFF） Off time is given by： Toff ( s ) 40 10 12 REXT The current through the NMOS is based on the peak LED current, choose FET current rating with 50% margin. To decide the off time, assume the desired switching I FET =I PEAK *150% frequency is 50kHz, and the duty cycle is 18.2% (the duty cycle is decided by the ratio of the output voltage Thus, select 600V, 2A, NMOS, such as: 2N60 and input voltage), then Toff is 16.36uS, REXT =409K , choose the closest resistor, REXT =390k =R3， Toff=15.6uS. Q1 peak voltage is dependent on the DC input voltage to the device. The recommended NMOS is AP2306 (30V, 5A). 3. Current Sense Resistor（RCS） The current sense resistor is given by： RCS VCSTH R4 (1 K / 2) I LED K is the ripple current coefficient. Assuming a typical The diode ratings are equal to that of the NMOS, Q2. Note: The diode must be a superfast recovery diode and the Reverse Recovery Time(TRR) should be less than 50nS. Thus, select 600V, 1A, superfast recovery diode, such as: ES1J value for K of 1.8, RCS=0.376 , choose RCS=0.38 Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 09/01/2011 7 IS31LT3918 Appendix: Typical application circuit of DC voltage input using a single External NMOS Vin DC 6-150V LED+ D1 Cin Cout Rin LEDL1 VIN Gate DIM1 CS Q1 IS3918 IS31LT3918 DIM2 ADJ GND TOFF Cin Rcs Roff Note: In the above configuration, it is important to pay attention to the VGSON value for Q1. 4.5V (typ), thus requiring that a low threshold voltage NMOS be used. Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 09/01/2011 IS31LT3918 provides a maximum gate drive of 8 IS31LT3918 CLASSIFICATION REFLOW PROFILES Profile Feature Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to Tp) Liquidous temperature (TL) Time at liquidous (tL) Peak package body temperature (Tp)* Time (tp)** within 5°C of the specified classification temperature (Tc) Average ramp-down rate (Tp to Tsmax) Time 25°C to peak temperature Pb-Free Assembly 150°C 200°C 60-120 seconds 3°C/second max. 217°C 60-150 seconds Max 260°C Max 30 seconds 6°C/second max. 8 minutes max. Classification Profile Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 09/01/2011 9 IS31LT3918 TAPE AND REEL INFORMATION Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 09/01/2011 10 IS31LT3918 PACKAGE INFORMATION SOP-8 g n i w a r D e n i l t u O e g a k c a P 8 0 D # 51 7 2 . . 00 0 74 2. . 0 1 0 07 1 . . 4 5 00 0 8 . . 4 3 00 2 8 . . 6 5 80 C S B 7 2 . 1 13 5 3 . . 0 0 50 2. 1 . 0 0 53 5 7 . . 1 1 53 5 5 . . 1 1 11 Integrated Silicon Solution, Inc. – www.issi.com Rev. A, 09/01/2011