Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers tm Features Description ■ Low current – 0.5mA The 6N138/9 and HCPL2730/HCPL2731 optocouplers consist of an AlGaAs LED optically coupled to a high gain split darlington photodetector. ■ Superior CTR-2000% ■ Superior CMR-10kV/µs ■ CTR guaranteed 0–70°C The split darlington configuration separating the input photodiode and the first stage gain from the output transistor permits lower output saturation voltage and higher speed operation than possible with conventional darlington phototransistor optocoupler. In the dual channel devices, HCPL2730/HCPL2731, an integrated emitter-base resistor provides superior stability over temperature. ■ U.L. recognized (File # E90700) ■ VDE recognized (File # 120915) Ordering option V, e.g., 6N138V ■ Dual Channel – HCPL2730, HCPL2731 Applications ■ Digital logic ground isolation The combination of a very low input current of 0.5mA and a high current transfer ratio of 2000% makes this family particularly useful for input interface to MOS, CMOS, LSTTL and EIA RS232C, while output compatibility is ensured to CMOS as well as high fan-out TTL requirements. An internal noise shield provides exceptional common mode rejection of 10 kV/µs. ■ Telephone ring detector ■ EIA-RS-232C line receiver ■ High common mode noise line receiver ■ µP bus isolation ■ Current loop receiver Schematic Package 8 VCC N/C 1 + 1 V + 2 8 VCC 8 F1 1 7 VB _ 2 6 VO _ 7 V01 V F _ 3 3 6 V02 8 V F2 5 GND N/C 4 6N138 / 6N139 ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3 + 4 5 GND 8 1 1 HCPL2730 / HCPL2731 www.fairchildsemi.com Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers April 2007 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter TSTG Storage Temperature TOPR Operating Temperature TSOL Lead Solder Temperature (Wave solder only. See recommended reflow profile graph for SMD mounting) Value Units -55 to +125 °C -40 to +85 °C 260 for 10 sec °C EMITTER IF (avg) DC/Average Forward Input Current Each Channel 20 mA IF (pk) Peak Forward Input Current (50% duty cycle, 1 ms P.W.) Each Channel 40 mA IF (trans) Peak Transient Input Current - (≤1µs P.W., 300 pps) 1.0 A VR Reverse Input Voltage Each Channel 5 V PD Input Power Dissipation Each Channel 35 mW DETECTOR IO (avg) Each Channel 60 mA VER Emitter-Base Reverse Voltage (6N138 and 6N139) 0.5 V VCC, VO Supply Voltage, Output Voltage (6N138, HCPL2730) -0.5 to 7 V (6N139, HCPL2731) -0.5 to 18 PO Average Output Current Output Power Dissipation Each Channel 100 mW Electrical Characteristics (TA = 0 to 70°C unless otherwise specified) Individual Component Characteristics Symbol Parameter Test Conditions Device Min. Typ.* Max. Unit All 1.30 V EMITTER VF Input Forward Voltage TA = 25°C Each channel (IF = 1.6mA) BVR Input Reverse Breakdown Voltage (TA = 25°C, IR = 10µA) 1.7 1.75 All 5.0 20 V All -1.8 mV/°C 6N139 0.01 100 0.01 250 6N138 6N139 0.4 1.5 (IF1 = IF2 = 1.6mA, VCC = 18V) HCPL2731 1.3 3 (VO1 - VO2 = Open, VCC = 7V HCPL2730 6N138 6N139 0.05 10 (IF1 = IF2 = 0mA, VCC = 18V) HCPL2731 0.10 20 (VO1 - VO2 = Open, VCC = 7V HCPL2730 Each Channel (∆VF /∆TA) Temperature coefficient of forward voltage (IF = 1.6mA) DETECTOR IOH Logic HIGH output current (IF = 0mA, VO = VCC = 18V) Each Channel (IF = 0mA, VO = VCC = 7V) Each Channel ICCL ICCH Logic LOW supply Logic HIGH supply (IF = 1.6mA, VO = Open) (VCC = 18V) (IF = 0mA, VO = Open, VCC = 18V) µA HCPL2731 6N138 HCPL2730 mA µA *All Typicals at TA = 25°C ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3 www.fairchildsemi.com 2 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers Absolute Maximum Ratings (TA = 25°C unless otherwise specified) Symbol Parameter Test Conditions Device Min. Typ.* 6N139 400 1100 Max. Unit COUPLED CTR Current transfer ratio (Note 1, 2) (IF = 0.5mA, VO = 0.4 V, VCC = 4.5V) Each Channel (IF = 1.6mA, VO = 0.4 V, VCC = 4.5V) Each Channel (IF = 1.6mA, VO = 0.4 V, VCC = 4.5V) Each Channel VOL Logic LOW output voltage output voltage (Note 2) (IF = 0.5mA, IO = 2mA, VCC = 4.5V) (IF = 1.6mA, IO = 8mA, VCC = 4.5V) Each Channel (IF = 0.5mA, IO = 15mA, VCC = 4.5V) Each Channel (IF = 12mA, IO = 24mA, VCC = 4.5V) Each Channel (IF = 1.6mA, IO = 4.8mA, VCC = 4.5V) Each Channel HCPL2731 6N139 3500 500 HCPL2731 6N138 % 1300 2500 300 1300 HCPL2730 2500 6N139 0.08 0.4 6N139 0.01 0.4 0.13 0.4 0.20 0.4 0.10 0.4 V HCPL2731 6N139 HCPL2731 6N139 HCPL2731 6N138 HCPL2730 *All Typicals at TA = 25°C ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3 www.fairchildsemi.com 3 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers Transfer Characteristics (TA = 0 to 70°C unless otherwise specified) Symbol Parameter TPHL Propagation delay time to logic LOW (Note 2) (Fig. 24) Test Conditions Device (RL = 4.7Ω, IF = 0.5mA) Min. 6N139 (RL = 4.7Ω, IF = 0.5mA) 4 HCPL2731 3 6N139 (RL = 270Ω, IF = 12mA) TA = 25°C (RL = 2.2Ω, IF = 1.6mA) (RL = 2.2Ω, IF = 1.6mA) TPLH Propagation delay time to logic HIGH (Note 2) (Fig. 24) TA = 25°C (RL = 4.7Ω, IF = 0.5mA) Each Channel (RL = 4.7Ω, IF = 0.5mA) TA = 25°C Each Channel (RL = 270Ω, IF = 12mA) TA = 25°C (RL = 2.2Ω, IF = 1.6mA) Each Channel (RL = 2.2Ω, IF = 1.6mA) TA = 25°C Each Channel |CMH| |CML| Common mode transient immunity at logic HIGH (Note 3) (Fig. 25) (IF = 0mA, |VCM| = 10VP-P) TA = 25°C, (RL = 2.2Ω) Common mode transient immunity at logic LOW (Note 3) (Fig. 25) (IF = 1.6mA, |VCM| = 10VP-P, RL = 2.2Ω) TA = 25°C Each Channel Each Channel 1 0.3 2 3 HCPL2731 6N138 15 HCPL2731 HCPL2730 1.5 10 1 20 25 6N139 90 µs HCPL2731 6N139 12 HCPL2731 22 6N139 60 10 TA = 25°C (RL = 270Ω, IF = 12mA) Each Channel 0.2 HCPL2730 TA = 25°C Each Channel 100 2 TA = 25°C Each Channel µs 25 120 TA = 25°C (RL = 270Ω, IF = 12mA) Max. Unit 30 TA = 25°C Each Channel Typ.* HCPL2730 HCPL2731 1.3 7 5 10 15 6N138 50 HCPL2730/1 6N138 7 HCPL2730/1 16 6N138 6N139 35 1,000 10,000 V/µs 1,000 10,000 V/µs HCPL2730 HCPL2731 6N138 6N139 HCPL2730 HCPL2731 ** All Typicals at TA = 25°C ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3 www.fairchildsemi.com 4 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers Switching Characteristics (TA = 0 to 70°C unless otherwise specified., VCC = 5V) Symbol II-O Characteristics Input-output insulation leakage current (Note 4) VISO Withstand insulation test voltage (Note 4) RI-O Resistance (input to output) (Note 4) CI-O Capacitance (input to output) (Note 4, 5) Test Conditions Min. Typ.* (Relative humidity = 45%) (TA = 25°C, t = 5 s) (VI-O = 3000VDC) (RH ≤ 50%, TA = 25°C, II-O ≤ 2µA) ( t = 1 min.) 2500 Max. Unit 1.0 µA VRMS 1012 Ω 0.6 pF (RH ≤ 45%, VI-I = 500VDC) t = 5 s, (HCPL2730/2731 only) 0.005 µA (VI-O = 500VDC) (f = 1MHz) II-I Input-Input Insulation leakage current (Note 6) RI-I Input-Input Resistance (Note 6) (VI-I = 500VDC) (HCPL2730/2731 only) 1011 Ω CI-I Input-Input Capacitance (Note 6) (f = 1 MHz) (HCPL2730/2731 only) 0.03 pF ** All Typicals at TA = 25°C Notes: 1. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%. 2. Pin 7 open. (6N138 and 6N139 only) 3. Common mode transient immunity in logic HIGH level is the maximum tolerable (positive) dVcm/dt on the leading edge of the common mode pulse signal VCM, to assure that the output will remain in a logic HIGH state (i.e., VO > 2.0V). Common mode transient immunity in logic LOW level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic LOW state (i.e., VO < 0.8V). 4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together. 5. For dual channel devices, CI-O is measured by shorting pins 1 and 2 or pins 3 and 4 together and pins 5 through 8 shor ted together. 6. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together. I ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3 www.fairchildsemi.com 5 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers Isolation Characteristics (TA = 0 to 70°C unless otherwise specified) Current Limiting Resistor Calculations R1 (Non-Invert) = VDD1 - VDF - VOL1 OUTPUT IF R1 (Invert) = VDD1 - VOH1 - VDF INPUT R1 (V) IF R2 = VDD2 - = VOLX (@ IL - I2) IL Where: CMOS @ 5V NON-INV. 2000 CMOS @ 10V NON-INV. 5100 74XX NON-INV. 2200 VDD1 - Input Supply Voltage INV. 74LXX VDF - Diode Forward Voltage INV. 74SXX 74SXX 74LSXX 74HXX R2 (V) R2 (V) R2 (V) R2 (V) R2 (V) R2 (V) R2 (V) 1000 2200 750 1000 1000 1000 560 NON-INV. 1800 100 NON-INV. 2000 360 74LSXX NON-INV. 2000 IF - Diode Forward Current INV. VOLX - Saturation Voltage of Output Transistor 180 74HXX NON-INV. 2000 INV. IL - Load Current Through Resistor R2 180 Fig. 1 Resistor Values for Logic Interface I2 - Input Current of Output Gate VDD2 VDD1 IN 74LXX 180 INV. VOH1 - Logic “1” Voltage of Driver 74XX 4700 INV. VOL1 - Logic “0” Voltage of Driver CMOS @ 10V 510 INV. VDD2 - Output Supply Voltage CMOS @ 5V 1 8 2 7 3 6 VDD2 R2 R1 IN 5 Fig. 2 Non-Inverting Logic Interface ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3 8 2 7 3 6 4 5 R2 OUT R1 OUT 4 1 Fig. 3 Inverting Logic Interface www.fairchildsemi.com 6 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers Electrical Characteristics (TA = 25°C unless otherwise specified) Fig. 5 LED Forward Voltage vs. Temperature 100 1.5 IF = 1.6 mA FORWARD VOLTAGE - VF (V) FORWARD CURRENT - IF (mA) 10 TA = 85˚C 1 TA = 70˚C 0.1 1.4 1.3 1.2 0.01 TA = 25˚C TA = -40˚C TA = 0˚C 0.001 1.0 1.1 1.1 1.2 1.3 1.4 1.5 1.6 -40 -20 0 20 40 60 80 100 FORWARD VOLTAGE - VF (V) TEMPERATURE - TA (˚C) Fig. 6 Non-saturated Rise and Fall Times vs. Load Resistance (6N138 / 6N139 Only) Fig. 7 Non-saturated Rise and Fall Times vs. Load Resistance (HCPL2730 / HCPL2731 Only) 100 TA = 25˚C TA = 25˚C tf tf TIME - µs TIME, T (µs) 10 10 tr tr 1 IF ADJUSTED FOR VOL = 2 V 1 0.1 1 10 0.1 1 RL - LOAD RESISTANCE (kΩ) RL - LOAD RESISTANCE (kΩ) Fig. 8 Propagation Delay To Logic Low vs. Base-Emitter Resistance (HCPL2730 / HCPL2731 Only) Fig. 9 Current Transfer Ratio vs. Forward Current (6N138 / 6N139 Only) 6 IF = 1.6 mA, VCC = 5 V RL = 2.2 K, TA = 25°C Normalized to RBE = None 5 1600 CURRENT TRANSFER RATIO - CTR (%) TPHL - PROPAGATION DELAY TO LOGIC LOW - (µs) 10 4 3 2 1 0 0.01 0.1 1 1200 TA = 85˚C 800 TA = 70˚C TA = 25˚C 400 TA = 0˚C TA = -40˚C 0 10 0.01 RBE - BASE-EMITTER RESISTANCE - MΩ ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3 VCC = 5 V VO= 0.4 V 0.1 1 10 IF - FORWARD CURRENT - mA www.fairchildsemi.com 7 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers Fig. 4 LED Forward Current vs. Forward Voltage Fig. 11 Current Transfer Ratio vs. Forward Current (HCPL2730 / HCPL2731 Only) 5000 VCC = 5 V VO = 0.4 V 1400 CTR - CURRENT TRANSFER RATIO - % CTR - CURRENT TRANSFER RATIO (%) 1600 1200 1000 800 600 400 IF = 1.6 mA VCC = 5 V VO = 0.4 V 200 0 1 10 100 4000 TA = 85˚C TA = 25˚C 3000 TA = 0˚C 2000 TA = -40˚C 1000 0 1000 TA = 70˚C 0.1 1 RBE - BASE RESISTANCE (kΩ) 100 IF - FORWARD CURRENT - mA Fig. 12 Output Current vs Output Voltage (6N138 / 6N139 Only) Fig. 13 Output Current vs Output Voltage (HCPL2730 / HCPL2731 Only) 120 60 5 mA VCC = 5V TA = 25˚C 4.5 mA 4 mA IF = 5.0 mA TA = 25˚C VCC = 5.0 V 3.5 mA IF = 4.5 mA 100 50 IF = 4.0 mA IO-OUTPUT CURRENT - mA 3 mA IO - OUTPUT CURRENT (mA) 10 2.5 mA 40 2 mA 30 1.5 mA 20 IF = 3.5 mA 80 IF = 3.0 mA IF = 2.5 mA IF = 2.0 mA 60 IF = 1.5 mA IF = 1.0 mA 40 1 mA 20 10 IF = 0.5 mA 0 0 1 2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VO - OUTPUT VOLTAGE (V) VO - OUTPUT VOLTAGE (V) Fig. 14 Output Current vs. Input Diode Forward Current (6N138 / 6N139 Only) Fig. 15 Output Current vs Input Diode Forward Current (HCPL2730 / HCPL2731 Only) 100 2.0 VCC = 5.0 V VO = 0.4 V TA = 85˚C VCC = 5 V VO = 0.4 V IO - OUTPUT CURRENT - mA IO - OUTPUT CURRENT (mA) 10 100 1.8 1 TA = 85˚C TA = 70˚C 0 10 TA = 25˚C 1 TA = -40˚C TA = 25˚C TA = 0˚C TA = -40˚C 0 0.01 0.1 0.1 1 0.1 10 IF - INPUT DIODE FORWARD CURRENT - mA ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3 1 10 100 IF - INPUT DIODE FORWARD CURRENT - mA www.fairchildsemi.com 8 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers Fig. 10 Current Transfer Ratio vs. Base-Emitter Resistance (6N138 / 6N139 Only) Fig. 17 Logic Low Supply Current vs. Input Diode Forward Current (HCPL2730 / HCPL2731 Only) 100 4.0 ICCL - LOGIC LOW SUPPLY CURRENT - mA ICCL - LOGIC LOW SUPPLY CURRENT (mA) TA = 25˚C 3.5 3.0 2.5 VCC = 5 V 2.0 VCC = 18 V 1.5 1.0 0.5 HCPL2731 VCC = 18 V 10 HCPL2730 HCPL2731 VCC = 7 V 1 0.1 0.0 0 2 4 6 8 10 12 14 16 0.1 1 IF - FORWARD CURRENT (mA) 100 IF - INPUT DIODE FORWARD CURRENT - mA Fig. 18 Propagation Delay vs. Input Diode Forward Current (6N138 / 6N139 Only) Fig. 19 Propagation Delay vs. Input Diode Forward Current (HCPL2730 / HCPL2731 Only) 70 70 VCC = 5 V TA = 25˚C VCC = 5 V TA = 25˚C 60 60 tP - PROPAGATION DELAY - µs tP - PROPAGATION DELAY - µs 10 50 (tPHL) RL = 2.2 kΩ or 4.7 kΩ 40 30 20 (tPLH) RL = 4.7 kΩ 10 50 (tPHL) RL = 2.2 kΩ or 4.7 kΩ 40 30 (tPLH) RL = 4.7 kΩ 20 (tPLH) RL = 2.2 kΩ 10 (tPLH) RL = 2.2 kΩ 0 0 0 1 2 3 4 5 6 7 8 9 0 10 IF - INPUT DIODE FORWARD CURRENT - mA 4 6 8 10 Fig. 21 Propagation Delay to Logic Low vs. Pulse Period Fig. 20 Propagation Delay to Logic Low vs. Pulse Period (6N138 / 6N139 Only) (HCPL2730 / HCPL2731 Only) 100 100 tPHL - PROPAGATION DELAY to LOGIC LOW - µs tPHL - PROPAGATION DELAY to LOGIC LOW - µs 2 IF - INPUT DIODE FORWARD CURRENT - mA 6N139 IF = 0.5 mA RL = 4.7 kΩ 10 6N138 IF = 1.6 mA RL = 2.2 kΩ 1 10 HCPL2731 IF = 0.5 mA RL = 4.7 kΩ 1 HCPL2730 HCPL2731 IF =1.6 mA RL = 2.2kΩ TA = 25˚C TA = 25˚C 0.1 0.01 0.1 1 0.1 0.01 10 T - INPUT PULSE PERIOD - ms ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3 0.1 1 10 T - INPUT PULSE PERIOD - ms www.fairchildsemi.com 9 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers Fig. 16 Logic Low Supply Current vs. Input Diode Forward Current (6N138 / 6N139 Only) Fig. 23 Propagation Delay vs. Temperature (HCPL2730 / HCPL2731 Only) 50 50 HCPL2730 : IF = 1.6 mA, RL = 2.2 k HCPL2731 : IF = 0.5 mA, RL = 4.7 k 40 40 tP - PROPAGATION DELAY - µs tP - PROPAGATION DELAY - µs HCPL2730 : IF = 1.6 mA, RL = 2.2 k HCPL2731 : IF = 0.5 mA, RL = 4.7 k tPLH (HCPL2731) 30 20 tPLH (HCPL2730) tPHL (HCPL2731) 10 tPHL (HCPL2730) 0 tPLH (HCPL2731) 30 20 tPLH (HCPL2730) tPHL (HCPL2731) 10 tPHL (HCPL2730) 0 0 10 20 30 40 50 60 70 80 0 TA - TEMPERATURE (˚C) ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3 10 20 30 40 50 60 70 80 TA - TEMPERATURE (˚C) www.fairchildsemi.com 10 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers Fig. 22 Propagation Delay vs. Temperature (6N138 / 6N139 Only) Noise Shield 8 2 7 3 6 VCC VB Pulse Generator tr = 5ns Z O = 50V +5 V VF VO Rm - IF MONITOR 0.1 µF 5 + C L = 15 pF* Test Circuit for 6N138, 6N139 2 7 3 6 4 5 VCC +5 V RL V01 0.1 µF VO C L = 15 pF* V02 VF2 Rm GND 8 VF1 VO I F Monitor 4 1 10% DUTY CYCLE I/f < 100 µS RL Noise Shield + IF GND Test Circuit for HCPL2730 and HCPL2731 IF 5V VO 1.5 V 1.5 V VOL TPHL TPLH Fig. 24 Switching Time Test Circuit IF 1 Noise Shield 8 VCC + +5 V IF 2 7 VB 8 VCC VF1 - RL +5 V RL 2 7 3 6 4 5 V01 A VF A B Noise Shield 1 3 6 VO 4 5 + GND - VFF 0.1 µF VFF 0.1 µF B VO VO VF2 + - V02 GND VCM - + Pulse Gen VCM - Pulse Gen Test Circuit for 6N138 and 6N139 Test Circuit for HCPL2730 and HCPL2731 VCM 10 V 0V 90% 90% 10% 10% tr tf VO 5V Switch at A : IF = 0 mA VO VOL Switch at B : I F = 1.6 mA Fig. 25 Common Mode Immunity Test Circuit ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3 www.fairchildsemi.com 11 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers Pulse Generator IF tr = 5ns Z O = 50 V 10% D.C. I/ f< 100ns 1 Dimensions are in inches (millimeters) unless otherwise noted. Through Hole Surface Mount PIN 1 ID. 4 3 2 0.390 (9.91) 0.370 (9.40) 1 4 3 2 1 0.270 (6.86) 0.250 (6.35) 5 6 7 8 0.270 (6.86) 0.250 (6.35) 0.390 (9.91) 0.370 (9.40) SEATING PLANE PIN 1 ID. 5 6 8 7 0.070 (1.78) 0.045 (1.14) 0.020 (0.51) MIN 0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 0.016 (0.40) 0.008 (0.20) 0.100 (2.54) TYP 0.300 (7.62) TYP 0.070 (1.78) 0.045 (1.14) 0.020 (0.51) MIN 0.200 (5.08) 0.140 (3.55) 15° MAX 0.045 [1.14] 0.022 (0.56) 0.016 (0.41) 0.300 (7.62) TYP 0.315 (8.00) MIN 0.100 (2.54) TYP 0.405 (10.30) MIN Lead Coplanarity : 0.004 (0.10) MAX Recommended Pad Layout for Surface Mount Leadform 0.4" Lead Spacing 4 3 2 PIN 1 ID. 1 0.070 (1.78) 0.270 (6.86) 0.250 (6.35) 5 6 7 0.060 (1.52) 8 0.100 (2.54) 0.390 (9.91) 0.370 (9.40) SEATING PLANE 0.016 (0.41) 0.008 (0.20) 0.295 (7.49) 0.415 (10.54) 0.070 (1.78) 0.045 (1.14) 0.030 (0.76) 0.004 (0.10) MIN 0.200 (5.08) 0.140 (3.55) 0.154 (3.90) 0.120 (3.05) 0.022 (0.56) 0.016 (0.41) 0.016 (0.40) 0.008 (0.20) 0.100 (2.54) TYP ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3 0° to 15° 0.400 (10.16) TYP www.fairchildsemi.com 12 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers Physical Dimensions Option Example Part Number Description No Suffix 6N138 S 6N138S SD 6N138SD Surface Mount; Tape and reel W 6N138W 0.4" Lead Spacing V 6N138V WV 6N138WV SV 6N138SV SDV 6N138SDV Standard Through Hole Device, 50 pcs per tube Surface Mount Lead Bend VDE0884 VDE0884; 0.4” lead spacing VDE0884; surface mount VDE0884; surface mount; tape and reel Marking Information 1 V 3 2730 2 XX YY T1 6 5 4 Definitions 1 Fairchild logo 2 Device number 3 VDE mark (Note: Only appears on parts ordered with VDE option – See order entry table) 4 Two digit year code, e.g., ‘07’ 5 Two digit work week ranging from ‘01’ to ‘53’ 6 Assembly package code ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3 www.fairchildsemi.com 13 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers Ordering Information 12.0 ± 0.1 4.90 ± 0.20 4.0 ± 0.1 Ø1.55 ± 0.05 4.0 ± 0.1 0.30 ± 0.05 1.75 ± 0.10 7.5 ± 0.1 13.2 ± 0.2 10.30 ± 0.20 Ø1.6 ± 0.1 10.30 ± 0.20 0.1 MAX 16.0 ± 0.3 User Direction of Feed Reflow Profile Temperature (°C) 300 215 C, 10–30 s 250 225 C peak 200 150 Time above 183C, 60–150 sec 100 50 Ramp up = 3C/sec 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 Time (Minute) • Peak reflow temperature: 225C (package surface temperature) • Time of temperature higher than 183C for 60–150 seconds • One time soldering reflow is recommended ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3 www.fairchildsemi.com 14 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers Tape Specifications ® ACEx Across the board. Around the world.™ ActiveArray™ Bottomless™ Build it Now™ CoolFET™ CROSSVOLT™ CTL™ Current Transfer Logic™ DOME™ 2 E CMOS™ ® EcoSPARK EnSigna™ FACT Quiet Series™ ® FACT ® FAST FASTr™ FPS™ ® FRFET GlobalOptoisolator™ GTO™ HiSeC™ i-Lo™ ImpliedDisconnect™ IntelliMAX™ ISOPLANAR™ MICROCOUPLER™ MicroPak™ MICROWIRE™ Motion-SPM™ MSX™ MSXPro™ OCX™ OCXPro™ ® OPTOLOGIC ® OPTOPLANAR PACMAN™ PDP-SPM™ POP™ ® Power220 ® Power247 PowerEdge™ PowerSaver™ Power-SPM™ ® PowerTrench Programmable Active Droop™ ® QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ ScalarPump™ SMART START™ ® SPM STEALTH™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TCM™ ® The Power Franchise TinyBoost™ TinyBuck™ ® TinyLogic TINYOPTO™ TinyPower™ TinyWire™ TruTranslation™ µSerDes™ ® UHC UniFET™ VCX™ Wire™ ™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Definition Preliminary First Production This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I26 ©2005 Fairchild Semiconductor Corporation 6N138, 5N139, NCPL2730, HCPL2731 Rev. 1.0.3 www.fairchildsemi.com 15 Single-Channel: 6N138, 6N139 Dual-Channel: HCPL2730, HCPL2731 Low Input Current High Gain Split Darlington Optocouplers TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.