LVDS Interface ICs 35bit LVDS Receiver 5:35 DeSerializer BU90R104 No.11057EAT09 ●Description LVDS Interface IC of ROHM "Serializer" "Deserializer" operates from 8MHz to 150MHz wide clock range, and number of bits range is from 35 to 70. Data is transmitted seven times (7X) stream and reduce cable number by 3(1/3) or less. The ROHM's LVDS has low swing mode to be able to expect further low EMI. ●Features 1) Five channels of LVDS data stream are converted to 35bits data of parallel LVCMOS level outputs. 2) 30bits of RGB output data, 5bits of timing and control output data(HSYNC, VSYNC, DE, CTL1 and CTL2) are transmitted available. 3) Support clock frequency from 8MHz up to 112MHz. 4) Support consumer video format including 480i, 480P, 720P and 1080i as well. 5) Support many kinds of PC video formats such as VGA, SVGA, XGA and SXGA. 6) Provide 784Mbps per 1ch or 3.92Gbps per device throughput rate using 112MHz clock rate. 7) User programmable LVCMOS data output triggering timing by using either rising or falling edge of clock. 8) 30bit LVDS transmitter is recommended to use BU8254KVT. ●Applications Flat Panel Display ●Absolute maximum ratings Parameter Ratings Symbol Min. Max. Unit Supply voltage VDD -0.3 4.0 V Input voltage VIN -0.3 VDD+0.3 V Output voltage VOUT -0.3 VDD+0.3 V Storage temperature range Tstg -55 125 ℃ ●Package power Package PD(mW) 700 TQFP64V *1 *2 DERATING(mW/℃) *1 7.0 *2 10.0*2 1000 At temperature Ta > 25℃ Package power when mounting on the PCB board. The size of PCB board :70×70×1.6(mm3) The material of PCB board :The FR4 glass epoxy board.(3% or less copper foil area) ●Recommended operating conditions Parameter Symbol Ratings Min. Typ. Max. Unit Supply voltage VDD 3.0 3.3 3.6 V Supply Noise Voltage VNOZ - - 0.1 V -20 - 85 ℃ 0 - 70 ℃ Operating temperature range www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. Topr 1/17 Condition VDD, LVDD, PVDD Clock frequency from 8MHz up to 90MHz Clock frequency from 90MHz up to 112MHz 2011.02 - Rev.A Technical Note BU90R104 ●Block Diagram LVDS Differential Input RCLK +/－ (8～112MHz) LVCMOS Output + － PLL 7 CLKOUT Sampling Clocks 7 RA +/－ + － Serial to Parallel RB +/－ + － Serial to Parallel RC +/－ + － Serial to Parallel RD +/－ + － Serial to Parallel RE +/－ + － Serial to Parallel RA6-RA0 7 RB6-RB0 7 RC6-RC0 7 RD6-RD0 7 RE6-RE0 LVCMOS Input RESERVE PD OE R/F Fig.1 Block www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 2/17 Diagram 2011.02 - Rev.A Technical Note BU90R104 ●TQFP64V Package Specification Product No. BU90R104 Lot No. 1PIN MARK (Unit : mm) Fig.2 TQFP64V Package www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 3/17 2011.02 - Rev.A Technical Note BU90R104 VDD RA0 RA1 RA2 GND RA3 RA4 RA5 RA6 RB0 RB1 VDD RB2 RB3 RB4 RB5 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 ●Pin Diagram RA- 49 32 RB6 RA+ 50 31 CLKOUT RB- 51 30 GND RB+ 52 29 RC0 LVDD 53 28 RC1 RC- 54 27 RC2 RC+ 55 26 RC3 RCLK- 56 25 RC4 RCLK+ 57 24 RC5 LGND 58 23 VDD RD- 59 22 RC6 RD+ 60 21 RD0 GND 16 RD5 15 RD6 14 RE0 13 RE1 12 RE2 11 9 VDD RE3 10 8 RD4 RE4 17 7 64 RE5 PVDD 6 RD3 RE6 18 5 63 R/F PGND 4 RD2 OE 19 3 62 PD RE+ 2 RD1 RESERVE 20 1 61 GND RE- Fig.3 Pin diagram (Top view) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 4/17 2011.02 - Rev.A Technical Note BU90R104 ●Pin Description Pin Name Pin No. I/O RA+, RA- 50,49 LVDS Input RB+, RB- 52,51 LVDS Input RC+, RC- 55,54 LVDS Input RD+, RD- 60,59 LVDS Input RE+, RE- 62,61 LVDS Input RCLK+, RCLK- 57,56 LVDS Input RA6～RA0 40,41,42,43, 45,46,47 Output RB6～RB0 32,33,34,35, 36,38,39 Output RC6～RC0 22,24,25,26, 27,28,29 Output RD6～RD0 14,15,17,18, 19,20,21 Output RE6～RE0 6,7,8,10, 11,12,13 Output RESERVE 2 Input Reserved input must be “Low” for normal operation. PD 3 Input Power down input for the internal system. H : Normal operation. L : Power down (All output are “Low”). OE 4 Input Power down input for the data output driver. H : Output enable (Normal operation). L : Output disable (All outputs are “Hi-Z”). R/F 5 Input Select input pin for data output clock triggering edge. H : Output data is latched on rising edge. L : Output data is latched on falling edge. VDD 9,23,37,48 Power 3.3V output driver and digital core power supply pin. CLKOUT 31 Output LVCMOS level clock output. GND 1,16,30,44 Ground GND pin for both data output driver cells and the digital cores. LVDD 53 Power Power supply pin for LVDS inputs. LGND 58 Ground Ground pin for LVDS inputs. PVDD 64 Power Power supply pin for PLL core. PGND 63 Ground Ground pin for PLL core. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. Description LVDS data input + : Positive input of LVDS data differential pair. - : Negative input of LVDS data differential pair. LVDS clock input LVCMOS data outputs. 5/17 2011.02 - Rev.A Technical Note BU90R104 ●Function Description *1 PD R/F OE Data output *1 (Rxn) 0 0 0 Hi-Z 0 0 1 All fixed low 0 1 0 Hi-Z 0 1 1 All fixed low 1 0 0 Hi-Z 1 0 1 Data output 1 1 0 Hi-Z 1 1 1 Data output Clock output Hi-Z Fixed Low Hi-Z Fixed Low Hi-Z Output data is latched by falling edge of clock. Hi-Z Output data is latched by rising edge of clock : Rxn x = A,B,C,D,E n = 0,1,2,3,4,5,6 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 6/17 2011.02 - Rev.A Technical Note BU90R104 ●Electrical Characteristics ■DC Characteristics ○LVCMOS DC character (VDD=3.0V～3.6V, Ta=-20℃～85℃) Limits Parameter Symbol Min. Typ. Max. Unit Conditions High Input voltage VIH VDD×0.8 - VDD V Low Input voltage VIL 0.0 - VDD×0.2 V High Output voltage VOH VDD-0.5 - VDD V IOH=-4mA (data) IOH=-8mA (clock) Low Output voltage VOL 0.0 - 0.4 V IOL=4mA (data) IOL=8mA (clock) Input current IINC - - ±10 µA 0V≦VIN≦VDD ○LVDS Receiver DC character (VDD=3.0V～3.6V, Ta=-20℃～85℃) Limits Parameter Symbol Min. Typ. Max. Unit Conditions Differential input High threshold VTH - - 100 mV VOC*1=1.2V Differential input Low threshold VTL -100 - - mV VOC*1=1.2V Input current IINL - - ±25 µA VIN=2.4V / 0V VDD=3.6V *1 Common Mode Voltage www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 7/17 2011.02 - Rev.A Technical Note BU90R104 ■Supply Current ○Supply current Parameter Symbol Limits Min. Max. Unit Conditions Receiver supply current (Gray Scale Pattern) IRCCG 52 - mA fCLKOUT=90MHz CL=8pF, VDD=3.3V Receiver supply current (Worst Case Pattern) IRCCW 95 - mA fCLKOUT=90MHz CL=8pF, VDD=3.3V Receiver power down supply current IRCCS - 10 µA PD=L, OE=L Gray Scale Pattern CLKOUT Rx0 Rx1 Rx2 Rx3 Rx4 Rx5 Rx6 x=A,B,C,D,E Fig.4 Gray Scale Pattern Worst Case Pattern (Maximum power condition) CLKOUT Rx0 Rx1 Rx2 Rx3 Rx4 Rx5 Rx6 x=A,B,C,D,E Fig.5 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. Worst Case Pattern 8/17 2011.02 - Rev.A Technical Note BU90R104 ■AC Characteristics ○Switching characteristics Parameter Limits Symbol Min. Typ. Max. Unit CLKOUT period tRCP 8.93 - 125 ns CLKOUT "H" time tRCH - 0.5tRCP-1.0 - ns CLKOUT "L" time tRCL - 0.5tRCP-1.0 - ns LVCMOS data setup to CLKOUT tRS 0.5tRCP-1.4 - - ns LVCMOS data hold from CLKOUT tRH 0.23tRCP-1.0 - - ns LVCMOS data rise time tTLH - 1.0 2.0 ns LVCMOS data fall time tTHL - 1.0 2.0 ns Input data position 0 tRIP1 -0.25 0.0 +0.25 ns Input data position 1 tRIP0 tRCIP -0.25 7 tRCIP 7 tRCIP +0.25 7 ns Input data position 2 tRIP6 2 tRCIP -0.25 7 2 tRCIP 7 2 tRCIP +0.25 7 ns Input data position 3 tRIP5 3 tRCIP -0.25 7 3 tRCIP 7 3 tRCIP +0.25 7 ns Input data position 4 tRIP4 4 tRCIP -0.25 7 4 tRCIP 7 4 tRCIP +0.25 7 ns Input data position 5 tRIP3 5 tRCIP -0.25 7 5 tRCIP 7 5 tRCIP +0.25 7 ns Input data position 6 tRIP2 6 tRCIP -0.25 7 6 tRCIP 7 6 tRCIP +0.25 7 ns Phase Locked Loop set time tRPLL - - 10.0 ms Clock input period tRCIP 8.93 - 125 ns www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 9/17 2011.02 - Rev.A Technical Note BU90R104 ●AC Timing Diagrams ■LVCMOS LVCMOS output 80% 80% 20% CL=8pF 20% tTLH LVCMOS output load tTHL tRCH CLKOUT VDD/2 VDD/2 tRCL R/F=L VDD/2 VDD/2 R/F=H tRCP tRS Rxn tRH VDD/2 VDD/2 x=A,B,C,D,E n=0,1,2,3,4,5,6 Fig.6 LVCMOS output timing ■Phase-Locked Loop set time VDD 3.0V RCLK +/- VDD/2 PD tRPLL VDD/2 CLKOUT Fig.7 Phase-Locked Loop set time www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 10/17 2011.02 - Rev.A Technical Note BU90R104 ●LVDS Data, Clock Input Timing Current cycle Previous cycle Next cycle tRCIP RCLK + (Differential) Vdiff=0V Vdiff=0V RA+/- RA3 RA2 RA1 RA0 RA6 RA5 RB+/- RB3 RB2 RB1 RB0 RB6 RB5 RC+/- RC3 RC2 RC1 RC0 RC6 RD+/- RD3 RD2 RD1 RD0 RE2 RE1 RE0 RE+/- RE3 RA3 RA2 RA1 RA0 RA6 RB4 RB3 RB2 RB1 RB0 RB6 RC5 RC4 RC3 RC2 RC1 RC0 RC6 RD6 RD5 RD4 RD3 RD2 RD1 RD0 RD6 RE6 RE5 RE4 RE3 RE2 RE1 RE0 RE6 RA4 Fig.8 LVDS data and clock input timing www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 11/17 2011.02 - Rev.A Technical Note BU90R104 ●LVDS Data, Clock Input and LVSMOS Output Timing LVDS Input RA+/- RA6 RA5 RA4 RA3 RA2 RA1 RA0 RB+/- RB6 RB5 RB4 RB3 RB2 RB1 RB0 RC+/- RC6 RC5 RC4 RC3 RC2 RC1 RC0 RD+/- RD6 RD5 RD4 RD3 RD2 RD1 RD0 RE+/- RE6 RE5 RE4 RE3 RE2 RE1 RE0 RCLK+/- LVCMOS Output CLKOUT (R/F=L) CLKOUT (R/F=H) RA0～6 VALID VALID RB0～6 VALID VALID RC0～6 VALID VALID RD0～6 VALID VALID RE0～6 VALID VALID Fig.9 LVDS Data, Clock Input and LVCMOS Output Timing www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 12/17 2011.02 - Rev.A Technical Note BU90R104 ●About the Power On Reset Power on reset is not mandatory for this device. (The PD pin should be set to high level when power on reset procedure is not used.) VDD PD BU90R104 Fig.10 Terminal connection when power on reset is not used. However, Power on reset procedure is strongly recommend for internal logic initialization by following two methods. ①The method of using CR circuit. ②The method of using external specific IC. It is recommend to do enough examination for target application. VDD schottky barrier diode VDD VDD 10KΩ VT+ PD 220Ω PD Internal Reset 2.2µF td td is approximately equal to 20ms when the left RC coleus are applied. Be careful of temperature ofthe capacitor especially over and again. B characteristic ceramics and function polymer aluminum electrolysis are recommended. Fig.11 Power on reset by external a CR circuit VDD VDD Power on IC (Open drainoutput) Detection voltage VDD 220KΩ VDD PD PD VT+ VOUT Internal Reset 0.1μF GND B Characteristic ceramics. td Fig.12 Power on reset by specific IC www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 13/17 2011.02 - Rev.A Technical Note BU90R104 ●10 LVDS Level Input & Output Example: BU8254KVT : BU90R104 : LVCMOS level input/Falling edge/LVDS normal(350mV) swing output LVCMOS level output/Falling edge VDD F.Bead *1 VDD GND 0.1uF 0.01uF LVDS VDD CLKIN TA0 LVDS GND TA1 TA2 TA3 PLL VDD TA4 TA5 PLL GND TA6 TB0 TB1 TB2 TAN TB3 TB4 TAP TB5 TB6 TBN TC0 TC1 TBP TC2 TC3 TCN TC4 TC5 TCP TC6 TD0 TCLKN TD1 BU8254KVT TD2 TCLKP TD3 TD4 TDN TD5 TD6 TDP TE0 TE1 TEN TE2 TE3 TEP TE4 TE5 TE6 CLKIN R4 R5 R6 R7 R8 R9 G4 G5 G6 G7 G8 G9 B4 B5 B6 B7 B8 B9 HSYNC VSYNC DE R2 R3 G2 G3 B2 B3 R0 R1 G0 G1 B0 B1 XRST LVDD 0.1uF 0.01uF 0.1uF 0.01uF LGND PVDD 0.1uF 0.01uF XRST 0.1uF 0.01uF 100Ω 100Ω 100Ω 100Ω 100Ω 100Ω RS *2 RARA+ RBRB+ RCRC+ RCLKRCLK+ RDRD + RERE+ CLKOUT RA0 RA1 RA2 RA3 RA4 RA5 RA6 RB0 RB1 RB2 RB3 RB4 RB5 RB6 RC0 RC1 RC2 RC3 RC4 RC5 RC6 RD0 B90R104 RD1 RD2 RD3 RD4 RD5 RD6 RE0 RE1 RE2 RE3 RE4 RE5 RE6 0.1uF 0.01uF CLKOUT R4 R5 R6 R7 R8 R9 G4 G5 G6 G7 G8 G9 B4 B5 B6 B7 B8 B9 HSYNC VSYNC DE R2 R3 G2 G3 B2 B3 OPEN R0 R1 G0 G1 B0 B1 OPEN PD OE DK R/F R/F PCB(Transmitter) PGND VDD GND PD OE 100Ωtwist pair Cable or PCB trace VDD 0.1uF VDD F.Bead *1 PCB(Receiver) *1: Recommended Parts: F.Bead : BLM18A-Series (Murata Manufacturing Co.) *2 : If RS pin is tied to VDD, LVDS swing is 350 mV. If RS pin is tied to GND, LVDS swing is 200 mV. Fig.13 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 14/17 2011.02 - Rev.A Technical Note BU90R104 ●10bit Small Swing Input & LVCMOS Level Output Example: BU8254KVT : LVCMOS level input/Falling edge/LVDS normal(350mV) swing output BU90R104 : LVCMOS level output/Falling edge VDD F.Bead *3 VDD GND 0.1uF 0.01uF LVDS VDD CLKIN LVDS TA0 TA1 GND TA2 TA3 PLL VDD TA4 TA5 PLL GND TA6 TB0 TB1 TB2 TAN TB3 TB4 TAP TB5 TB6 TBN TC0 TC1 TBP TC2 TC3 TCN TC4 TC5 TCP TC6 TD0 TCLKN TD1 BU8254KVT TD2 TCLKP TD3 TD4 TDN TD5 TD6 TDP TE0 TE1 TEN TE2 TE3 TEP TE4 TE5 TE6 CLKIN R4 R5 R6 R7 R8 R9 G4 G5 G6 G7 G8 G9 B4 B5 B6 B7 B8 B9 HSYNC VSYNC DE R2 R3 G2 G3 B2 B3 R0 R1 G0 G1 B0 B1 XRST VDD F.Bead *3 LVDD 0.1uF 0.01uF 0.1uF 0.01uF LGND PVDD 0.1uF 0.01uF XRST 0.1uF 0.01uF 100Ω 100Ω 100Ω 100Ω 100Ω 100Ω PGND RARA+ RBRB+ RCRC+ RCLKRCLK+ RDRD+ RERE+ RS *4 CLKOUT RA0 RA1 RA2 RA3 RA4 RA5 RA6 RB0 RB1 RB2 RB3 RB4 RB5 RB6 RC0 RC1 RC2 RC3 RC4 RC5 RC6 RD0 BU90R104 RD1 RD2 RD3 RD4 RD5 RD6 RE0 RE1 RE2 RE3 RE4 RE5 RE6 PD OE 100Ωtwist pair Cable or PCB trace *4 VDD GND 0.1uF 0.01uF CLKOUT R4 R5 R6 R7 R8 R9 G4 G5 G6 G7 G8 G9 B4 B5 B6 B7 B8 B9 HSYNC VSYNC DE R2 R3 G2 G3 B2 B3 OPEN R0 R1 G0 G1 B0 B1 OPEN PD OE DK R/F R/F PCB(Receiver) PCB(Transmitter) *3 Recommended Parts: F.Bead : BLM18A-Series (Murata Manufacturing Co.) *4 : RS pin acts as VREF input pin when input voltage is set to half of high level signal input. We recommend to locate by-pass condenser near the RS pin. VDD R1 15k RS pin. R2 5.6k C1=0.1µF Example for LVTTL(1.8V input):(R1,R2)=(15kΩ,5.6kΩ) Fig.14 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 15/17 2011.02 - Rev.A Technical Note BU90R104 ●Notes for use 1) This chip is not designed to protect from radioactivity. 2) The chip is made strictly for the specific application or equipment. Then it is necessary that the unit is measured as need. 3) This document may be used as strategic technical data which subjects to COCOM regulations. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 16/17 2011.02 - Rev.A Technical Note BU90R104 ●Ordering part number B U 9 Part No. 0 R 1 0 4 - Part No. 90R104 E 2 Packaging and forming specification E2: Embossed tape and reel Package TQFP64V TQFP64V <Tape and Reel information> 12.0±0.3 10.0±0.2 48 33 Embossed carrier tape (with dry pack) Quantity 1000pcs 32 Direction of feed 64 17 1 E2 direction is the 1pin of product is at the upper left when you hold ( The ) reel on the left hand and you pull out the tape on the right hand 0.5 10.0±0.2 12.0±0.3 49 Tape 16 0.1±0.1 1.0±0.1 0.125±0.1 0.5 0.2 ± 0.1 1pin 0.1 (Unit : mm) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. Reel 17/17 Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. 2011.02 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. R1120A