Fairchild FAN73901MX High- and low-side, gate-drive ic Datasheet

FAN73901
High- and Low-Side, Gate-Drive IC
Features
Description
„ Floating Channels for Bootstrap Operation to +600V
The FAN73901 is a monolithic high- and low-side gatedrive IC, which can drive high-speed MOSFETs and
IGBTs that operate up to +600V. It has a buffered output
stage with all NMOS transistors designed for high pulse
current driving capability and minimum cross-conduction.
„ Typically 2.5A/2.5A Sourcing/Sinking Current Driving
Capability
„ Common-Mode dv/dt Noise Canceling Circuit
„ Built-in Under-Voltage Lockout for Both Channels
„ Matched Propagation Delay for Both Channels
„ 3.3V and 5V Input Logic Compatible
„ Output In-Phase with Input
Applications
Fairchild’s high-voltage process and common-mode
noise canceling techniques provide stable operation of
the high-side driver under high dv/dt noise circumstances. An advanced level-shift circuit offers high-side
gate driver operation up to VS=-9.8V (typical) for
VBS=15V.
The UVLO circuit prevents malfunction when VDD and
VBS are lower than the specified threshold voltage.
„ Half-Bridge Driver
„ HID Lamp Ballast
„ SMPS
The high current and low output voltage drop feature
make FAN73901 suitable for the switching power supply,
motor driver, and high-power DC-DC converter
applications.
„ Motor Driver
8-SOP
Ordering Information
Part Number
FAN73901M
FAN73901MX
Package
Operating
Temperature Range
8-SOP
-40°C ~ 125°C
Eco Status
RoHS
Packing Method
Tube
Tape & Reel
For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
© 2008 Fairchild Semiconductor Corporation
FAN73901 • Rev. 1.0.0
www.fairchildsemi.com
FAN73901 — High- and Low Side, Gate-Drive IC
August 2008
FAN73901 — High- and Low Side, Gate-Drive IC
Typical Application Circuit
15V
FAN73901
RBOOT
Up to 600V
DBOOT
HIN
1
HIN
VB
8
LIN
2
LIN
HO
7
Controller
Q1
R1
CBOOT
3
COM
VS
4
LO
VDD 5
R2
6
OUTPUT
Load
C1
Q2
R3
R4
FAN73901 Rev.01
Figure 1. Application Circuit for Half-Bridge
Internal Block Diagram
FAN73901
8
VB
7
HO
6
VS
5
VDD
4
LO
3
COM
UVLO
NOISE
CANCELLER
R
S
DRIVER
200K
PULSE
GENERATOR
HIN 1
R
Q
UVLO
DRIVER
DELAY
LIN 2
200K
FAN73901 Rev.01
Figure 2. Functional Block Diagram
© 2008 Fairchild Semiconductor Corporation
FAN73901 • Rev. 1.0.0
www.fairchildsemi.com
2
FAN73901 — High- and Low Side, Gate-Drive IC
Pin Configuration
HIN
1
8
VB
LIN
2
7
HO
COM
3
6
VS
LO
4
5
VDD
FAN73901
FAN73901 Rev.01
Figure 3. Pin Assignments (Top View)
Pin Definitions
Pin #
Name
1
HIN
Logic Input for High-Side Gate Driver Output
2
LIN
Logic Input for Low-Side Gate Driver Output
3
COM
Low-Side Driver Return
4
LO
Low-Side Driver Output
5
VDD
Low-Side and Logic Part Supply Voltage
6
VS
High-Voltage Floating Supply Return
7
HO
High-Side Driver Output
8
VB
High-Side Floating Supply
© 2008 Fairchild Semiconductor Corporation
FAN73901 • Rev. 1.0.0
Description
www.fairchildsemi.com
3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. TA=25°C, unless otherwise specified.
Symbol
Characteristics
VS
High-Side Floating Supply Offset Voltage
VB
High-Side Floating Supply Voltage
Min.
Max.
Unit
VB-25
VB+0.3
V
-0.3
625.0
V
VS-0.3
VB+0.3
V
VHO
High-Side Floating Output Voltage HO
VDD
Low-Side and Logic Fixed Supply Voltage
-0.3
25.0
V
VLO
Low-Side Output Voltage LO
-0.3
VDD+0.3
V
VIN
Logic Input Voltage (HIN and LIN)
-0.3
VDD+0.3
V
50
V/ns
dVS/dt
Allowable Offset Voltage Slew Rate
Dissipation(1)(2)(3)
PD
Power
0.625
W
θJA
Thermal Resistance, Junction-to-Ambient
200
°C/W
TJ
Junction Temperature
+150
°C
TSTG
Storage Temperature
+150
°C
Notes:
1. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material).
2. Refer to the following standards:
JESD51-2: Integral circuits thermal test method environmental conditions - natural convection
JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages
3. Do not exceed PD under any circumstances.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Min.
Max.
Unit
VB
High-Side Floating Supply Voltage
VS+10
VS+20
V
VS
High-Side Floating Supply Offset Voltage
6-VDD
600
V
VHO
High-Side Output Voltage
VS
VB
V
VDD
Low-Side and Logic Supply Voltage
10
20
V
VLO
Low-Side Output Voltage
COM
VDD
V
VIN
Logic Input Voltage (HIN and LIN)
COM
VDD
V
TA
Operating Ambient Temperature
-40
+125
°C
© 2008 Fairchild Semiconductor Corporation
FAN73901 • Rev. 1.0.0
www.fairchildsemi.com
4
FAN73901 — High- and Low Side, Gate-Drive IC
Absolute Maximum Ratings
VBIAS (VDD, VBS)=15.0V, VS=COM, TA=25°C, unless otherwise specified. The VIL, VIH, and IIN parameters are referenced to COM and are applicable to the respective input signals HIN and LIN. The VO and IO parameters are referenced to COM and VS is applicable to the respective output signals HO and LO.
Symbol
Characteristics
Test Condition
Min.
Typ.
Max. Unit
POWER SUPPLY SECTION (VDD AND VBS)
VDDUV+
VBSUV+
VDD and VBS Supply Under-Voltage
Positive-Going Threshold
8.0
8.8
9.8
V
VDDUVVBSUV-
VDD and VBS Supply Under-Voltage
Negative-Going Threshold
7.4
8.3
9.0
V
VDDUVH VDD and VBS Supply Under-Voltage
VBSUVH Lockout Hysteresis Voltage
0.5
V
ILK
Offset Supply Leakage Current
VB=VS=600V
IQBS
Quiescent VBS Supply Current
VIN=0V or 5V
IQDD
Quiescent VDD Supply Current
VIN=0V or 5V
75
110
µA
IPBS
Operating VBS Supply Current
fIN=20kHz, rms value
530
640
µA
IPDD
Operating VDD Supply Current
fIN=20kHz, rms value
530
640
µA
45
50
µA
80
µA
LOGIC INPUT SECTION (HIN, LIN)
VIH
Logic "1" Input Voltage
2.5
VIL
Logic "0" Input Voltage
IIN+
Logic "1" Input Bias Current
VIN=5V
IIN-
Logic "0" Input Bias Current
VIN=0V
RIN
Input Pull-Down Resistance
100
V
1.2
V
25
50
µA
1.0
2.0
200
µA
KΩ
GATE DRIVER OUTPUT SECTION (HO, LO)
VOH
High-Level Output Voltage, VBIAS-VO
No Load
1.0
V
VOL
Low-Level Output Voltage, VO
No Load
35
mV
IO+
Output High, Short-Circuit Pulsed
Current(4)
VO=0V, VIN=5V with PW<10µs
1.8
2.5
A
IO-
Output Low, Short-Circuit Pulsed
Current(4)
VO=15V, VIN=0V with
PW<10µs
1.8
2.5
A
VS
Allowable Negative VS Pin Voltage for
HIN Signal Propagation to HO
-9.8
-7.0
V
Note:
4. This parameter guaranteed by design.
Dynamic Electrical Characteristics
VBIAS (VDD, VBS)=15.0V, VS=COM=0V, CL=1000pF and TA=25°C unless otherwise specified.
Symbol
Characteristics
Test Condition
Min.
Typ.
Max.
Unit
ton
Turn-on Propagation Delay
VS=0V
140
200
ns
toff
Turn-off Propagation Delay
VS=0V
140
200
ns
MT
Delay Matching, HS & LS Turn-on/off
0
50
ns
tr
Turn-on Rise Time
25
50
ns
tf
Turn-off Fall Time
20
45
ns
© 2008 Fairchild Semiconductor Corporation
FAN73901 • Rev. 1.0.0
www.fairchildsemi.com
5
FAN73901 — High- and Low Side, Gate-Drive IC
Electrical Characteristics
240
220
220
200
200
180
180
tOFF [ns]
tON [ns]
240
160
140
160
140
120
120
100
100
80
80
60
-40
-20
0
20
40
60
80
100
60
-40
120
-20
0
Temperature [°C]
40
40
30
30
20
60
80
100
120
20
10
10
-20
0
20
40
60
80
100
0
-40
120
-20
0
20
40
60
80
100
120
Temperature [°C]
Temperature [°C]
Figure 6. Turn-on Rise Time vs. Temperature
Figure 7. Turn-off Fall Time vs. Temperature
50
50
40
MTOFF [ns]
40
MTON [ns]
40
Figure 5. Turn-off Propagation Delay
vs. Temperature
tF [ns]
tR [ns]
Figure 4. Turn-on Propagation Delay vs. Temperature
0
-40
20
Temperature [°C]
30
20
30
20
10
10
0
-40
0
-20
0
20
40
60
80
100
-10
-40
120
Temperature [°C]
0
20
40
60
80
100
120
Temperature [°C]
Figure 8. Turn-on Delay Matching vs. Temperature
© 2008 Fairchild Semiconductor Corporation
FAN73901 • Rev. 1.0.0
-20
Figure 9. Turn-off Delay Matching vs. Temperature
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6
FAN73901 — High- and Low Side, Gate-Drive IC
Typical Characteristics
120
120
100
100
80
IQBS [ μA]
IQDD [ μA]
140
80
60
60
40
40
20
20
0
-40
-20
0
20
40
60
80
100
0
-40
120
-20
0
Temperature [°C]
1000
1000
800
800
600
400
80
100
120
400
-20
0
20
40
60
80
100
200
-40
120
-20
0
20
40
60
80
100
120
Temperature [°C]
Figure 12. Operating VDD Supply Current
vs. Temperature
Figure 13. Operating VBS Supply Current
vs. Temperature
9.5
9.0
9.0
8.5
VDDUV- [V]
VDDUV+ [V]
60
600
Temperature [°C]
8.5
8.0
7.5
8.0
7.5
-40
40
Figure 11. Quiescent VBS Supply Current
vs. Temperature
IPBS [ μA]
IPDD [ μA]
Figure 10. Quiescent VDD Supply Current
vs. Temperature
200
-40
20
Temperature [°C]
-20
0
20
40
60
80
100
7.0
-40
120
Figure 14. VDD UVLO+ vs. Temperature
© 2008 Fairchild Semiconductor Corporation
FAN73901 • Rev. 1.0.0
-20
0
20
40
60
80
100
120
Temperature [°C]
Temperature [°C]
Figure 15. VDD UVLO- vs. Temperature
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7
FAN73901 — High- and Low Side, Gate-Drive IC
Typical Characteristics (Continued)
9.0
9.0
8.5
VBSUV- [V]
VBSUV+ [V]
9.5
8.5
8.0
8.0
7.5
7.5
-40
-20
0
20
40
60
80
100
7.0
-40
120
-20
0
Temperature [°C]
Figure 16. VBS UVLO+ vs. Temperature
VOL [mV]
VOH [mV]
80
100
120
10
900
600
0
-10
300
-20
0
20
40
60
80
100
-20
-40
120
-20
0
Temperature [°C]
2.5
2.5
2.0
2.0
VIL [V]
3.0
1.5
1.5
1.0
1.0
0
20
40
60
80
100
0.5
-40
120
60
80
100
120
-20
0
20
40
60
80
100
120
Temperature [°C]
Temperature [°C]
Figure 20. Logic High Input Voltage vs. Temperature
© 2008 Fairchild Semiconductor Corporation
FAN73901 • Rev. 1.0.0
40
Figure 19. Low-Level Output Voltage
vs. Temperature
3.0
-20
20
Temperature [°C]
Figure 18. High-Level Output Voltage
vs. Temperature
VIH [V]
60
20
1200
0.5
-40
40
Figure 17. VBS UVLO- vs. Temperature
1500
0
-40
20
Temperature [°C]
Figure 21. Logic Low Input Voltage vs. Temperature
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8
FAN73901 — High- and Low Side, Gate-Drive IC
Typical Characteristics (Continued)
-7
60
50
-8
30
VS [V]
IIN+ [ μA]
40
20
-9
-10
10
-11
0
-10
-40
-20
0
20
40
60
80
100
-12
-40
120
-20
0
20
40
60
80
100
120
Temperature [°C]
Temperature [°C]
Figure 22. Logic Input High Bias Current
vs. Temperature
Figure 23. Allowable Negative VS Voltage
vs. Temperature
.
© 2008 Fairchild Semiconductor Corporation
FAN73901 • Rev. 1.0.0
www.fairchildsemi.com
9
FAN73901 — High- and Low Side, Gate-Drive IC
Typical Characteristics (Continued)
FAN73901 — High- and Low Side, Gate-Drive IC
Switching Time Definitions
15V
HIN
1
HIN
VB 8
LIN
2
LIN
HO 7
10µF
100nF
1nF
3
COM
4
LO
VS 6
15V
VDD 5
1nF
10µF
100nF
FAN73901 Rev.01
Figure 24. Switching Time Test Circuit
HIN
LIN
HO
LO
FAN73901 Rev.01
Figure 25. Input/Output Timing Diagram
HIN
50%
50%
LIN
ton
tr
toff
90%
tf
90%
HO
LO
10%
10%
FAN73901 Rev.01
Figure 26. Switching Time Waveform Definitions
HIN
LIN
50%
LO
10%
50%
MT
HO
10%
90%
LO
MT
90%
HO
FAN73901 Rev.01
Figure 27. Delay Matching Waveform Definitions
© 2008 Fairchild Semiconductor Corporation
FAN73901 • Rev. 1.0.0
www.fairchildsemi.com
10
.
3.81
5
B
1.75
4.00
3.80
4
1.27
0.25
M
C B A
LAND PATTERN RE
SEE DETA
C
0.10
0.51
0.33
0.50 x 45°
0.25
C
OPTION A - BEVEL E
GAGE PLANE
OPTION B - NO BEVEL
0.36
NOTES: UNLESS OTHERWIS
A) THIS PACKAGE CONFO
MS-012, VARIATION AA,
B) ALL DIMENSIONS ARE I
SEATING PLANE
Figure 28. 8-Lead Small Outline Package (SOP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2008 Fairchild Semiconductor Corporation
FAN73901 • Rev. 1.0.0
www.fairchildsemi.com
11
FAN73901 — High- and Low Side, Gate-Drive IC
Mechanical Dimensions
FAN73901 — High- and Low Side, Gate-Drive IC
© 2008 Fairchild Semiconductor Corporation
FAN73901 • Rev. 1.0.0
www.fairchildsemi.com
12
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