TI1 LMV331IDCKR Quad general-purpose low-voltage comparator Datasheet

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LMV331, LMV393, LMV339
SLCS136T – AUGUST 1999 – REVISED JANUARY 2015
LMV331 Single, LMV393 Dual, LMV339 Quad General-purpose Low-voltage Comparators
1 Features
3 Description
•
•
The LMV393 and LMV339 devices are low-voltage
(2.7 V to 5.5 V) versions of the dual and quad
comparators, LM393 and LM339, which operate from
5 V to 30 V. The LMV331 is the single-comparator
version.
1
•
•
•
2.7-V and 5-V Performance
Low Supply Current
– LMV331 130 μA Typ
– LMV393 210 μA Typ
– LMV339 410 μA Typ
Input Common-Mode Voltage Range Includes
Ground
Low Output Saturation Voltage 200 mV Typical
Open-Collector Output for Maximum Flexibility
The LMV331, LMV339, and LMV393 are the most
cost-effective solutions for applications where lowvoltage operation, low power, and space saving are
the primary specifications in circuit design for portable
consumer
products.
These
devices
offer
specifications that meet or exceed the familiar LM339
and LM393 devices at a fraction of the supply current.
2 Applications
•
•
•
•
•
Device Information(1)
Hysteresis Comparators
Oscillators
Window Comparators
Industrial Equipment
Test and Measurement
PART NUMBER
PACKAGE (PIN)
BODY SIZE (NOM)
LMV339
SOIC (14)
8.65 mm x 3.90 mm
LMV393
SOIC (8)
4.90 mm x 3.90 mm
LMV331
SC70 (5)
2.00 mm x 1.25 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
4 Simplified Schematic
–
IN–
OUT
+
IN+
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LMV331, LMV393, LMV339
SLCS136T – AUGUST 1999 – REVISED JANUARY 2015
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Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Simplified Schematic.............................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
1
2
3
4
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
4
4
4
4
5
6
6
6
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics, VCC+ = 2.7 V ....................
Electrical Characteristics, VCC+ = 5 V .......................
Switching Characteristics, VCC+ = 2.7 V ...................
Switching Characteristics, VCC+ = 5 V ......................
Typical Characteristics ..............................................
Detailed Description .............................................. 9
8.1
8.2
8.3
8.4
9
Overview ..................................................................
Functional Block Diagram .........................................
Feature Description...................................................
Device Functional Modes..........................................
9
9
9
9
Application and Implementation ........................ 10
9.1 Application Information............................................ 10
9.2 Typical Application ................................................. 10
10 Power Supply Recommendations ..................... 12
11 Layout................................................................... 12
11.1 Layout Guidelines ................................................. 12
11.2 Layout Example .................................................... 12
12 Device and Documentation Support ................. 13
12.1
12.2
12.3
12.4
Related Links ........................................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
13
13
13
13
13 Mechanical, Packaging, and Orderable
Information ........................................................... 13
5 Revision History
Changes from Revision S (October 2012) to Revision T
Page
•
Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table,
Typical Characteristics, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
•
Deleted Ordering Information table. ....................................................................................................................................... 1
Changes from Revision R (May 2012) to Revision S
•
Updated operating temperature range. .................................................................................................................................. 4
Changes from Revision N (April 2011) to Revision O
•
Page
Page
Changed VI in the Absolute Maximum Ratings from 5.5 V to VCC+ ....................................................................................... 4
Changes from Revision M (November 2005) to Revision N
Page
•
Changed document format from Quicksilver to DocZone. ..................................................................................................... 1
•
Added RUC package pin out drawing. ................................................................................................................................... 3
2
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6 Pin Configuration and Functions
13
3
12
4
11
5
10
6
9
7
8
3OUT
4OUT
GND
4IN+
4IN–
3IN+
3IN–
LMV393 . . . D, DDU, DGK OR PW PACKAGE
(TOP VIEW)
1OUT
1IN–
1IN+
GND
1
8
2
7
3
6
4
5
3OUT
14
2
14
13
12
4OUT
2
11
GND
1IN–
3
10
4IN+
1IN+
4
9
4IN–
2IN–
5
8
3IN+
1OUT
1
VCC+
6
7
3IN–
1
2IN+
2OUT
1OUT
VCC+
1IN–
1IN+
2IN–
2IN+
2OUT
LMV339 . . . RUC PACKAGE
(TOP VIEW)
LMV339 . . . D OR PW PACKAGE
(TOP VIEW)
LMV331 . . . DBV OR DCK PACKAGE
(TOP VIEW)
VCC+
2OUT
2IN–
2IN+
1IN+
1
GND
2
1IN–
3
5
VCC+
4
OUT
Pin Functions
PIN
NAME
LMV331
LMV393
DBV or
DCK
D, DDU,
DGK or PW
LMV339
TYPE
D or PW
RUC
DESCRIPTION
1IN– ,
2IN–,
3IN–,
4IN–
3
2, 6
4, 6, 8, 10
3, 5, 7, 9
I
Comparator(s) negative input pin(s)
1IN+ ,
2IN+,
3IN+,
4IN+
1
3, 5
5, 7, 9, 11
4, 6, 8, 10
I
Comparator(s) positive input pin(s)
GND
2
4
12
11
I
Ground
1OUT,
2OUT,
3OUT,
4OUT
4
1, 7
2, 1, 14, 13
1, 14, 13, 12
O
Comparator(s) output pin(s)
VCC+
5
8
3
2
I
Supply Pin
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
(3)
VID
Differential input voltage
VI
Input voltage range (either input)
0
At or below TA = 25°C,
VCC ≤ 5.5 V
Duration of output short circuit (one amplifier) to ground (4)
TJ
Operating virtual junction temperature
Tstg
Storage temperature range
(1)
(2)
(3)
(4)
MAX
Supply voltage (2)
VCC
UNIT
5.5
V
±5.5
V
VCC+
V
Unlimited
–65
150
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values (except differential voltages and VCC specified for the measurement of IOS) are with respect to the network GND.
Differential voltages are at IN+ with respect to IN–.
Short circuits from outputs to VCC can cause excessive heating and eventual destruction.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
±2000
Charged device model (CDM), per JEDEC specification JESD22-C101,
all pins (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
VCC
Supply voltage (single-supply operation)
VOUT
Output voltage
TA
Operating free-air temperature
MIN
MAX
2.7
5.5
UNIT
V
VCC+ + 0.3
V
125
°C
–40
7.4 Thermal Information
LMV339
THERMAL METRIC (1)
D
PW
LMV393
RUC
D
DDU
14 PINS
RθJA
Junction-to-ambient
thermal resistance
LMV331
DGK
PW
DBV
8 PINS
DCK
86
113
216
97
210
172
149
206
252
RθJC(top) Junction-to-case (top)
thermal resistance
—
—
51.3
—
—
—
—
—
—
RθJB
Junction-to-board
thermal resistance
—
—
59.0
—
—
—
—
—
—
ψJT
Junction-to-top
characterization
parameter
—
—
1.2
—
—
—
—
—
—
Junction-to-board
characterization
parameter
—
—
59.0
—
—
—
—
—
—
ψJB
(1)
4
UNIT
5 PINS
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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7.5 Electrical Characteristics, VCC+ = 2.7 V
VCC+ = 2.7 V, GND = 0 V, at specified free-air temperature (unless otherwise noted)
PARAMETER
VIO
Input offset voltage
αVIO
Average temperature
coefficient of input offset
voltage
IIB
Input bias current
IIO
Input offset current
IO
Output current (sinking)
TEST CONDITIONS
TA
MIN
25°C
Saturation voltage
ICC
Supply current
7
5
25°C
15
VO ≤ 1.5 V
25°C
5
mV
μV/°C
250
5
nA
50
150
23
nA
mA
0.003
–40°C to
125°C
1
25°C
–0.1 to 2
IO ≤ 1.5 mA
25°C
200
LMV331
25°C
40
100
LMV393 (both comparators)
25°C
70
140
LMV339 (all four comparators)
25°C
140
200
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UNIT
400
–40°C to
125°C
25°C
VSAT
1.7
–40°C to
125°C
Output Leakage Current
Common-mode input
voltage range
MAX
–40°C to
125°C
25°C
VICR
TYP
µA
V
mV
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μA
5
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7.6 Electrical Characteristics, VCC+ = 5 V
VCC+ = 5 V, GND = 0 V, at specified free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
MIN
25°C
VIO
Input offset voltage
αVIO
Average temperature
coefficient of input offset
voltage
IIB
Input bias current
–40°C to
125°C
IIO
Input offset current
–40°C to
125°C
IO
Output current (sinking)
1.7
7
9
25°C
5
25°C
25
VO ≤ 1.5 V
2
10
Output Leakage Current
Common-mode input
voltage range
25°C
AVD
Large-signal differential
voltage gain
25°C
VSAT
Saturation voltage
84
–40°C to
125°C
LMV331
–40°C to
125°C
LMV393 (both comparators)
–40°C to
125°C
LMV339 (all four comparators)
–40°C to
125°C
nA
mA
0.003
1
–0.1 to 4.2
20
25°C
IO ≤ 4 mA
nA
50
–40°C to
125°C
VICR
mV
250
150
25°C
UNIT
μV/°C
400
25°C
V/mV
400
700
60
µA
V
50
200
25°C
mV
120
150
25°C
Supply current
MAX
–40°C to
125°C
25°C
ICC
TYP
100
200
250
25°C
170
μA
300
350
7.7 Switching Characteristics, VCC+ = 2.7 V
TA = 25°C, VCC+ = 2.7 V, RL = 5.1 kΩ, GND = 0 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TYP
tPHL
Propagation delay high to low level output
switching
Input overdrive = 10 mV
1000
Input overdrive = 100 mV
350
tPLH
Propagation delay low to high level output
switching
Input overdrive = 10 mV
500
Input overdrive = 100 mV
400
UNIT
ns
ns
7.8 Switching Characteristics, VCC+ = 5 V
TA = 25°C, VCC+ = 5 V, RL = 5.1 kΩ, GND = 0 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TYP
tPHL
Propagation delay high to low level output
switching
Input overdrive = 10 mV
600
Input overdrive = 100 mV
200
tPLH
Propagation delay low to high level output
switching
Input overdrive = 10 mV
450
Input overdrive = 100 mV
300
6
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UNIT
ns
ns
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7.9 Typical Characteristics
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
-40C
25C
85C
Suppply Current (PA)
Suppply Current (PA)
Unless otherwise specified, VS = +5V, single supply, TA = 25°C
1
1.5
2
2.5
3
3.5
Volts (V)
4
4.5
5
-40C
25C
85C
1
Figure 1. Supply Current vs Supply Voltage Output High
(LMV33x)
1.5
2
2.5
3
3.5
Volts (V)
4
4.5
5
Figure 2. Supply Current vs Supply Voltage Output Low
(LMV33x)
700
55
-40C
25C
85C
650
600
50
550
500
450
400
350
300
250
47.5
45
42.5
40
37.5
35
32.5
200
30
150
27.5
100
0
5
10
15
-40C
25C
85C
52.5
Input Bias Current (nA)
Output Voltage (mV)
95
90
85
80
75
70
65
60
55
50
45
40
35
30
25
20
25
30
35
Output Current (mA)
40
45
25
2.4
50
Figure 3. Output Voltage vs Output Current
2.7
3
3.3
3.6 3.9 4.2 4.5
Supply Voltage (V)
4.8
5.1
5.4
5.7
Figure 4. Input Bias Current vs Supply Voltage
310
176.1
175.8
305
175.5
300
175.2
174.9
Time (ns)
Time (ns)
295
290
285
280
174.6
174.3
174
173.7
173.4
275
173.1
270
172.8
265
172.5
0
10
20
30
40
50
60
Overdrive (mV)
70
80
90
100
Figure 5. Response Time vs Input Overdrives Negative
Transition (VCC=5 V)
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0
10
20
30
40
50
60
Overdrive (mV)
70
80
90
100
Figure 6. Response Time vs Input Overdrives Positive
Transition (VCC = 5 V)
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Typical Characteristics (continued)
648
189
645
188.7
642
188.4
639
188.1
636
187.8
Time (ns)
Time (ns)
Unless otherwise specified, VS = +5V, single supply, TA = 25°C
633
630
627
187.2
186.9
624
186.6
621
186.3
618
186
615
185.7
612
185.4
0
10
20
30
40
50
60
Overdrive (mV)
70
80
90
100
Figure 7. Response Time vs Input Overdrives Negative
Transition (VCC = 2.7 V)
8
187.5
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0
10
20
30
40
50
60
Overdrive (mV)
70
80
90
100
Figure 8. Response Time vs Input Overdrives Positive
Transition (VCC = 2.7 V)
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8 Detailed Description
8.1 Overview
The LMV331, LMV393 and LMV339 family of comparators have the ability to operate up to 5 V on the supply pin.
This standard device has proven ubiquity and versatility across a wide range of applications. This is due to it's
low Iq and fast response.
The open-drain output allows the user to configure the output's logic low voltage (VOL) and can be utilized to
enable the comparator to be used in AND functionality.
8.2 Functional Block Diagram
VCC+
Q6
Q7
Q8
OUT
IN+
Q1
Q2
Q3
Q4
Q5
Q9
IN−
R1
R3
R2
GND
8.3 Feature Description
The LMV331, LMV393 and LMV339 consists of a PNP input, whose Vbe creates a limit on the input common
mode voltage capability, allowing LMV33x to accurately function from ground to VCC–Vbe(~700mV) differential
input. This enables much head room for modern day supplies of 3.3 V and 5.0 V.
The output consists of an open drain NPN (pull-down or low side) transistor. The output NPN will sink current
when the positive input voltage is higher than the negative input voltage and the offset voltage. The VOL is
resistive and will scale with the output current. Please see Figure 3 for VOL values with respect to the output
current.
8.4 Device Functional Modes
8.4.1 Voltage Comparison
The LMV33x operates solely as a voltage comparator, comparing the differential voltage between the positive
and negative pins and outputs a logic low or high impedance (logic high with pull-up) based on the input
differential polarity.
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
LMV331, LMV393, and LMV339 will typically be used to compare a single signal to a reference or two signals
against each other. Many users take advantage of the open drain output to drive the comparison logic output to a
logic voltage level to an MCU or logic device. The wide supply range and high voltage capability makes LMV331,
LMV393, and LMV33 optimal for level shifting to a higher or lower voltage.
9.2 Typical Application
VLOGIC
VLOGIC
VSUP
Vin
VSUP
Rpullup
+
Vin+
LMV33x
Rpullup
+
LMV33x
Vin-
Vref
CL
CL
Figure 9. Typical Application Schematic
9.2.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters.
Table 1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Input Voltage Range
0 V to 4.2 V
Supply Voltage
2.7 V to 5V
Logic Supply Voltage (RPULLUP Voltage)
1 V to 5 V
Output Current (VLOGIC/RPULLUP)
1 µA to 20 mA
Input Overdrive Voltage
100 mV
Reference Voltage
2.5 V
Load Capacitance (CL)
15 pF
9.2.2 Detailed Design Procedure
When using LMV331, LMV393, and LMV33 in a general comparator application, determine the following:
• Input Voltage Range
• Minimum Overdrive Voltage
• Output and Drive Current
• Response Time
10
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9.2.2.1 Input Voltage Range
When choosing the input voltage range, the input common mode voltage range (VICR) must be taken in to
account. If operating temperature is above or below 25°C the VICR can range from 0 V to VCC– 0.7 V. This limits
the input voltage range to as high as VCC– 0.7 V and as low as 0 V. Operation outside of this range can yield
incorrect comparisons.
Below is a possible list of input voltage situation and their outcomes:
1. When both IN- and IN+ are both within the common mode range:
(a) If IN- is higher than IN+ and the offset voltage, the output is low and the output transistor is sinking
current
(b) If IN- is lower than IN+ and the offset voltage, the output is high impedance and the output transistor is
not conducting
2. When IN- is higher than common mode and IN+ is within common mode, the output is low and the output
transistor is sinking current
3. When IN+ is higher than common mode and IN- is within common mode, the output is high impedance and
the output transistor is not conducting
4. When IN- and IN+ are both higher than common mode, the output is low and the output transistor is sinking
current
9.2.2.2 Minimum Overdrive Voltage
Overdrive Voltage is the differential voltage produced between the positive and negative inputs of the comparator
over the offset voltage (VIO). In order to make an accurate comparison; the Overdrive Voltage (VOD) should be
higher than the input offset voltage (VIO). Overdrive voltage can also determine the response time of the
comparator, with the response time decreasing with increasing overdrive. Figure 10 show positive and negative
response times with respect to overdrive voltage.
9.2.2.3 Output and Drive Current
Output current is determined by the pull-up resistance (Rpullup) and Vlogic voltage, refer to Figure 9. The output
current will produce a output low voltage (VOL) from the comparator. In which VOL is proportional to the output
current. Use Figure 3 to determine VOL based on the output current.
The output current can also effect the transient response. More will be explained in the next section.
9.2.2.4 Response Time
The transient response can be determined by the load capacitance (CL), load/pull-up resistance (RPULLUP) and
equivalent collector-emitter resistance (RCE).
•
•
The positive response time (τp) is approximately τP ~ RPULLUP × CL
The negative response time (τN) is approximately τN ~ RCE × CL
– RCE can be determine by taking the slope of Figure 3 in it's linear region at the desired temperature, or by
dividing the VOL by Iout
9.2.3 Application Curves
The following curves were generated with 5 V on VCC and VLogic, RPULLUP = 5.1 kΩ, and 50 pF scope probe.
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Voltage (V)
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6
5.5
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
-0.5
-1
0.2
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5mV OD
20mV OD
100mV OD
0.22 0.24 0.26 0.28 0.3 0.32 0.34 0.36 0.38
Time (uS)
0.4
Figure 10. Response Time for Various Overdrives
(Negative Transition)
10 Power Supply Recommendations
For fast response and comparison applications with noisy or AC inputs, it is recommended to use a bypass
capacitor on the supply pin to reject any variation on the supply voltage. This variation cause temporary
fluctuations in the comparator's input common mode range and create an inaccurate comparison.
11 Layout
11.1 Layout Guidelines
For accurate comparator applications without hysteresis it is important maintain a stable power supply with
minimized noise and glitches, which can affect the high level input common mode voltage range. In order to
achieve this, it is best to add a bypass capacitor between the supply voltage and ground. This should be
implemented on the positive power supply and negative supply (if available). If a negative supply is not being
used, do not put a capacitor between the IC's GND pin and system ground.
11.2 Layout Example
Ground
Bypass
Capacitor
0.1 μF
Negative Supply or Ground
Only needed
for dual power
supplies
IN–
1
GND
IN+
2
3
5
V CC
4
OUT
Positive Supply
0.1 μF
Ground
Figure 11. LMV331 Layout Example
12
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LMV331, LMV393, LMV339
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SLCS136T – AUGUST 1999 – REVISED JANUARY 2015
12 Device and Documentation Support
12.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 2. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
LMV331
Click here
Click here
Click here
Click here
Click here
LMV393
Click here
Click here
Click here
Click here
Click here
LMV339
Click here
Click here
Click here
Click here
Click here
12.2 Trademarks
All trademarks are the property of their respective owners.
12.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 1999–2015, Texas Instruments Incorporated
Submit Documentation Feedback
13
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2015
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LMV331IDBVR
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(R1IC ~ R1II)
LMV331IDBVRE4
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(R1IC ~ R1II)
LMV331IDBVRG4
ACTIVE
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(R1IC ~ R1II)
LMV331IDBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(R1IC ~ R1II)
LMV331IDBVTE4
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(R1IC ~ R1II)
LMV331IDBVTG4
ACTIVE
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(R1IC ~ R1II)
LMV331IDCKR
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU |
CU NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
(R2I ~ R2K ~ R2R)
LMV331IDCKRE4
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
(R2I ~ R2K ~ R2R)
LMV331IDCKRG4
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
(R2I ~ R2K ~ R2R)
LMV331IDCKT
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU |
CU NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
(R2C ~ R2I ~ R2R)
LMV331IDCKTE4
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
(R2C ~ R2I ~ R2R)
LMV331IDCKTG4
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
(R2C ~ R2I ~ R2R)
LMV339ID
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LMV339I
LMV339IDG4
ACTIVE
SOIC
D
14
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LMV339I
LMV339IDR
ACTIVE
SOIC
D
14
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
LMV339I
LMV339IPW
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV339I
LMV339IPWG4
ACTIVE
TSSOP
PW
14
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV339I
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2015
Orderable Device
Status
(1)
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LMV339IPWR
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV339I
LMV339IPWRE4
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV339I
LMV339IPWRG4
ACTIVE
TSSOP
PW
14
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV339I
LMV339IRUCR
ACTIVE
QFN
RUC
14
3000
Green (RoHS
& no Sb/Br)
CU NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
RT
LMV393ID
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV393I
LMV393IDDUR
ACTIVE
VSSOP
DDU
8
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
RABR
LMV393IDE4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV393I
LMV393IDGKR
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU |
CU NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
(R9B ~ R9Q ~ R9R)
LMV393IDGKRG4
ACTIVE
VSSOP
DGK
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
(R9B ~ R9Q ~ R9R)
LMV393IDR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU | CU SN
Level-1-260C-UNLIM
-40 to 125
MV393I
LMV393IDRE4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV393I
LMV393IDRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV393I
LMV393IPW
ACTIVE
TSSOP
PW
8
150
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV393I
LMV393IPWG4
ACTIVE
TSSOP
PW
8
150
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV393I
LMV393IPWR
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV393I
LMV393IPWRE4
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV393I
LMV393IPWRG4
ACTIVE
TSSOP
PW
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
MV393I
The marketing status values are defined as follows:
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2015
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LMV331, LMV393 :
• Automotive: LMV331-Q1, LMV393-Q1
NOTE: Qualified Version Definitions:
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2015
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Jul-2015
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
LMV331IDBVR
SOT-23
DBV
5
3000
180.0
9.2
LMV331IDBVR
SOT-23
DBV
5
3000
178.0
LMV331IDBVT
SOT-23
DBV
5
250
178.0
LMV331IDBVT
SOT-23
DBV
5
250
LMV331IDCKR
SC70
DCK
5
LMV331IDCKR
SC70
DCK
LMV331IDCKT
SC70
DCK
LMV331IDCKT
SC70
W
Pin1
(mm) Quadrant
3.17
3.23
1.37
4.0
8.0
Q3
9.0
3.23
3.17
1.37
4.0
8.0
Q3
9.0
3.23
3.17
1.37
4.0
8.0
Q3
180.0
9.2
3.17
3.23
1.37
4.0
8.0
Q3
3000
180.0
9.2
2.3
2.55
1.2
4.0
8.0
Q3
5
3000
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
5
250
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
DCK
5
250
180.0
9.2
2.3
2.55
1.2
4.0
8.0
Q3
LMV339IDR
SOIC
D
14
2500
330.0
16.4
6.5
9.0
2.1
8.0
16.0
Q1
LMV339IPWR
TSSOP
PW
14
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
LMV339IRUCR
QFN
RUC
14
3000
180.0
8.4
2.3
2.3
0.55
4.0
8.0
Q2
LMV393IDDUR
VSSOP
DDU
8
3000
180.0
8.4
2.25
3.35
1.05
4.0
8.0
Q3
LMV393IDGKR
VSSOP
DGK
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMV393IDR
SOIC
D
8
2500
330.0
12.8
6.4
5.2
2.1
8.0
12.0
Q1
LMV393IDR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
LMV393IDRG4
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
LMV393IPWR
TSSOP
PW
8
2000
330.0
12.4
7.0
3.6
1.6
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Jul-2015
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LMV331IDBVR
SOT-23
DBV
5
3000
205.0
200.0
33.0
LMV331IDBVR
SOT-23
DBV
5
3000
180.0
180.0
18.0
LMV331IDBVT
SOT-23
DBV
5
250
180.0
180.0
18.0
LMV331IDBVT
SOT-23
DBV
5
250
205.0
200.0
33.0
LMV331IDCKR
SC70
DCK
5
3000
205.0
200.0
33.0
LMV331IDCKR
SC70
DCK
5
3000
180.0
180.0
18.0
LMV331IDCKT
SC70
DCK
5
250
180.0
180.0
18.0
LMV331IDCKT
SC70
DCK
5
250
205.0
200.0
33.0
LMV339IDR
SOIC
D
14
2500
367.0
367.0
38.0
LMV339IPWR
TSSOP
PW
14
2000
367.0
367.0
35.0
LMV339IRUCR
QFN
RUC
14
3000
202.0
201.0
28.0
LMV393IDDUR
VSSOP
DDU
8
3000
202.0
201.0
28.0
LMV393IDGKR
VSSOP
DGK
8
2500
364.0
364.0
27.0
LMV393IDR
SOIC
D
8
2500
364.0
364.0
27.0
LMV393IDR
SOIC
D
8
2500
340.5
338.1
20.6
LMV393IDRG4
SOIC
D
8
2500
340.5
338.1
20.6
LMV393IPWR
TSSOP
PW
8
2000
367.0
367.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
PW0008A
TSSOP - 1.2 mm max height
SCALE 2.800
SMALL OUTLINE PACKAGE
C
6.6
TYP
6.2
SEATING PLANE
PIN 1 ID
AREA
A
0.1 C
6X 0.65
8
1
3.1
2.9
NOTE 3
2X
1.95
4
5
B
4.5
4.3
NOTE 4
SEE DETAIL A
8X
0.30
0.19
0.1
C A
1.2 MAX
B
(0.15) TYP
0.25
GAGE PLANE
0 -8
0.15
0.05
0.75
0.50
DETAIL A
TYPICAL
4221848/A 02/2015
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
PW0008A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
8X (1.5)
8X (0.45)
SYMM
1
8
(R0.05)
TYP
SYMM
6X (0.65)
5
4
(5.8)
LAND PATTERN EXAMPLE
SCALE:10X
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4221848/A 02/2015
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
PW0008A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
8X (1.5)
8X (0.45)
SYMM
(R0.05) TYP
1
8
SYMM
6X (0.65)
5
4
(5.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:10X
4221848/A 02/2015
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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