MC33201, MC33202, MC33204, NCV33202, NCV33204 Low Voltage, Rail−to−Rail Operational Amplifiers http://onsemi.com The MC33201/2/4 family of operational amplifiers provide rail−to−rail operation on both the input and output. The inputs can be driven as high as 200 mV beyond the supply rails without phase reversal on the outputs, and the output can swing within 50 mV of each rail. This rail−to−rail operation enables the user to make full use of the supply voltage range available. It is designed to work at very low supply voltages (± 0.9 V) yet can operate with a supply of up to +12 V and ground. Output current boosting techniques provide a high output current capability while keeping the drain current of the amplifier to a minimum. Also, the combination of low noise and distortion with a high slew rate and drive capability make this an ideal amplifier for audio applications. PDIP−8 P, VP SUFFIX CASE 626 8 1 8 1 • Low Voltage, Single Supply Operation • • • • • • • • • • (+1.8 V and Ground to +12 V and Ground) Input Voltage Range Includes both Supply Rails Output Voltage Swings within 50 mV of both Rails No Phase Reversal on the Output for Over−driven Input Signals High Output Current (ISC = 80 mA, Typ) Low Supply Current (ID = 0.9 mA, Typ) 600 W Output Drive Capability Extended Operating Temperature Ranges (−40° to +105°C and −55° to +125°C) Typical Gain Bandwidth Product = 2.2 MHz NCV Prefix for Automotive and Other Applications Requiring Site and Control Changes Pb−Free Packages are Available 8 1 SOIC−8 D, VD SUFFIX CASE 751 Micro8] DM SUFFIX CASE 846A PDIP−14 P, VP SUFFIX CASE 646 14 1 14 1 14 1 SOIC−14 D, VD SUFFIX CASE 751A TSSOP−14 DTB SUFFIX CASE 948G ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. DEVICE MARKING INFORMATION See general marking information in the device marking section on page 12 of this data sheet. © Semiconductor Components Industries, LLC, 2006 October, 2006 − Rev. 14 1 Publication Order Number: MC33201/D MC33201, MC33202, MC33204, NCV33202, NCV33204 PIN CONNECTIONS MC33204 All Case Styles MC33201 All Case Styles NC 1 8 2 7 Output 1 1 NC 2 VCC Inputs 1 Inputs 3 6 Output VEE 4 5 NC 2 Inputs 1 1 3 VEE 4 4 13 12 11 5 10 6 2 3 Output 2 7 MC33202 All Case Styles Output 1 1 1 3 VCC 4 Inputs 2 (Top View) 14 Output 4 9 8 Inputs 4 VEE Inputs 3 Output 3 (Top View) 8 VCC 7 Output 2 6 2 Inputs 2 5 (Top View) VCC VCC VEE VCC Vin− Vout VCC Vin+ VEE This device contains 70 active transistors (each amplifier). Figure 1. Circuit Schematic (Each Amplifier) http://onsemi.com 2 MC33201, MC33202, MC33204, NCV33202, NCV33204 MAXIMUM RATINGS Rating Symbol Value Unit VS +13 V Input Differential Voltage Range VIDR Note 1 V Common Mode Input Voltage Range (Note 2) VCM VCC + 0.5 V to VEE − 0.5 V V Output Short Circuit Duration ts Note 3 sec Maximum Junction Temperature TJ +150 °C Storage Temperature Tstg − 65 to +150 °C Maximum Power Dissipation PD Note 3 mW Supply Voltage (VCC to VEE) DC ELECTRICAL CHARACTERISTICS (TA = 25°C) Characteristic VCC = 2.0 V VCC = 3.3 V VCC = 5.0 V Input Offset Voltage VIO (max) MC33201 MC33202, NCV33202 MC33204, NCV33204 ± 8.0 ±10 ±12 ± 8.0 ±10 ±12 ± 6.0 ± 8.0 ±10 Output Voltage Swing VOH (RL = 10 kW) VOL (RL = 10 kW) 1.9 0.10 3.15 0.15 4.85 0.15 Power Supply Current per Amplifier (ID) 1.125 1.125 1.125 Unit mV Vmin Vmax mA Specifications at VCC = 3.3 V are guaranteed by the 2.0 V and 5.0 V tests. VEE = GND. DC ELECTRICAL CHARACTERISTICS (VCC = + 5.0 V, VEE = Ground, TA = 25°C, unless otherwise noted.) Characteristic Figure Symbol Input Offset Voltage (VCM 0 V to 0.5 V, VCM 1.0 V to 5.0 V) MC33201: TA = + 25°C MC33201: TA = − 40° to +105°C MC33201V: TA = − 55° to +125°C MC33202: TA = + 25°C MC33202: TA = − 40° to +105°C MC33202V: TA = − 55° to +125°C NCV33202V: TA = − 55° to +125°C (Note 4) MC33204: TA = + 25°C MC33204: TA = − 40° to +105°C MC33204V: TA = − 55° to +125°C NCV33204: TA = − 55° to +125°C 3 ⎮VIO⎮ Input Offset Voltage Temperature Coefficient (RS = 50 W) TA = − 40° to +105°C TA = − 55° to +125°C 4 Input Bias Current (VCM = 0 V to 0.5 V, VCM = 1.0 V to 5.0 V) TA = + 25°C TA = − 40° to +105°C TA = − 55° to +125°C 5, 6 DVIO/DT ⎮IIB⎮ Min Typ Max − − − − − − − − − − − − − − − − − − − − − − 6.0 9.0 13 8.0 11 14 14 10 13 17 17 − − 2.0 2.0 − − − − − 80 100 − 200 250 500 Unit mV mV/°C nA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. The differential input voltage of each amplifier is limited by two internal parallel back−to−back diodes. For additional differential input voltage range, use current limiting resistors in series with the input pins. 2. The input common mode voltage range is limited by internal diodes connected from the inputs to both supply rails. Therefore, the voltage on either input must not exceed either supply rail by more than 500 mV. 3. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded. (See Figure 2) 4. NCV33202 and NCV33204 are qualified for automotive use. http://onsemi.com 3 MC33201, MC33202, MC33204, NCV33202, NCV33204 DC ELECTRICAL CHARACTERISTICS (cont.) (VCC = + 5.0 V, VEE = Ground, TA = 25°C, unless otherwise noted.) Figure Symbol Input Offset Current (VCM = 0 V to 0.5 V, VCM = 1.0 V to 5.0 V) TA = + 25°C TA = − 40° to +105°C TA = − 55° to +125°C Characteristic − ⎮IIO⎮ Common Mode Input Voltage Range − VICR Large Signal Voltage Gain (VCC = + 5.0 V, VEE = − 5.0 V) RL = 10 kW RL = 600 W 7 AVOL Output Voltage Swing (VID = ± 0.2 V) RL = 10 kW RL = 10 kW RL = 600 W RL = 600 W Min Typ Max − − − 5.0 10 − 50 100 200 VEE − VCC Unit nA V kV/V 50 25 300 250 − − VOH VOL VOH VOL 4.85 − 4.75 − 4.95 0.05 4.85 0.15 − 0.15 − 0.25 60 90 − 500 25 − 50 80 − − − 0.9 0.9 1.125 1.125 8, 9, 10 V Common Mode Rejection (Vin = 0 V to 5.0 V) 11 CMR Power Supply Rejection Ratio VCC/VEE = 5.0 V/GND to 3.0 V/GND 12 PSRR Output Short Circuit Current (Source and Sink) 13, 14 ISC Power Supply Current per Amplifier (VO = 0 V) TA = − 40° to +105°C TA = − 55° to +125°C 15 ID dB mV/V mA mA AC ELECTRICAL CHARACTERISTICS (VCC = + 5.0 V, VEE = Ground, TA = 25°C, unless otherwise noted.) Characteristic Slew Rate (VS = ± 2.5 V, VO = − 2.0 V to + 2.0 V, RL = 2.0 kW, AV = +1.0) Figure Symbol 16, 26 SR Min Typ Max 0.5 1.0 − Unit V/ms Gain Bandwidth Product (f = 100 kHz) 17 GBW − 2.2 − MHz Gain Margin (RL = 600 W, CL = 0 pF) 20, 21, 22 AM − 12 − dB Phase Margin (RL = 600 W, CL = 0 pF) 20, 21, 22 OM − 65 − Deg 23 CS − 90 − dB BWP − 28 − kHz − − 0.002 0.008 − − − 100 − Rin − 200 − kW Cin − 8.0 − pF − − 25 20 − − nV/ Hz − − 0.8 0.2 − − Channel Separation (f = 1.0 Hz to 20 kHz, AV = 100) Power Bandwidth (VO = 4.0 Vpp, RL = 600 W, THD ≤ 1 %) 24 Total Harmonic Distortion (RL = 600 W, VO = 1.0 Vpp, AV = 1.0) f = 1.0 kHz f = 10 kHz Open Loop Output Impedance (VO = 0 V, f = 2.0 MHz, AV = 10) THD ⎮ZO⎮ Differential Input Resistance (VCM = 0 V) Differential Input Capacitance (VCM = 0 V) Equivalent Input Noise Voltage (RS = 100 W) f = 10 Hz f = 1.0 kHz 25 Equivalent Input Noise Current f = 10 Hz f = 1.0 kHz 25 http://onsemi.com 4 en in % W pA/ Hz 2500 40 PERCENTAGE OF AMPLIFIERS (%) PD(max) , MAXIMUM POWER DISSIPATION (mW MC33201, MC33202, MC33204, NCV33202, NCV33204 8 and 14 Pin DIP Pkg 2000 TSSOP−14 Pkg 1500 SO−14 Pkg 1000 SOIC−8 Pkg 500 0 −55 −40 −25 0 25 50 85 TA, AMBIENT TEMPERATURE (°C) 30 25 20 15 10 5.0 0 −10 −8.0 −6.0 −4.0 −2.0 0 2.0 4.0 6.0 VIO, INPUT OFFSET VOLTAGE (mV) 125 Figure 2. Maximum Power Dissipation versus Temperature I IB , INPUT BIAS CURRENT (nA) 30 160 120 20 10 0 −50 −40 −30 −20 −10 0 10 20 30 40 VCC = +5.0 V VEE = Gnd VCM = 0 V to 0.5 V 80 VCM > 1.0 V 40 0 −55 −40 −25 50 TCV , INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT (mV/°C) IO 0 25 70 85 125 TA, AMBIENT TEMPERATURE (°C) Figure 5. Input Bias Current versus Temperature A VOL , OPEN LOOP VOLTAGE GAIN (kV/V) Figure 4. Input Offset Voltage Temperature Coefficient Distribution 150 I IB , INPUT BIAS CURRENT (nA) 10 200 360 amplifiers tested from 3 (MC33204) wafer lots VCC = +5.0 V VEE = Gnd TA = 25°C DIP Package 40 300 100 260 50 0 220 −50 180 −100 −150 VCC = 12 V VEE = Gnd TA = 25°C −200 −250 8.0 Figure 3. Input Offset Voltage Distribution 50 PERCENTAGE OF AMPLIFIERS (%) 360 amplifiers tested from 3 (MC33204) wafer lots VCC = +5.0 V VEE = Gnd TA = 25°C DIP Package 35 0 2.0 4.0 6.0 8.0 10 VCM, INPUT COMMON MODE VOLTAGE (V) 140 VCC = +5.0 V VEE = Gnd RL = 600 W DVO = 0.5 V to 4.5 V 100 −55 −40 −25 12 Figure 6. Input Bias Current versus Common Mode Voltage 0 25 70 85 TA, AMBIENT TEMPERATURE (°C) 105 Figure 7. Open Loop Voltage Gain versus Temperature http://onsemi.com 5 125 VO , OUTPUT VOLTAGE (Vpp ) 12 VSAT, OUTPUT SATURATION VOLTAGE (V) MC33201, MC33202, MC33204, NCV33202, NCV33204 RL = 600 W TA = 25°C 10 8.0 6.0 4.0 2.0 0 ±1.0 ±2.0 ±3.0 ±4.0 ±5.0 VCC,⎮VEE⎮ SUPPLY VOLTAGE (V) ±6.0 VCC TA = −55°C TA = 125°C VCC − 0.4 V TA = −55°C 5.0 CMR, COMMON MODE REJECTION (dB) VO, OUTPUT VOLTAGE (Vpp ) 10 IL, LOAD CURRENT (mA) VEE 20 15 6.0 VCC = +6.0 V VEE = −6.0 V RL = 600 W AV = +1.0 TA = 25°C 100 80 60 40 VCC = +6.0 V VEE = −6.0 V TA = −55° to +125°C 20 0 1.0 M 10 100 1.0 k 10 k f, FREQUENCY (Hz) 100 k 1.0 M Figure 11. Common Mode Rejection versus Frequency I SC , OUTPUT SHORT CIRCUIT CURRENT (mA) Figure 10. Output Voltage versus Frequency PSR, POWER SUPPLY REJECTION (dB) VEE + 0.2 V Figure 9. Output Saturation Voltage versus Load Current 9.0 10 k 100 k f, FREQUENCY (Hz) TA = 25°C TA = 125°C 0 12 0 1.0 k VEE + 0.4 V VCC = +5.0 V VEE = −5.0 V Figure 8. Output Voltage Swing versus Supply Voltage 3.0 VCC − 0.2 V TA = 25°C 120 100 100 PSR+ 80 60 PSR− 40 VCC = +6.0 V VEE = −6.0 V TA = −55° to +125°C 20 0 10 100 1.0 k 10 k f, FREQUENCY (Hz) 100 k 1.0 M Source 80 60 Sink 40 VCC = +6.0 V VEE = −6.0 V TA = 25°C 20 0 0 Figure 12. Power Supply Rejection versus Frequency 1.0 2.0 3.0 4.0 ⎮Vout⎮, OUTPUT VOLTAGE (V) 5.0 Figure 13. Output Short Circuit Current versus Output Voltage http://onsemi.com 6 6.0 I CC , SUPPLY CURRENT PER AMPLIFIER (mA) 2.0 150 125 VCC = +5.0 V VEE = Gnd 1.6 100 Source 75 TA = 125°C 1.2 Sink TA = 25°C 0.8 50 TA = −55°C 0.4 25 0 −55 −40 −25 0 25 70 85 TA, AMBIENT TEMPERATURE (°C) 105 125 0 ±0 ±1.0 Figure 14. Output Short Circuit Current versus Temperature GBW, GAIN BANDWIDTH PRODUCT (MHz) +Slew Rate 1.0 −Slew Rate 0.5 25 70 85 105 1.0 0 −55 −40 −25 0 25 70 85 105 TA, AMBIENT TEMPERATURE (°C) Figure 16. Slew Rate versus Temperature Figure 17. Gain Bandwidth Product versus Temperature 40 VS = ±6.0 V TA = 25°C RL = 600 W 50 80 120 30 1A 2A 10 −30 10 k 2.0 TA, AMBIENT TEMPERATURE (°C) 70 −10 VCC = +2.5 V VEE = −2.5 V f = 100 kHz 3.0 125 2B 1A − Phase, CL = 0 pF 1B − Gain, CL = 0 pF 2A − Phase, CL = 300 pF 2B − Gain, CL = 300 pF 100 k 1B 1.0 M 160 200 O , EXCESS PHASE (DEGREES) A VOL, OPEN LOOP VOLTAGE GAIN (dB) 0 4.0 A VOL, OPEN LOOP VOLTAGE GAIN (dB) SR, SLEW RATE (V/μ s) VCC = +2.5 V VEE = −2.5 V VO = ±2.0 V 0 −55 −40 −25 ±6.0 Figure 15. Supply Current per Amplifier versus Supply Voltage with No Load 2.0 1.5 ±2.0 ±3.0 ±4.0 ±5.0 VCC, ⎮VEE⎮, SUPPLY VOLTAGE (V) 70 30 1A 10 −10 1A − Phase, VS = ±6.0 V 1B − Gain, VS = ±6.0 V 2A − Phase, VS = ±1.0 V 2B − Gain, VS = ±1.0 V f, FREQUENCY (Hz) 100 k 1B 120 Figure 18. Voltage Gain and Phase versus Frequency 200 1.0 M Figure 19. Voltage Gain and Phase versus Frequency http://onsemi.com 160 2B f, FREQUENCY (Hz) 7 80 2A −30 10 k 240 10 M 40 CL = 0 pF TA = 25°C RL = 600 W 50 125 240 10 M O , EXCESS PHASE (DEGREES) I SC , OUTPUT SHORT CIRCUIT CURRENT (mA) MC33201, MC33202, MC33204, NCV33202, NCV33204 MC33201, MC33202, MC33204, NCV33202, NCV33204 75 60 50 50 30 VCC = +6.0 V VEE = −6.0 V RL = 600 W CL = 100 pF 40 30 20 20 10 10 Gain Margin 0 −55 −40 −25 0 25 70 85 105 60 60 VCC = +6.0 V VEE = −6.0 V TA = 25°C 45 30 30 15 0 0 125 10 100 16 60 Gain Margin 12 10 40 8.0 30 6.0 20 4.0 10 2.0 0 10 THD, TOTAL HARMONIC DISTORTION (%) 14 10 1.0 AV = 10 60 VCC = +6.0 V VEE = −6.0 V VO = 8.0 Vpp TA = 25°C 30 1.0 k 10 k f, FREQUENCY (Hz) Figure 22. Gain and Phase Margin versus Capacitive Load Figure 23. Channel Separation versus Frequency VCC = +5.0 V TA = 25°C VO = 2.0 Vpp VEE = −5.0 V RL = 600 W AV = 100 AV = 10 0.01 0.001 10 90 CL, CAPACITIVE LOAD (pF) AV = 1000 0.1 AV = 100 120 0 100 0 1.0 k 100 AV = 1.0 100 1.0 k 10 k 100 k en , EQUIVALENT INPUT NOISE VOLTAGE (nV/ Hz) 50 0 100 k 150 CS, CHANNEL SEPARATION (dB) Phase Margin 10 k Figure 21. Gain and Phase Margin versus Differential Source Resistance A , GAIN MARGIN (dB) M O M , PHASE MARGIN (DEGREES) 70 1.0 k RT, DIFFERENTIAL SOURCE RESISTANCE (W) Figure 20. Gain and Phase Margin versus Temperature VCC = +6.0 V VEE = −6.0 V RL = 600 W AV = 100 TA = 25°C 15 Gain Margin TA, AMBIENT TEMPERATURE (°C) 80 45 50 5.0 VCC = +6.0 V VEE = −6.0 V TA = 25°C 40 30 3.0 Noise Voltage 20 10 Noise Current 0 10 100 1.0 k 10 k f, FREQUENCY (Hz) Figure 25. Equivalent Input Noise Voltage and Current versus Frequency http://onsemi.com 8 2.0 1.0 f, FREQUENCY (Hz) Figure 24. Total Harmonic Distortion versus Frequency 4.0 0 100 k i n , INPUT REFERRED NOISE CURRENT (pA/ Hz) 40 75 Phase Margin A , GAIN MARGIN (dB) M 60 O M , PHASE MARGIN (DEGREES) 70 Phase Margin A , GAIN MARGIN (dB) M O M , PHASE MARGIN (DEGREES) 70 MC33201, MC33202, MC33204, NCV33202, NCV33204 DETAILED OPERATING DESCRIPTION Circuit Information The MC33201/2/4 family of operational amplifiers are unique in their ability to swing rail−to−rail on both the input and the output with a completely bipolar design. This offers low noise, high output current capability and a wide common mode input voltage range even with low supply voltages. Operation is guaranteed over an extended temperature range and at supply voltages of 2.0 V, 3.3 V and 5.0 V and ground. Since the common mode input voltage range extends from VCC to VEE, it can be operated with either single or split voltage supplies. The MC33201/2/4 are guaranteed not to latch or phase reverse over the entire common mode range, however, the inputs should not be allowed to exceed maximum ratings. Rail−to−rail performance is achieved at the input of the amplifiers by using parallel NPN−PNP differential input stages. When the inputs are within 800 mV of the negative rail, the PNP stage is on. When the inputs are more than 800 mV greater than VEE, the NPN stage is on. This switching of input pairs will cause a reversal of input bias currents (see Figure 6). Also, slight differences in offset voltage may be noted between the NPN and PNP pairs. Cross−coupling techniques have been used to keep this change to a minimum. In addition to its rail−to−rail performance, the output stage is current boosted to provide 80 mA of output current, enabling the op amp to drive 600 W loads. Because of this high output current capability, care should be taken not to exceed the 150°C maximum junction temperature. VCC = +6.0 V VEE = −6.0 V RL = 600 W CL = 100 pF TA = 25°C VCC = +6.0 V VEE = −6.0 V RL = 600 W CL = 100 pF TA = 25°C V , OUTPUT VOLTAGE (50 mV/DIV) O V , OUTPUT VOLTAGE (2.0 mV/DIV) O General Information t, TIME (5.0 ms/DIV) t, TIME (10 ms/DIV) V , OUTPUT VOLTAGE (2.0 V/DIV) O Figure 26. Noninverting Amplifier Slew Rate Figure 27. Small Signal Transient Response VCC = +6.0 V VEE = −6.0 V RL = 600 W CL = 100 pF AV = 1.0 TA = 25°C t, TIME (10 ms/DIV) Figure 28. Large Signal Transient Response Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to ensure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self−align when subjected to a solder reflow process. http://onsemi.com 9 MC33201, MC33202, MC33204, NCV33202, NCV33204 ORDERING INFORMATION Operational Amplifier Function Device Operating Temperature Range MC33201D SOIC−8 (Pb−Free) MC33201DR2 SOIC−8 TA= −40° to +105°C MC33201P PDIP−8 (Pb−Free) MC33201VD SOIC−8 (Pb−Free) SOIC−8 MC33202DG SOIC−8 (Pb−Free) MC33202DR2 SOIC−8 MC33202DR2G MC33202DMR2 TA= −40 ° to +105°C MC33202DMR2G SOIC−8 (Pb−Free) 50 Units / Rail 98 Units / Rail 2500 / Tape & Reel Micro−8 Micro−8 (Pb−Free) MC33202P 4000 / Tape & Reel PDIP−8 MC33202PG PDIP−8 (Pb−Free) MC33202VD SOIC−8 MC33202VDG SOIC−8 (Pb−Free) MC33202VDR2 SOIC−8 MC33202VDR2G NCV33202VDR2* 2500 / Tape & Reel SOIC−8 TA = −55° to 125°C MC33202D Dual SOIC−8 (Pb−Free) 98 Units / Rail PDIP−8 MC33201PG MC33201VDG Shipping † SOIC−8 MC33201DG MC33201DR2G Single Package TA = −55° to 125°C NCV33202VDR2G* SOIC−8 (Pb−Free) SOIC−8 50 Units / Rail 98 Units / Rail 2500 / Tape & Reel SOIC−8 (Pb−Free) MC33202VP PDIP−8 MC33202VPG PDIP−8 (Pb−Free) 50 Units / Rail †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NCV33202 and NCV33204 are qualified for automotive use. http://onsemi.com 10 MC33201, MC33202, MC33204, NCV33202, NCV33204 ORDERING INFORMATION (continued) Operational Amplifier Function Device Operating Temperature Range MC33204D MC33204DG SO−14 (Pb−Free) MC33204DR2 SO−14 MC33204DTB SO−14 (Pb−Free) TA= −40 ° to +105°C TSSOP−14* MC33204DTBG TSSOP−14* MC33204DTBR2 TSSOP−14* MC33204DTBR2G TSSOP−14* MC33204P PDIP−14 MC33204PG PDIP−14 (Pb−Free) MC33204VD SO−14 MC33204VDG SO−14 (Pb−Free) MC33204VDR2 SO−14 MC33204VDR2G NCV33204DR2** NCV33204DR2G** Shipping † SO−14 MC33204DR2G Quad Package 55 Units / Rail 2500 / Tape & Reel 96 Units / Rail 2500 / Tape & Reel 25 Units / Rail 55 Units / Rail SO−14 (Pb−Free) TA = −55° to 125°C SO−14 SO−14 (Pb−Free) NCV33204DTBR2** TSSOP−14* NCV33204DTBR2G** TSSOP−14* MC33204VP PDIP−14 MC33204VPG PDIP−14 (Pb−Free) 2500 / Tape & Reel 25 Units / Rail †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. **NCV33202 and NCV33204 are qualified for automotive use. http://onsemi.com 11 MC33201, MC33202, MC33204, NCV33202, NCV33204 MARKING DIAGRAMS SOIC−8 D SUFFIX CASE 751 8 1 8 3320x ALYW G 1 320xV ALYW G PDIP−8 VP SUFFIX CASE 626 PDIP−8 P SUFFIX CASE 626 SOIC−8 VD SUFFIX CASE 751 * 8 8 MC3320xP AWL YYWWG 14 MC33204VDG AWLYWW 1 * MC33204P AWLYYWWG 1 14 MC33204VP AWLYYWWG 1 http://onsemi.com 12 MC33204DG AWLYWW 1 TSSOP−14 DTB SUFFIX CASE 948G 14 MC33 204 ALYWG G 1 x = 1 or 2 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G = Pb−Free Package G = Pb−Free Package (Note: Microdot may be in either location) *This marking diagram applies to NCV3320x 14 1 PDIP−14 VP SUFFIX CASE 646 14 SO−14 D SUFFIX CASE 751A 3202 AYWG G 1 PDIP−14 P SUFFIX CASE 646 14 8 MC33202VP AWL YYWWG 1 SO−14 VD SUFFIX CASE 751A Micro−8 DM SUFFIX CASE 846A MC33 204V ALYWG G 1 * MC33201, MC33202, MC33204, NCV33202, NCV33204 PACKAGE DIMENSIONS PDIP−8 P, VP SUFFIX CASE 626−05 ISSUE L 8 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5 −B− 1 4 F −A− NOTE 2 L C J −T− N SEATING PLANE D H M K G 0.13 (0.005) M T A M B M http://onsemi.com 13 DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC −−− 10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC −−− 10_ 0.030 0.040 MC33201, MC33202, MC33204, NCV33202, NCV33204 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AH −X− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 1 0.25 (0.010) M Y M 4 −Y− K G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− 0.10 (0.004) H D 0.25 (0.010) M Z Y S X M J S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 14 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8 _ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 MC33201, MC33202, MC33204, NCV33202, NCV33204 PACKAGE DIMENSIONS Micro8 DM SUFFIX CASE 846A−02 ISSUE G D HE PIN 1 ID NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. 846A−01 OBSOLETE, NEW STANDARD 846A−02. E e b 8 PL 0.08 (0.003) M T B S A S SEATING −T− PLANE 0.038 (0.0015) A A1 MILLIMETERS NOM MAX −− 1.10 0.08 0.15 0.33 0.40 0.18 0.23 3.00 3.10 3.00 3.10 0.65 BSC 0.40 0.55 0.70 4.75 4.90 5.05 DIM A A1 b c D E e L HE MIN −− 0.05 0.25 0.13 2.90 2.90 L c SOLDERING FOOTPRINT* 8X 1.04 0.041 0.38 0.015 3.20 0.126 6X 8X 4.24 0.167 0.65 0.0256 5.28 0.208 SCALE 8:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 15 INCHES NOM −− 0.003 0.013 0.007 0.118 0.118 0.026 BSC 0.016 0.021 0.187 0.193 MIN −− 0.002 0.010 0.005 0.114 0.114 MAX 0.043 0.006 0.016 0.009 0.122 0.122 0.028 0.199 MC33201, MC33202, MC33204, NCV33202, NCV33204 PACKAGE DIMENSIONS PDIP−14 CASE 646−06 ISSUE P 14 8 1 7 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. B A F L N C −T− SEATING PLANE H G D 14 PL J K 0.13 (0.005) M M http://onsemi.com 16 DIM A B C D F G H J K L M N INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 −−− 10 _ 0.015 0.039 MILLIMETERS MIN MAX 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 −−− 10 _ 0.38 1.01 MC33201, MC33202, MC33204, NCV33202, NCV33204 SOIC−14 CASE 751A−03 ISSUE H NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. −A− 14 8 −B− P 7 PL 0.25 (0.010) M 7 1 G −T− D 14 PL 0.25 (0.010) T B S A DIM A B C D F G J K M P R J M K M F R X 45 _ C SEATING PLANE B M S SOLDERING FOOTPRINT* 7X 7.04 14X 1.52 1 14X 0.58 1.27 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 17 MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 MC33201, MC33202, MC33204, NCV33202, NCV33204 PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE B 14X K REF 0.10 (0.004) 0.15 (0.006) T U M T U V S S N 2X 14 L/2 0.25 (0.010) 8 M B −U− L PIN 1 IDENT. N F 7 1 0.15 (0.006) T U NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. S S DETAIL E ÇÇÇ ÉÉÉ ÇÇÇ ÉÉÉ ÇÇÇ K A −V− K1 J J1 DIM A B C D F G H J J1 K K1 L M SECTION N−N −W− C 0.10 (0.004) −T− SEATING PLANE D H G DETAIL E SOLDERING FOOTPRINT* 7.06 1 0.65 PITCH 14X 0.36 14X 1.26 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 18 MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 −−− 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 −−− 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ MC33201, MC33202, MC33204, NCV33202, NCV33204 Micro8 is a trademark of International Rectifier. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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