CM1214 1 and 2-Channel AC Signal ESD Protector Product Description The CM1214 ESD protector guards bipolar signal lines against electrostatic discharge (ESD). The CM1214 allows operation in high−speed environments with signals levels up to ±5 V. The low sub−1 pF loading capacitance makes the CM1214−01SO ideal for protecting high−speed interfaces including RF switches and amplifiers. The CM1214−02MR is ideal for dual high−speed signal pairs used in Gigabit Ethernet, ADSL, etc. The CM1214−02MR can also be used for higher transmit voltage applications by connecting the two channels in series. The CM1214−01SO is a single channel ESD protector available in a 3−lead SOT23−3 package. The CM1214−02MR is a dual channel ESD protector and is available in an 8−lead MSOP−8 package. http://onsemi.com SOT−23 SO SUFFIX CASE 419AH MSOP−8 MR SUFFIX CASE 846AD ELECTRICAL SCHEMATICS CH1 Features CH1 CH3 CH2 CH4 • Single Channel ESD Protection for an AC Signal Up to ±5 V for 0.25 W Transmit Power • Connects Two Channels in Series for Signals Up to ±10 V • • • • • • (1 W Transmit Power) ±8 kV ESD Protection Per IEC 61000−4−2 Contact Discharge Sub−1 pF Loading Capacitance Minimal Variation with Voltage and Temperature Can Withstand Over 1000 ESD Strikes at 8 kV SOT23−3 and MSOP−8 Package Options These Devices are Pb−Free and are RoHS Compliant CM1214−02MR MARKING DIAGRAM RF1R MG G RF2R MG G 1 Applications • • • • CH2 CM1214−01SO RF Switch and Amplifier Protection RF Modules and RF IC Protection Wireless Handsets and WLAN High−Speed AC Signals for Gbit Ethernet, etc. XXX = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Device Package Shipping† CM1214−01SO SOT23 (Pb−Free) 3000/Tape & Reel CM1214−02MR MSOP (Pb−Free) 4000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2014 January, 2014 − Rev. 2 1 Publication Order Number: CM1214/D CM1214 PACKAGE / PINOUT DIAGRAMS Table 1. PIN DESCRIPTIONS SOT23−3 Package Name 1 CH1 ESD Channel 2 CH2 ESD Channel 3 N.C. No connect Top View Description CH1 1 RF1R Pin CH2 N.C. 3 2 MSOP−8 Package SOT23−3 Pin Name Description 1 CH1 ESD Channel 2 N.C. No connect 3 N.C. No connect CH1 1 8 N.C. 4 CH3 ESD Channel N.C. 2 7 CH2 5 N.C. No connect N.C. 3 6 CH4 6 CH4 ESD Channel CH3 4 5 N.C. 7 CH2 ESD Channel 8 N.C. No connect Top View RF2R MSOP−8 SPECIFICATIONS Table 2. ABSOLUTE MAXIMUM RATINGS Parameter Rating Units DC Voltage between CH pins 7 V Operating Temperature Range −40 to +85 °C Storage Temperature Range −65 to +150 °C Package Power Rating SOT23−3 Package (CM1214−01SO) MSOP8 Package (CM1214−02MR) mW 225 400 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Table 3. STANDARD OPERATING CONDITIONS Parameter Operating Temperature Range Rating Units –40 to +85 °C Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1) Symbol VST Parameter Conditions Standoff Voltage I = 10 mA ESD Voltage Protection Peak discharge voltage between CH pins a) Contact discharge per IEC 61000−4−2 standard (Notes 2 and 3) ILEAK Channel Leakage Current RDYN Dynamic Resistance VESD Min Typ Max Units − ±7 − V kV ±8 − − TA = 25°C, 5.5 V between CH pins − ±0.1 ±1.0 mA TA = 25°C, IPP = 1 A, tP = 8/20 mS Any I/O pin to Ground (Note 4) − 0.9 − W http://onsemi.com 2 CM1214 Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1) Symbol Conditions Min Typ Max Units VCL Channel Clamp Voltage Parameter TA = 25°C, IPP = 1 A, tP = 8/20 mS (Note 4) − 10.0 − V CIN Channel Input Capacitance Voltage between CH pins = 0 V Voltage between CH pins = 5 V Measured at 1 MHz between CH pins 0.5 0.5 0.8 0.8 1.2 1.2 pF 1. All parameters specified at TA = −40°C to +85°C unless otherwise noted. 2. Standard IEC 61000−4−2 with CDischarge = 150 pF, RDischarge = 330 W. 3. From CH pin with other CH pin grounded. 4. No Connect pins are left open for all tests. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. PERFORMANCE INFORMATION Typical Capacitance Characteristics vs. Voltage CM1214 illustrates how the loading capacitance remains mainly flat across the voltage range form 0 V to 5 V, the voltage between CH pins. Figure 1. CM1214 Capacitance vs. Voltage Typical Voltage Current (VI) Characteristics (low current) CM1214 shows how the CM1214 experiences a symmetrical I/V curve, without any snapback or trigger voltage. It gradually starts to turn on at about 6 v and clamps above 7 V. Figure 2. CM1214 VI Characteristics, Low Current http://onsemi.com 3 CM1214 PERFORMANCE INFORMATION (Cont’d) Typical Voltage−Current (VI) Characteristics (high current, pulse condition) CM1214 shows how the CM1214 experiences a symmetrical I/V curve, without any snapback or trigger voltage. The curve shows only one polarity. Figure 3. CM1214 VI Characteristics, High Current, Pulse (clamping) Condition Typical Filter Performance (nominal conditions unless specified otherwise, 50 Ohm Environment) Figure 4. Insertion Loss vs. Frequency (0 V DC Bias) http://onsemi.com 4 CM1214 PERFORMANCE INFORMATION (Cont’d) Figure 5. Insertion Loss vs. Frequency (2.5 V DC Bias) APPLICATION INFORMATION The CM1214−01SO protects a single bipolar signal line, such as is found in RF circuits. One I/O pin (pin 1 for example) is connected to the signal line to be protected, and the other I/O pin is tied to GND. It is important to have a solid ground connection in order to reduce the clamping voltage. Pin 3 of the 3−lead SOT23 must be left open (not connected on the PCB). The CM1214−02MR protects two bipolar lines, such as for Gbit Ethernet. The PCB traces underneath the package connect across to the corresponding pins, i.e., pin 1 to pin 8 etc. Any disturbance on the line above or below the standoff voltage is clamped. RF ANTENNA LNA SIGNAL LINE C L SWITCH ESD N.C.. PA ESD GND 3−Lead SOT23−3 Figure 6. Typical Application − RF Switch and Amplifier Protection, CM1214−01SO−01SO/in 3−lead SOT23 http://onsemi.com 5 CM1214 APPLICATION INFORMATION (Cont‘d) TX+ CH1 FROM ASIC CH2 TX− RX+ CH3 TO CONNECTOR CH4 RX− Figure 7. Typical Application − Ethernet Protection, CM1214−02MR in 8−lead MSOP IEEE1394 PHY LLC GALV ISO CM1214−02 CM1214−02 Keep the ESD devices on the PHY side of the galvanic isolation and inside the VCC domain of the PHY controller Figure 8. Typical Application − IEEE1394 Protection, CM1214−02MR in 8−lead MSOP http://onsemi.com 6 GND CM1214 PACKAGE DIMENSIONS SOT−23 3−Lead (TO−236AA) CASE 419AH−01 ISSUE O D 3X b L2 3 GAUGE PLANE E1 E 1 L 2 e e C DETAIL Z A SEATING PLANE M DIM A A1 b c D E E1 e L L2 M c 0.05 C A1 SEATING PLANE DETAIL Z RECOMMENDED SOLDERING FOOTPRINT* 3X 0.56 2.74 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D AND E1 ARE DETERMINED AT DATUM H. 5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE. 3X 0.82 0.95 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 MILLIMETERS MIN MAX 0.75 1.17 0.05 0.15 0.30 0.50 0.08 0.20 2.80 3.05 2.10 2.64 1.20 1.40 0.95 BSC 0.40 0.60 0.25 BSC 0° 8° CM1214 PACKAGE DIMENSIONS MSOP 8, 3x3 CASE 846AD−01 ISSUE O MIN NOM A1 0.05 0.10 0.15 A2 0.75 0.85 0.95 b 0.22 0.38 c 0.13 0.23 D 2.90 3.00 3.10 E 4.80 4.90 5.00 E1 2.90 3.00 3.10 SYMBOL MAX 1.10 A E E1 0.65 BSC e L 0.60 0.40 0.80 L1 0.95 REF L2 0.25 BSC θ 0º 6º TOP VIEW DETAIL A D A A1 END VIEW c A2 e q b SIDE VIEW L2 Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-187. L L1 DETAIL A ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. 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