ETL MC74VHC1GT50DFT4 Noninverting buffer / cmos logic level shifter with lsttl-compatible input Datasheet

Noninverting Buffer / CMOS Logic Level Shifter
with LSTTL–Compatible Inputs
MC74VHC1GT50
The MC74VHC1GT50 is a single gate noninverting buffer fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output.
The device input is compatible with TTL–type input thresholds and the output has a full 5 V CMOS level output swing. The input
protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic–level translator from
3.0 V CMOS logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high–voltage power
supply.
The MC74VHC1GT50 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This
allows the MC74VHC1GT50 to be used to interface 5 V circuits to 3 V circuits. The output structures also provide protection when
V CC = 0 V. These input and output structures help prevent device destruction caused by supply voltage – input/output voltage mismatch,
battery backup, hot insertion, etc.
• High Speed: t PD = 3.5 ns (Typ) at V CC = 5 V
• Low Power Dissipation: I CC = 2 mA (Max) at T A = 25°C
• TTL–Compatible Inputs: V IL = 0.8 V; V IH = 2.0 V
• CMOS–Compatible Outputs: V OH > 0.8 V CC ;
V OL < 0.1 V CC @Load
• Power Down Protection Provided on Inputs and Outputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• Chip Complexity: FETs = 104; Equivalent Gates = 26
MARKING DIAGRAMS
5
4
1
2
VLd
3
SC–70/SC–88A/SOT–353
DF SUFFIX
CASE 419A
Pin 1
d = Date Code
5
Figure 1. Pinout (Top View)
4
VLd
1
2
3
SOT–23/TSOP–5/SC–59
DT SUFFIX
CASE 483
PIN ASSIGNMENT
1
2
3
4
5
NC
IN A
GND
OUT Y
V CC
Figure 2. Logic Symbol
Pin 1
d = Date Code
FUNCTION TABLE
Inputs
A
L
H
Output
Y
L
H
ORDERING INFORMATION
See detailed ordering and shipping information in the
package dimensions section on page 4 of this data sheet.
VHT50–1/4
MC74VHC1GT50
MAXIMUM RATINGS
Symbol
V CC
V IN
V OUT
Parameter
Value
Unit
– 0.5 to + 7.0
V
– 0.5 to +7.0
V
V CC=0
– 0.5 to +7.0
V
High or Low State
–0.5 to V cc + 0.5
I IK
Input Diode Current
–20
mA
I OK
Output Diode Current
V OUT < GND; V OUT > V CC
+20
mA
I OUT
DC Output Current, per Pin
+ 25
mA
I CC
DC Supply Current, V CC and GND
+50
mA
PD
Power dissipation in still air
SC–88A, TSOP–5
200
mW
θ JA
Thermal resistance
SC–88A, TSOP–5
333
°C/W
TL
Lead Temperature, 1 mm from Case for 10 s
260
°C
TJ
Junction Temperature Under Bias
+ 150
°C
T stg
Storage temperature
–65 to +150
°C
V ESD
ESD Withstand Voltage
Human Body Model (Note 2)
>2000
V
Machine Model (Note 3)
> 200
Charged Device Model (Note 4)
N/A
I LATCH–UP
Latch–Up Performance Above V CC and Below GND at 125°C (Note 5)
± 500
mA
1. Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is
not implied. Functional operation should be restricted to the Recommended Operating Conditions.
2. Tested to EIA/JESD22–A114–A
3. Tested to EIA/JESD22–A115–A
4. Tested to JESD22–C101–A
5. Tested to EIA/JESD78
DC Supply Voltage
DC Input Voltage
DC Output Voltage
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
V CC
DC Supply Voltage
V IN
V OUT
DC Input Voltage
DC Output Voltage
TA
t r ,t f
Operating Temperature Range
Input Rise and Fall Time
V CC = 0
High Low State
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
Junction
Temperature °C
80
90
100
110
120
130
140
Time,
Hours
1,032,200
419,300
178,700
79,600
37,000
17,800
8,900
Time,
Years
117.8
47.9
20.4
9.4
4.2
2.0
1.0
NORMALIZED FAILURE RATE
V CC = 3.3 ± 0.3 V
V CC = 5.0 ± 0.5 V
Min
Max
Unit
3.0
0.0
0.0
0.0
– 55
0
0
5.5
5.5
5.5
V CC
+ 125
100
20
V
V
V
°C
ns/V
1
1
10
100
1000
TIME, YEARS
Figure 3. Failure Rate vs. Time Junction Temperature
VHT50–2/4
MC74VHC1GT50
DC ELECTRICAL CHARACTERISTICS
V CC
Symbol
V IH
Parameter
Minimum High–Level
Test Conditions
Input Voltage
V IL
(V)
Min
Max
Min
Max
Min
3.0
4.5
1.4
2.0
1.4
2.0
1.4
2.0
5.5
2.0
2.0
2.0
Max
Unit
V
V
Minimum High–Level
V IN = V IH or V IL
Output Voltage
V IN = V IH or V IL
I OH = – 50 µA
Maximum Low–Level
Output Voltage
V IN = V IH or V IL
3.0
4.5
0.53
0.8
0.53
0.8
0.53
0.8
5.5
0.8
0.8
0.8
V
V IN = V IH or V IL
I OH = –4 mA
V OL
Typ
T A < 85°C –55°C<TA<125°C
Maximum Low–Level
Input Voltage
V OH
T A = 25°C
3.0
4.5
2.9
4.4
3.0
4.5
2.9
4.4
2.9
4.4
3.0
2.58
2.48
2.34
I OH = –8 mA
V IN = V IH or V IL
4.5
3.94
3.80
3.66
I OL = 50 µA
3.0
4.5
V
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
V IN = V IH or V IL
I OL = 4 mA
3.0
0.36
0.44
0.52
4.5
0 to5.5
0.36
±0.1
0.44
±1.0
0.52
±1.0
µA
I IN
Maximum Input
I OL = 8 mA
V IN = 5.5 V or GND
I CC
Leakage Current
Maximum Quiescent
V IN = V CC or GND
5.5
2.0
20
40
µA
I CCT
Supply Current
Quiescent Supply
Input: V IN = 3.4 V
5.5
1.35
1.50
1.65
mA
I OPD
Current
Output Leakage
V OUT = 5.5 V
0.0
0.5
5.0
10
µA
Current
AC ELECTRICAL CHARACTERISTICS C load = 50 pF, Input t r = t f = 3.0 ns
T A = 25°C
Symbol Parameter
t PLH , Maximum
t PHL
C IN
C PD
Propagation Delay,
Input A to Y
Test Conditions
V CC = 3.3± 0.3 V C L = 15 pF
Typ
4.5
Max
10.0
C L = 50 pF
6.3
13.5
15.0
17.5
V CC = 5.0± 0.5 V C L = 15 pF
C L = 50 pF
3.5
4.3
6.7
7.7
7.5
8.5
8.5
9.5
5
10
10
10
Maximum Input
Capacitance
Power Dissipation Capacitance (Note 6)
Min
T A < 85°C –55°C<TA<125°C
Min
Max
11.0
Typical @ 25°C, V CC = 5.0 V
12
Min
Max Unit
13.0 ns
pF
pF
6. C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without
load. Average operating current can be obtained by the equation: I CC(OPR) = C PD • V CC • f in + I CC . C PD is used to determine the no–
load dynamic power consumption; P D = C PD • V CC 2 • f in + I CC • V CC .
VHT50–3/4
MC74VHC1GT50
3.0V
V OH
Y
V OL
*Includes all probe and jig capacitance
Figure 4. Switching Waveforms
Figure 5. Test Circuit
DEVICE ORDERING INFORMATION
Device Nomenclature
Device
Temp
Order Number Circuit
Device
Range
Technology
Indicator
Function
Identifier
Package
Suffix
Tape &
Reel
Suffix
MC74VHC1GT50DFT1
MC
74
VHC1G
T50
DF
T1
MC74VHC1GT50DFT2
MC
74
VHC1G
T50
DF
T2
MC74VHC1GT50DFT4
MC
74
VHC1G
T50
DF
T4
MC74VHC1GT50DTT1
MC
74
VHC1G
T50
DT
T1
MC74VHC1GT50DTT3
MC
74
VHC1G
T50
DT
T3
Package Type
(Name/SOT#/
Common Name)
Tape and
Reel Size
SC–70/SC–88A/
SOT–353
SC–70/SC–88A/
SOT–353
SC–70/SC–88A/
SOT–353
SOT–23/TSOPS/
SC–59
SOT–23/TSOPS/
SC–59
178 mm (7 in)
3000 Unit
178 mm (7 in)
3000 Unit
330 mm (13 in)
10,000 Unit
178 mm (7 in)
3000 Unit
330 mm (13 in)
10,000 Unit
VHT50–4/4
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