AVAGO MGA-13516 Low noise amplifier Datasheet

MGA-13516
High Gain, High Linearity, Active Bias,
Low Noise Amplifier
Data Sheet
Description
Features
Avago Technologies’ MGA-13516 is a two stage, easy-touse GaAs MMIC Low Noise Amplifier (LNA) with active bias. The LNA has low noise with good input return loss and
high linearity achieved through the use of Avago Technologies’ proprietary 0.5um and 0.25um GaAs Enhancement-mode pHEMT process. Both LNAs inside have extra
feature that allows a designer to adjust supply current.
The first stage has an additional feature where the gain
can be adjusted externally without affecting noise figure. Minimum matching needed for input, output and the
inter-stage between the two LNA.
• Low noise figure
It is designed for optimum use between 400MHz to
1.5GHz. For optimum performance at higher frequency
from 1.4GHz to 2.7GHz, the MGA-14516 is recommended.
Both MGA-13516 & MGA-14516 share the same package
and pinout.
Pin Configuration and Package Marking
• High gain
• Good IRL
• High linearity performance
• High reverse isolation
• Externally adjustable supply current
• Externally adjustable gain
• GaAs E-pHEMT Technology [1]
• Low cost QFN package
• Excellent uniformity in product specifications
Specifications
900MHz ; Q1 : 5V, 45mA (typ) Q2 : 5V, 110mA
• 31.8 dB Gain
• 0.66 dB Noise Figure
4.0 x 4.0 x 0.85 mm3 16-lead QFN
• 13 dB IRL
Pin 16
Pin 15
Pin 14
Pin 13
• 38 dBm Output IP3
• 23.5 dBm Output Power at 1dB gain compression
13516
YYWW
XXXX
Pin 12
Pin 1
Pin 11
Pin 2
Pin 10
Pin 3
Pin 9
Pin 4
[13]
[14]
[15]
[16]
BOTTOM VIEW
Pin
Description
Pin
Description
1
Not Used
9
Not Used
2
NC
10
RFout
[12]
[2]
[11]
3
RFin
11
RFout
[10]
4
RFgnd1
12
Not Used
5
Vbias1
13
Vg
6
FB1
14
RFgnd2
7
RFout1
15
Vm
8
RFin2
16
Vbias
Q1
Q2
[1]
[3]
[8]
[7]
[6]
[9]
[5]
[4]
• Low noise amplifier for cellular infrastructure including
GSM, CDMA and W-CDMA.
• Other very low noise applications.
Pin 5
Pin 6
Pin 7
Pin 8
TOP VIEW
Applications
Notes:
Package marking provides orientation and identification “13516” is the
Product Identification, “YYWW” is the Date Code, “XXXX” is the last 4
digits of the lot number.
Note:
1. Enhancement mode technology employs positive Vgs, thereby
eliminating the need of negative gate voltage associated with
conventional depletion mode devices.
Attention: Observe precautions for
handling electrostatic sensitive devices
ESD Machine Model = 40 V
ESD Human Body Model = 200 V
Refer to Avago Application Note A004R:
Electrostatic Discharge, Damage and Control.
MGA-13516 Absolute Maximum Rating [1]
Symbol
Parameter
Units
Absolute Max.
Vdd1
Device Supply Voltage
V
5.5
Vbias1
Control Voltage
V
3.5
Vdd2
Device Voltage, RF output to ground
V
5.5
Vbias
Control Voltage
V
5.5
Idd2
Device Drain Current
mA
150
Pin,max
CW RF Input Power (Vdd1 = 5.0V, Idd1=45mA)
dBm
20
Pdiss
Total Power Dissipation [3]
W
1.30
Tj
Junction Temperature
°C
150
TSTG
Storage Temperature
°C
-65 to 150
Thermal Resistance [1-3] (Vdd1=Vdd2=Vbias=5V), θjc = 36 oC/W
Notes:
1. Operation of this device in excess of any of these limits may cause permanent damage.
2. Thermal resistance measured using Infra-Red Microscopy Technique.
3. Board temperature TB is 25 oC. Derate 28mW/ oC for TB>120 oC.
Product Consistency Distribution Charts[4]
TA = 25 °C, 900MHz, Vdd1=5V, Vdd2=5V, Vbias=5V, FRF=900MHz, unless stated otherwise.
LSL
LSL
USL
USL
CPK = 3.22
CPK = 3.26
38
36
40
50
48
42
46
44
Figure 1. Idd1 distribution ; LSL=37mA , USL=53mA
LSL
52
54
70
80
90
120
30.5
31.0
130
140
150
USL
USL
CPK = 4.40
30.0
110
100
Figure 2. Idd2 distribution ; LSL=75mA , USL=140mA
CPK = 2.09
31.5
32.0
32.5
33.0
Figure 3. Gain distribution ; LSL=30.2dB , USL=33.8dB
33.5
34.0
.5
.6
.7
NF distribution ; USL=1dB
.8
.9
1
1.1
1.2
Notes::
4. Distribution data sample size is 500 samples taken from 3 different wafer lots. Future wafer allocated to this product may have nominal values
anywhere between the upper and lower limits. Circuit losses have not been de-embedded from actual measurements.
Demo Board Layout
IN
Notes:
• Recommended PCB material is 10 mils Rogers RO4350.
• Suggested component values may vary according to layout and PCB
material.
• L1 and C1 form the input matching network.
• L4 and C7 form the output matching network.
• L2, L3, C5 form the inter-stage matching network.
• R2 and C4 form the network for externally gain adjustment feature. (optional)
• R4 and C18 form the network for externally gain adjustment feature. (optional)
• Cs, C6, C13 are RF bypass capacitor.
• C16 mitigates the effect of external noise pickup on the Vbias line.
• R1 is bias resistor for Q1.
OUT
MAR2007
OMBAK#MBD2
AVAGO
Technologies
Figure 5. Demo Board Layout
Vbias=5V
Vdd2=5V
C11
C16
C6
[13]
[2]
[11]
Q2
[10]
[9]
[8]
[7]
[6]
[4]
[5]
L1
[14]
[12]
[3]
C4
R2
C5
Cs
L2
R1
C10
C9
Vdd1=5V
Figure 6. Demo Board Schematic
C13
R4
[1]
Q1
C1
[15]
[16]
L3
C18
L4
C7
Table1. 900MHz Matching Components
Demo board (shown in Figure 5) component values used for demo board schematic shown in Figure 6. These component
values are used when measuring Electrical Specifications and plots of Figure 7 to Figure 15.
Part
Size
Value
Description
Cs
0402
33pF
Rohm MCH155A330JK
C1
0402
4.3pF
Rohm MCH155A4R3CK
C4
0402
33pF
Rohm MCH155A330JK
C5
0402
2.4pF
Kyocera CM05CH240J50AHF
C6
0402
33pF
Rohm MCH155A330JK
C7
0402
11pF
Rohm MCH155A110JK
C10
0402
100pF
Kyocera CM05CH101J50AHF
C13
0402
33pF
Rohm MCH155A330JK
C16
0402
33pF
Rohm MCH155A330JK
C18
0402
33pF
Rohm MCH155A330JK
L1
0402
11nH
Coilcraft 0402CS11NXJBW
L2
0402
3.9nH
Toko LL1005-FHL3N9S
L3
0402
100nH
Toko LL1005-FHLR10J
L4
0402
18nH
Toko LL1005-FHL18NJ
R1
0402
1.8kohm
Rohm MCR01MZSJ182
R2
0402
82ohm
Rohm MCR01MZSJ820
R4
0402
680ohm
Rohm MCR01MZSJ681
Electrical Specifications [5, 6]
TA = 25 °C, Vdd1=5V, Vdd2=5V, Vbias=5V, FRF=900MHz, unless stated otherwise.
Symbol
Parameter and Test Condition
Units
Min.
Typ.
Max.
Idd1
Current at Q1
mA
37
45
53
Idd2
Current at Q2
mA
75
110
140
Ibias
Bias Current for Q2
mA
Gain
Associated Gain
dB
NF
Noise Figure
OIP3
5
30.2
31.8
33.8
dB
0.66
1.0
Output Third Order Intercept Point
(2-tone @ FRF +/- 1MHz, Pin = -25dBm) dBm
38
OP1dB
Output Power at 1dB Gain Compression
dBm
23.5
IRL
Input Return Loss
dB
13
ORL
Output Return Loss
dB
15
S12
Reverse Isolation
dB
-50
Notes:
5. Measurements obtained using demo board described in Figure 5 with component list in Table 1. Input and Output trace loss is not de-embedded
from the measurement.
6. Guaranteed specifications are 100% tested in production test circuit.
MGA-13516 Typical Performance
TA = 25°C, Vdd1=5V, Vdd2=5V, Vbias=5V unless stated otherwise. Measured on demo board in Fig. 5 with component
list in Table 1 for 900MHz matching.
60
140
50
120
100
Idd2 (mA)
Idd1 (mA)
40
30
20
20
-40
-20
0
20
40
Temperature (°C)
60
80
100
Figure 7. Idd1 vs. Temperature
Ibias (mA)
5
4
3
2
1
-40
-20
0
Figure 9. Ibias vs. Temperature
0
-60
-40
-20
Figure 8. Idd2 vs. Temperature
6
0
-60
60
40
10
0
-60
80
20
40
Temperature (°C)
60
80
100
0
20
40
Temperature (°C)
60
80
100
MGA-13516 Typical Performance
TA = 25°C, Vdd1=5V, Vdd2=5V, Vbias=5V unless stated otherwise. Measured on demo board in Fig. 5 with component
list in Table 1 for 900MHz matching.
36
34
30
NF (dB)
Gain (dB)
32
28
26
-40°C
25°C
85°C
24
22
20
780
800
820
840
860
Frequency (MHz)
880
900
920
Figure 10. Gain vs. Frequency and Temperature
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
780
880
900
920
23
35
OP1dB (dB)
OIP3 (dB)
840
860
Frequency (MHz)
24
30
20
780
800
820
840
860
Frequency (MHz)
880
22
21
-40°C
-30°C
25°C
85°C
20
-40°C
-30°C
25°C
85°C
25
19
900
18
780
920
Figure 12. OIP3 vs. Frequency and Temperature
40
40
30
20
20
10
0
IRL
ORL
-10
0
2
4
6
Frequency (GHz)
Figure 14. IRL & ORL vs. Frequency
800
820
840
860
Frequency (MHz)
880
900
920
Figure 13. OP1dB vs. Frequency and Temperature
Gain & Reverse Isolation (dB)
IRL & ORL (dB)
820
25
40
800
Figure 11. NF vs. Frequency and Temperature
45
-20
-40°C
25°C
85°C
8
10
Gain
S12
0
-20
-40
-60
-80
-100
0
2
4
6
Frequency (GHz)
Figure 15. Gain & S12 vs. Frequency
8
10
MGA-13516 Scattering Parameter and Noise Parameter Test Setup
Figure 16. Test setup for Q1 S & Noise Parameters data. R2=82ohm
(Rohm MCR01MZSJ820) and C4=33pF (Rohm MCH155A330JK).
Figure 17. Test setup for Q2 S & Noise Parameters data. C18=33pF
(Rohm MCH155A330JK) and R4=680Ω (Rohm MCR01MZSJ681).
MGA-13516 Q1 Typical Scattering Parameters, Vdd1=5V, Idd1=45mA
S11
S21
S12
S22
Freq (GHz)
Mag
Ang
Mag
Ang
Mag
Ang
Mag
Ang
0.1
0.94
-12.3
21.09
152.4
0.005
61.3
0.48
-39.9
0.5
0.61
-23.5
9.89
120.4
0.013
26.6
0.16
-69.9
0.9
0.53
-23.3
6.68
106.1
0.014
12.8
0.16
-64.8
1
0.53
-22.9
6.19
103.6
0.014
11
0.16
-64.6
1.5
0.52
-26.5
4.46
92.8
0.014
1.6
0.23
-67.1
1.9
0.51
-29.3
3.6
86.5
0.013
-1.5
0.29
-69.3
2
0.52
-30.1
3.44
85.2
0.013
-1.7
0.3
-69.7
2.5
0.53
-32.7
2.87
78.8
0.011
-1.8
0.36
-69.9
3
0.55
-33.3
2.56
73.5
0.011
-1.1
0.39
-70
3.5
0.55
-31.8
2.34
67.5
0.009
3.9
0.37
-75.1
4
0.55
-30.1
2.25
59.8
0.008
11.1
0.35
-90
5
0.47
-32.4
2.1
38.8
0.009
50.1
0.41
-140
6
0.4
-68.8
1.9
14.6
0.021
74.3
0.53
-162.5
7
0.63
-109
1.74
-20.8
0.056
49.2
0.29
156.3
8
0.75
-117.1
0.72
-65.8
0.085
20.6
0.58
15.7
9
0.75
-102.6
0.34
-58.8
0.058
-16.5
0.82
24.9
10
0.56
-105.5
0.37
-56.7
0.108
-38
0.65
35.8
Note: S-parameters are measured on PCB. The PCB material is 10 mils Rogers RO4350. Figure 16 shows the input and output reference planes.
MGA-13516 Q1 Typical Noise Parameter, Vdd1=5V, Idd1=45mA
Γopt
Freq (GHz)
Fmin(dB)
mag
ang.
Rn/50
0.8
0.37
0.49
35.52
0.09
0.9
0.39
0.47
41.64
0.10
1.0
0.38
0.46
46.11
0.11
1.5
0.68
0.38
57.89
0.15
1.7
0.78
0.35
61.08
0.17
Note: Noise parameters are measured on PCB. The PCB material is 10 mils Rogers RO4350.
Figure 16 shows the input and output reference planes.
MGA-13516 Q2 Typical Scattering Parameters, Vdd2=5V, Vbias=5V, IDD2=110mA
S11
Freq (GHz)
Mag
0.1
0.5
S21
S12
Ang
Mag
Ang
Mag
0.12
-37.7
11.19
165.1
0.13
-128.1
8.61
126.9
0.9
0.18
175.2
6.57
S22
Ang
Mag
Ang
0.038
0.3
0.35
-179
0.037
-0.7
0.31
176.4
99.9
0.04
-1.8
0.27
179.3
1
0.18
165.2
6.23
94.4
0.041
-2.2
0.26
-180
1.5
0.19
126.8
5.13
69.4
0.05
-10.7
0.2
-161.7
1.9
0.13
84.4
4.69
48.3
0.056
-24.4
0.2
-131.8
2
0.12
65.9
4.62
42.5
0.058
-29.4
0.22
-125.2
2.5
0.2
-52.9
4.19
8.8
0.062
-61.5
0.33
-115.5
3
0.42
-104.3
3.39
-28.3
0.05
-103.6
0.3
-123.1
3.5
0.55
-140.7
2.31
-62.3
0.029
-140.5
0.27
-100.4
4
0.6
-170.9
1.5
-89.8
0.02
-166.3
0.36
-112.5
5
0.68
141.8
0.65
-132.1
0.021
125.6
0.3
-156.7
6
0.7
107.4
0.33
-167.5
0.026
80.7
0.2
-173.7
7
0.65
35.5
0.18
139
0.025
29.5
0.13
-61.4
8
0.85
-33.2
0.04
85.7
0.007
-48.3
0.49
-38.1
9
0.69
-21.5
0.02
93.3
0.013
94.9
0.69
-24.1
10
0.51
28
0.02
157.1
0.021
160
0.73
-4.8
Note: S-parameters are measured on PCB. The PCB material is 10 mils Rogers RO4350. Figure 17 shows the input and output reference planes.
MGA-13516 Q2 Typical Noise Parameter, Vdd2=5V, Idd2=110mA
Γopt
Freq (GHz)
Fmin(dB)
mag
ang.
Rn/50
0.8
2.01
0.29
8.11
0.29
0.9
2.22
0.31
12.80
0.30
1.0
2.32
0.26
15.20
0.26
1.5
2.75
0.18
35.27
0.24
1.7
2.95
0.15
68.10
0.32
Note: Noise parameters are measured on PCB. The PCB material is 10 mils Rogers RO4350. Figure 17 shows the input and output reference planes.
Part Number Ordering Information
Part Number
No. of Devices
Container
MGA-13516-TR1G
1000
7” Reel
MGA-13516-TR2G
3000
13” Reel
MGA-13516-BLKG
100
antistatic bag
SLP4X4 Package Dimension
Pin 1 Dot
by marking
4.00 ± 0.10
2.200
Exp.DAP
0.30
0.20 Ref
Pin #1 Identification
Chamfer 0.450 x 45º
0.55
4.00 ± 0.10
13516
YYWW
XXXX
0.65 Bsc
0.00 ± 0.05
0.85 ± 0.05
Top View
NOTE:
Notes:
1 All dimensions are in millimeters
1.
dimensions
in millimeters.
2 All
Dimensions
are are
inclusive
of plating
2. Dimensions are inclusive of plating.
3 Dimensions are exclusive of mold flash and metal burr
3. Dimensions are exclusive of mold ash and metal burr.
10
2.200
Exp.DAP
Side View
1.95
Ref
Bottom View
PCB Land Pattern and Stencil Design
0.650
0.300
0.650
0.270
2.200
0.650
1.980
0.485
2.200
0.350
1.980
Stencil Outline
PCB Land Pattern (Top View)
2.200
1.980
0.650
0.300
1.980
0.270
0.485
Combines PCB & Stencil Layouts
All Dimension are in millimeters
11
2.200
0.492
Device Orientation
REEL
USER FEED DIRECTION
13516
YYWW
XXXX
CARRIER
TAPE
USER
FEED
DIRECTION
13516
YYWW
XXXX
13516
YYWW
XXXX
TOP VIEW
COVER TAPE
END VIEW
Tape Dimensions
∅ 1.50 + .10
8.0 ±0.10
2.00 ±0.05
1.75 ±0.10
4.0 ±0.10
+
+
+
+
5.50 ±.05
12.00
+0.30/-0.10
∅ 1.50 +0.25
.279 ±0.02
10º MAX.
4.25 ±0.10
Ao
12
10º MAX.
1.13 ±0.10
Ko
4.25 ±0.10
Bo
Reel Dimension - 7 Inch
A
B
ØE
ØD
SIDE VIEW
BACK VIEW
F
SPECIFICATION
TAPE
WIDTH
A
MAX
B
+1.5–0.0
C1
±0.5
ØD
±0.5
ØE
(max)
F
(min)
ØG
±0.2
ØH
(min)
12mm
18.00
12.4
4.40
55.0
178
1.50
13.50
20.20
G
FRONT VIEW
C1
TAPE SLOT
PLANE VIEW
13
Note: Surface resistivity to be <1012 Ohms/square
ARBOR HOLE
Reel Dimension - 13 Inch
ESD Label
(See Below)
RECYCLE SYMBOL
M
DETAIL “X”
EMBOSSED LINE X2
90.0mm length
LINES 147.0mm AWAY FROM CENTER POINT
EMBOSSED ‘M’ 5.0mm height
FRONT VIEW
11.90–15.40**
13.20±0.50*
Ø20.2
RECYCLE SYMBOL
(MIN.)
+0.5
Ø13.0 –0.2
DETAIL “X”
2.00±0.5
0100.00±0.50
M
SLOT 5.00±0.50
16.40”
MAX.
BACK VIEW
For product information and a complete list of distributors, please go to our web site:
www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2009 Avago Technologies. All rights reserved.
AV02-1048EN - April 13, 2009
0331.50 MAX.
DETAIL “X”
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