SEMTECH SC1152

PROGRAMMABLE SYNCHRONOUS DC/DC
CONTROLLER FOR ADVANCED PROCESSORS
April 28, 1998
SC1152
TEL:805-498-2111 FAX:805-498-3804 WEB:http://www.semtech.com
DESCRIPTION
FEATURES
The SC1152 is a low-cost, full featured, synchronous
voltage-mode controller designed for use in single
ended power supply applications where efficiency is of
primary concern. Synchronous operation allows for the
elimination of heat sinks in many applications. The
SC1152 is ideal for implementing DC/DC converters
needed to power advanced microprocessors such as
®
Pentium ll (Klamath), in both single and multiple processor configurations. Internal level-shift, high-side
drive circuitry, and preset shoot-thru control, allows for
use of inexpensive n-channel power switches.
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APPLICATIONS
•
•
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•
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SC1152 features include an integrated 5-bit VID DAC,
temperature compensated voltage reference, triangle
wave oscillator, current limit comparator, frequency
shift over-current protection, and an accessible, internally compensated error amplifier. Power good signaling, logic compatible shutdown, and over voltage protection are also provided.
Pentium® II (Klamath) Core Supply
Multiple Microprocessor Supplies
Voltage Regulator Modules (VRM)
Programmable Power Supplies
High Efficiency DC/DC Conversion
ORDERING INFORMATION
(1)
DEVICE
PACKAGE
TEMP. RANGE (TJ)
SO-20
0 - 125°C
SC1152CS
The SC1152 operates at a fixed 200KHz, providing an
optimum compromise between efficiency, external
component size, and cost.
PIN CONFIGURATION
Low cost / full featured
Synchronous operation
5 Bit VID DAC programmable output
On-chip power good and OVP functions
®
Designed to meet Intel VRM8.1 (Pentium II)
Note:
(1) Add suffix ‘TR’ for tape and reel.
BLOCK DIAGRAM
Top View
VCC
CURRENT LIMIT
1.25V REF
VCC
VID4
VID3
D/A AND
SHUTDOWN
LOGIC
VID2
VID1
SHUTDOWN
CS(-) CS(+)
+
-
70mV
BSTH
DECODED SHUTDOWN SIGNAL
R
Q
OSCILLATOR
UPPER FET
LEVEL SHIFT
AND DRIVE
S
VID0
DH
PGNDH
200 kHz
VOSENSE
OPEN COLLECTORS
+
PWRGOOD
-
+
-
+
ERROR
AMP
SHOOT-THRU
CONTROL
BSTL
+
SYNCHRONOUS
VCC
(20-Pin SOIC)
FET
DRIVE
+
-
DL
GND
PGNDL
OVP
GND
Pentium is a registered trademark of Intel Corporation
© 1998 SEMTECH CORP.
1
652 MITCHELL ROAD NEWBURY PARK CA 91320
PROGRAMMABLE SYNCHRONOUS DC/DC
CONTROLLER FOR ADVANCED PROCESSORS
SC1152
April 28, 1998
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
VIN
VCC to GND
PGND to GND
BST to GND
Thermal Resistance
θJC
Junction to Case
Thermal Resistance
θJA
Junction to Ambient
Operating
TA
Temperature Range
Storage
TSTG
Temperature Range
Lead Temperature
TLEAD
(Soldering) 10 sec
Maximum
-0.3 to 7
±1
-0.3 to 15
Units
V
V
V
30
°C/W
90
°C/W
0 to 70
°C
-65 to +150
°C
300
°C
ELECTRICAL CHARACTERISTICS
o
Unless specified: VCC = 4.75V to 5.25V; GND = PGND = 0V; FB = VO; 0mV < (CS(+) - CS(-)) < 60mV; TJ = 25 C
PARAMETER
CONDITIONS
Output Voltage
IO = 2A
Supply Voltage
VCC
Supply Current
VCC = 5.0
Load Regulation
MIN
(1)
TYP
MAX
UNITS
See Table 1.
4.2
(1)
IO = 0.3A to 15A
(1)
7
V
5
mA
1
%
Line Regulation
All VID codes
0.5
%
Gain (AOL)
VOSENSE to VO
35
dB
Current Limit Voltage
60
70
80
mV
Oscillator Frequency
180
200
220
kHz
Oscillator Max Duty Cycle
90
95
%
DH Sink/Source Current
BSTH - DH = 4.5V, DH - PGNDH = 2V
1
A
DL Sink/Source Current
BSTL - DL = 4.5V, DL - PGNDL = 2V
1
A
OVP Threshold Voltage
OVP Source Current
120
VOVP = 3V
%
10
Power Good Threshold
Voltage
90
Dead Time
50
mA
110
100
%
ns
NOTE:
(1) Specification refers to application circuit (Figure 1.).
2
© 1998 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
PROGRAMMABLE SYNCHRONOUS DC/DC
CONTROLLER FOR ADVANCED PROCESSORS
SC1152
April 28, 1998
PIN DESCRIPTION
Pin #
Pin Name
Pin Function
1
GND
Small Signal Analog and Digital Ground
2
VCC
Chip Supply Voltage
3
OVP
High Signal Out if VO > Setpoint + 20%
(1)
4
PWRGOOD
Open collector logic output, high if VO within 10% of setpoint
5
CS(-)
Current Sense Input (negative)
6
CS(+)
Current Sense Input (positive)
7
PGNDH
Power Ground for High Side Switch
8
DH
High Side Driver Output
9
NC
Not Connected
10
PGNDL
Power Ground for Low Side Switch
11
DL
Low Side Driver Output
12
BSTL
Vcc for Low Side Driver (Boost)
13
BSTH
Vcc for High Side Driver (Boost)
(1)
14
SHUTDOWN
Logic Low shuts down the converter
15
VOSENSE
Top end of internal feedback chain
16
(1)
Programming Input (MSB)
(1)
Programming Input
(1)
Programming Input
(1)
Programming Input
(1)
Programming Input (LSB)
17
18
19
20
VID4
VID3
VID2
VID1
VID0
NOTE:
(1) All logic level inputs and outputs are open collector TTL compatible.
PIN CONFIGURATION
3
© 1998 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
PROGRAMMABLE SYNCHRONOUS DC/DC
CONTROLLER FOR ADVANCED PROCESSORS
SC1152
April 28, 1998
APPLICATION CIRCUIT
L1
R1
5mOhm
Q1
5V IN
C6
1000uF
C8
1000uF
C10
1000uF
VCCP
4 uH
+
C3
1000uF
C1
0.1uF
+
+
R2
10k
Q2
C2
1000uF
C4
1000uF
+
+
D1
1N5817
+
+
+
+
C5
1000uF
C7
1000uF
C9
1000uF
R5
10
C12
0.1uF
12V IN
R3 2.32k
U1
2
OVP
3
VID0
20
VID1
19
VID2
18
VID3
17
VID4
14
CS(+)
OVP
CS(-)
VID0
VOSENSE
VID1
PWRGOOD
VID2
VID4
VID3
BSTH
SHUTDOWN
1
GND
10
C13
0.1uF
VCC
PGNDL
9
NC
DH
PGNDH
DL
BSTL
R4
1.00k
C11
6
0.1uF
5
15
4
16
13
8
7
11
12
SC1152CS
SHUTDOWN
PWRGOOD
®
Pentium ll Power Supply
Figure 1.
MATERIALS LIST
Quantity
Reference
Part/Description
Vendor
Notes
4
C1,C11-C13 0.1µF Ceramic
Various
9
C2-C10
1000µF/6.3V
SANYO
1
D1
1N5817
Various
1
L1
4µH
2
Q1, Q2
See notes
See notes
FET selection requires trade-off between efficiency
and cost. Absolute maximum RDS(ON) = 22 mΩ
1
R1
5mΩ
IRC
OAR-1 Series
1
R2
10kΩ, 5%, 1/8W
Various
1
R3
2.32kΩ, 1%, 1/8W
Various
1
R4
1kΩ, 1%, 1/8W
Various
1
R5
10Ω, 5%, 1/8W
Various
1
U1
SC1152CS
SEMTECH
MV-GX or equiv. Low ESR
8 Turns 16AWG on MICROMETALS T50-52D core
4
© 1998 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
PROGRAMMABLE SYNCHRONOUS DC/DC
CONTROLLER FOR ADVANCED PROCESSORS
SC1152
April 28, 1998
OUTPUT VOLTAGE TABLE
Unless specified: VCC = 4.75V to 5.25V; GND = PGND = 0V; FB = VO; 0mV < (CS(+) - CS(-)) < 60mV; TJ = 25°C
PARAMETER
CONDITIONS
(1)
Output Voltage
IO = 2A in Application Circuit
(Figure 1)
VID
43210
00101
00100
00011
00010
00001
00000
11111
11110
11101
11100
11011
11010
11001
11000
10111
10110
10101
10100
10011
10010
10001
10000
MIN
TYP
MAX
1.782
1.832
1.881
1.931
1.980
2.030
1.980
2.079
2.178
2.277
2.376
2.475
2.574
2.673
2.772
2.871
2.970
3.069
3.168
3.267
3.366
3.465
1.800
1.850
1.900
1.950
2.000
2.050
2.000
2.100
2.200
2.300
2.400
2.500
2.600
2.700
2.800
2.900
3.000
3.100
3.200
3.300
3.400
3.500
1.818
1.868
1.919
1.969
2.020
2.070
2.020
2.121
2.222
2.323
2.424
2.525
2.626
2.727
2.828
2.929
3.030
3.131
3.232
3.333
3.434
3.535
UNITS
V
NOTE:
(1) All VID codes not specifically listed are invalid and cause shutdown exactly as if the shutdown pin had been
asserted.
THEORY OF OPERATION
The voltage at the VOSENSE pin is applied, through the internal precision resistor feedback chain, to the inverting
input of the error amplifier. The non-inverting input of the error amplifier is supplied with a DC voltage derived by
the DAC from the internal trimmed bandgap voltage reference. The output of the error amplifier is compared to
the triangular output of the internal oscillator to generate a fixed frequency, variable duty cycle pulse train. The
internal oscillator uses an on-chip capacitor and precision trimmed current sources to set the frequency to 200
kHz.
The generated pulse train is gated with the output of the current limit latch and the inhibit signal to produce a
drive signal for the upper FET. It is also inverted to produce a drive signal for the lower FET. These FET drive
signals are modified by the “shoot-through control” circuitry so that the top FET turn-on is delayed until the bottom
FET has turned off, and visa-versa.
The current limit latch is set (ending the upper FET drive pulse early) if the current limit comparator indicates an
overcurrent condition. The latch is reset at the start of each oscillator period.
The PWRGOOD and OVP signals are derived from the voltage at the VOSENSE pin by comparators fed from the
internal feedback chain.
5
© 1998 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
PROGRAMMABLE SYNCHRONOUS DC/DC
CONTROLLER FOR ADVANCED PROCESSORS
SC1152
April 28, 1998
CHARACTERISTIC CURVES
SC1152 Efficiency in Application Circuit (Figure 1).
95.0%
90.0%
3.50 Volts
3.00 Volts
85.0%
2.50 Volts
2.00 Volts
Efficiency
1.80 Volts
80.0%
75.0%
70.0%
0.000
2.000
4.000
6.000
8.000
10.000
12.000
14.000
16.000
Output Current (Amps)
SC1152 Regulation in Application Circuit (Figure 1).
0.000
-0.005
Delta 1.8
-0.010
Delta 3.5
Vout (V)
∆
-0.015
Delta 2.0
-0.020
Delta 2.5
Delta 3.0
-0.025
0.000
2.000
4.000
6.000
8.000
10.000
12.000
14.000
16.000
Output Current (Amps)
6
© 1998 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320
PROGRAMMABLE SYNCHRONOUS DC/DC
CONTROLLER FOR ADVANCED PROCESSORS
SC1152
April 28, 1998
OUTLINE DRAWING SO-20
Ref. MS-013AC
7
© 1998 SEMTECH CORP.
652 MITCHELL ROAD NEWBURY PARK CA 91320