SEMTECH UR5HCSPI-FB

SPICoderTM UR5HCSPI
Zero-PowerTM Keyboard Encoder &
Power Management IC for H/PCs
HID & SYSTEM MANAGEMENT PRODUCTS, H/PC IC FAMILY
Finally, special keyboard modes
and built-in power management
features allow the SPICoderTM to
operate in harmony with the power
management modes of Windows
CE®, resulting in more user flexibility
and longer battery life.
• Compatible with “system-on silicon”
CPUs for H/PCs
• Special keyboard and power
management modes for H/PCs,
including programmable “wake-up”
keys
• Scans, debounces, and encodes
an 8 x 12 matrix and controls
discrete switches and LED
indicators
• Custom versions available
APPLICATIONS
• Personal Digital Assistants (PDAs)
• Wearable Computers
• Internet Appliance
• StrongARMTM Handheld PCs
• Windows CE® Platforms
• Web Phones
PIN ASSIGNMENTS
C6
C7
Vx
NC
_WKU
_RESET
Vcc
OSCI
OSCO
NC0
NC
“Quasi” Zero-PowerTM consumption
(less than 2µA @ 3V), a must for
H/PCs, provides the host system
with both power management and
I/O flexibility, with almost no battery
drainage.
• SPI-compatible keyboard encoder
and power management IC with
other interfaces available
• Compatible with Windows CE®
keyboard specification
• Zero-PowerTM — typically
consuming less than 2µA,
between 3-5V
• Offers overall system power
management capabilities
_PWR_OK
NC0
OSCO
OSCI
Vcc
NC
NC
_RESET
_WKU
Vx
C7
33
34
6
23
22
UR5HCSPI-FB
QFP
44
1
12
11
NC
LED2
LED1
LED0
_IOTEST
Vss
NC
R7
R6
R5
R4
C5
C4
C3
C2
C1
C0
R0
R1
R2
R3
R4
1
40
39
UR5HCSPI-FN
PLCC
34
7
12
17
18
The UR5HCSPI also offers
programmable features for wake-up
keys and general purpose I/O pins.
SPICoder is a trademark of Semtech Corp. All
other trademarks belong to their respective
companies.
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
23
29
28
NC
R5
R6
R7
Vss
NC
_IOTEST
LED0/GIO0
LED1/C13
LED2/C12
C11/_LID
Three main design features of the
UR5HCSPI make it the ideal
companion for the new generation
of Windows CE® -compatible,
single-chip computers: low-power
consumption; real estate-saving
size; and special keyboard modes.
FEATURES
_ATN
_SS
SCK
MOSI
MISO
XSW
SW0
C8
C9
C10/WUKO
C11/_LID
The SPICoder UR5HCSPI
keyboard encoder and power
management IC is designed
specifically for handheld PCs
(H/PCs). The off-the-shelf
UR5HCSPI will readily work with
CPUs designed for Windows CE®,
saving OEMs significant
development time and money as
well as minimizing time-to-market for
the new generations of handheld
products.
TM
C6
C5
C4
C3
C2
C1
C0
R0
R1
R2
R3
DESCRIPTION
1
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_PWR_OK
_ATN
_SS
SCK
MOSI
MISO
XSW
SW0
C8
C9
C10/WUKO
ORDERING CODE
Package Options
44-pin, Plastic PLCC
44-pin, Plastic QFP
Pitch in mm’s
1.27 mm
0.8 mm
TA=-20° C to +85° C
UR5HCSPI-XX-FN
UR5HCSPI-XX-FB
Other Materials
SPICoderTM
Type
Testing Board
Order number
ASY5-SPI-XXX
Note 1: XX=Optional Customization, XXX= Denotes Revision number
BLOCK DIAGRAM
MISO
R0-R8
MOSI
SCK
SS
SPI
Communication
Channel
Keyboard
Scanner
LED0
LED1
LED2
Keyboard
Matrix
&
ATN
Keyboard
State
Control
C0-C11
LEDs
PWR_OK
WKUP
IOTEST
WKU
System
Monitor
Input
Signals
Power
Management
Unit
LID
WUKO
XSW
SWO
LID Latch Monitor
Wake-Up Keys Only Signal
Switch External to Case
Switch
UR5HCSPI
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
2
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FUNCTIONAL DESCRIPTION
The UR5HCSPI consists
functionally of five major sections
(see the Functional Diagram on
page 2). These are the Keyboard
Scanner and State control, the
Programmable I/O, the SPI
Communication Channel, the
System Monitor and the Power
Management unit. All sections
communicate with each other and
operate concurrently.
PIN DEFINITIONS
Mnemonic
VCC
VSS
VX
OSCI
OSCO
_RESET
PLCC
44
22
4
43
42
1
QFP
38
17
43
37
36
41
MISO
MOSI
SCK
_SS
_IOTEST
_WKU
R0-R4
R5-R7
C0-C5
C6-C7
C8-C9
34
35
36
37
24
2
13-17
19-21
12-7
6-5
31-30
29
30
31
32
18
42
8-12
13-15
7-2
1,44
26-25
C10/WUKO
C11/_LID
29
28
24
23
LED2
LED1
LED0
XSW
SWO
27
26
25
33
32
21
20
19
28
27
38
39
3,18
23,40
41
33
34
39-40
16,22
35
_ATN
_PWR_OK
NC
NC0
Type Name and Function
Power Supply: 3-5V
I
Ground
I
Tie to VCC
I
Oscillator input
O Oscillator output
I
Reset: apply 0V to provide orderly
start-up
O SPI Interface Signals
I
I
I
Slave Select: If not used tie to VSS
O Wake-Up Control Signals
I
I
Row Data Inputs
I
Port provides internal pull-up resistors
O Column Select Outputs:
O
O
Multi-function pins
I/O C10 & “Wake-Up Keys Only” imput
I/O C11 & Lid latch detect input
Miscellaneous functions
I/O LED2 output
I/O LED1 output
I/O LED0 output
I
External discrete switch
I
Discrete switch
Power Management Pins
O CPU Attention Output
I
Power OK Input
No Connects: these pins are unused
NC0 should be tied to VSS or GND
Note 1: An underscore before a pin mnemonic denotes an active low signal.
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
3
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PIN DESCRIPTIONS
VCC and VSS
_IOTEST and _WKU
C10/WUKO
VCC and VSS are the power
supply and ground pins. The
UR5HCSPI will operate from a 3-5
Volt power supply. To prevent noise
problems, provide bypass
capacitors and place them as
close as possible to the IC with the
power supply. VX, where available,
should be tied to Vcc.
“Input Output Test” and “Wake Up”
pins control the stop mode exit of
the device. The designer can
connect any number of active low
signals to these two pins through a
17K resistor, in order to force the
device to exit the stop mode. A
sample circuit is shown on page 15
of this document.
OSCI and OSCO
All the signals are “wire-anded.”
When any one of these signals is
not active, it should be floating (i.e.,
these signals should be driven from
“open-collector” or “open-drain”
outputs). Other configurations are
possible; contact Semtech.
The C10/WUKO pin acts
alternatively as column scan output
and as an input. As an input, the
pin detects the “Wake-Up Keys
Only” signal, typically provided by
the host CPU to indicate that the
user has turned the unit off. When
the device detects an active high
state on this pin, it feeds this
information into the “Keyboard State
Control” unit, in order to disable the
keyboard and enable the
programmed wake-up keys.
OSCI and OSCO provide the input
and output connections for the onchip oscillator. The oscillator can
be driven by any of the following
circuits:
- Crystal
- Ceramic Resonator
- External Clock Signal
The frequency of the on-chip
oscillator is 2 MHz.
_RESET
A logic zero on the _RESET pin will
force the UR5HCSPI into a known
start-up state. The reset signal can
be supplied by any of the following
circuits:
- RC
- Voltage monitor
- Master system reset
MOSI, MISO, SCK, _SS, _ATN
R0-R 7
The R0-R7 pins are connected to
the rows of the scanned matrix.
Each pin provides an internal pullup resistor, eliminating the need for
external components.
C0-C9
C0 to C9 are bi-directional pins
connected to the columns of the
scanned matrix. When a column is
selected, the pin outputs an active
low signal. When the column is deselected, the pin turns into highimpedance.
These five signals implement the
SPI interface. The device acts as a
slave on the SPI bus. The _SS
(Slave Select) pin should be tied to
ground if not used by the SPI
master. The _ATN pin is asserted
low each time the UR5HCSPI has a
packet ready for delivery. For a
more detailed description, refer to
the SPI Communication Channel
section on page 9.
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
4
C11/_LID
The C11/_LID pin acts in a similar
manner to the C10/WUKO. This pin
is typically connected to the LID
latch through a 150K resistor, in
order to detect physical closing of
the device cover. When the pin
detects an active low state in this
input, it feeds this information into
the “Keyboard State Control” unit, in
order to disable keys inside the
case and enable only switches
located physically on the outer
body of the H/PC unit.
LED0, LED1 and LED2
These three pins provide an active
low drive for LED indicators. The
programming of these pins is
explained in the LEDs section on
page 8 of this document.
www.semtech.com
PIN DESCRIPTIONS, (CON’T)
THE WINDOWS CE® KEYBOARD
XSW
The following illustration shows a typical implementation of a Windows CE®
keyboard.
The XSW pin is dedicated to an
external switch. This pin is
handled differently than the rest of
the switch matrix and is intended
to be connected to a switch
physically located on the outside of
the unit.
Windows CE® does not support the following keyboard keys typically
found on desktop and laptop keyboards:
power
SW0
The SW0 pin is a dedicated input
pin for a switch.
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tab
shift
PWR_OK
ctrl
The PWR_OK is an active low pin
that monitors the battery status of
the unit. When the UR5HCSPI
detects a transition from high to
low on this pin, it will immediately
enter the STOP mode, turn the LED
off and remain in this state until the
batteries of the unit are replaced
and the signal is deasserted.
_
esc
A
S
Z
F
D
X
C
G
V
alt
J
H
B
N
K
M
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INSERT
SCROLL LOCK
PAUSE
NUM LOCK
Function Keys (F1-F12)
PRINT SCREEN
If the keyboard implements the Windows key, the following key
combinations are supported in the Windows CE® environment:
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
Key Combination
Result
Windows
Windows+K
Windows+I
Windows+C
Windows+E
Windows+R
Windows+H
Ctrl+Windows+A
Open Start Menu
Open Keyboard Tool
Open Stylus Tool
Open Control Panel
Explore the H/PC
Display the Run Dialog Box
Open Windows CE® Help
Select all on desktop
5
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enter
shift
“GHOST” KEYS
KEYBOARD SCANNER
In any scanned contact switch
matrix, whenever three keys
defining a rectangle on the switch
matrix are pressed at the same
time, a fourth key positioned on the
fourth corner of the rectangle is
sensed as being pressed. This is
known as the “ghost” or “phantom”
key problem.
The encoder scans a keyboard organized as an 8 row by 12 column matrix
for a maximum of 96 keys. Smaller size matrixes can also be
accommodated by simply leaving unused pins open. The UR5HCSPI
provides internal pull-ups for the Row input pins. When active, the encoder
selects one of the column lines (C0-C13) every 512 µS and then reads the
row data lines (R0-R7). A key closure is detected as a zero in the
corresponding position of the matrix.
Actual key presses
A complete scan cycle for the entire keyboard takes approximately 9.2 mS.
Each key found pressed is debounced for a period of 20 mS. Once the key
is verified, the corresponding key code(s) are loaded into the transmit buffer
of the SPI communication channel.
N-KEY ROLLOVER
“Ghost”
Key
Figure 1: “Ghost” or “Phantom” Key
Problem
Although the problem cannot be
totally eliminated without using
external hardware, there are
methods to neutralize its negative
effects for most practical
applications. Keys that are
intended to be used in
combinations should be placed in
the same row or column of the
matrix, whenever possible. Shift
Keys (Shift, Alt, Ctrl, Window)
should not reside in the same row
(or column) as any other keys. The
UR5HCSPI has built-in mechanisms
to detect the presence of “ghost”
keys.
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
In this mode, the code(s) corresponding to each key press are transmitted
to the host system as soon as that key is debounced, independent of the
release of other keys.
When a key is released, the corresponding break code is transmitted to the
host system. There is no limitation to the number of keys that can be held
pressed at the same time. However, two or more key closures, occurring
within a time interval of less than 5mS, will set an error flag and will not be
processed. This feature is to protect against the effects of accidental key
presses.
6
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KEYBOARD STATES
These states of operation refer only
to the keyboard functionality and,
although they are related to power
states, they are also independent of
them.
(LID = 0) AND (WUK0=0)
AND Key Press
Send
XSW Key
Only
(LID = 1) AND (WUKO=0)
AND Key Press
"Send All Keys"
WUKO=1
AND Key Press
Entry Conditions: Power on reset,
soft reset, PWR_OK =1,
{(LID=1) AND (WUKO=0)}
Exit Conditions: PWR_OK = 0 ->
"Send No Keys"(WUKO=1) AND
(Key Press) -> "Send Wake-Up
Keys Only"(LID = 0) AND
(WUKO=0) AND (Key Press) ->
"Send XSW Key Only"
Description: This is the UR5HCSPI’s
normal state of operation, accepting
and transmitting every key press to
the system. This state is entered
after the power-on and is sustained
while the unit is being used.
“Send Wake-Up Keys Only”
Entry Conditions:(WUKO=1) AND
(Key or Switch press)
Exit Conditions: Soft Reset -> “Send
All Keys”PWR_OK = 0 -> “Send No
Keys”
Description:This state is entered
when the user turns the unit off. A
signal line driven by the host will
notify the UR5HCSPI about this
state transition. While in this state,
the UR5HCSPI will transmit only
keys programmed to be wake-up
keys to the system. It is not
necessary for the UR5HCSPI to
detect this transition in real time,
since it does not effect any
operation besides buffering
keystrokes.
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
Send All
Keys
WUKO =1
AND Key
Press
(PWR_OK =1)
AND (LID = 0)
AND (WUKO=0)
AND Key Press
Soft Reset
PWR_OK ↓
Send Wake
Up Keys
Only
PWR_OK ↓
(PWR_OK =1)
AND (WUKO=0)
AND (LID=1)
AND Key Press
PWR_OK = 0
PWR_OK ↓
(PWR_OK =1) AND Key Press
AND (WUKO = 1)
Send
No Keys
Figure 2: The UR5HCSPI implements four modes of keyboard and switch operation.
“Send No Keys"
Entry Conditions:PWR_OK
transition from high to low
Exit Conditions: (PWR_OK = 1)
AND (Matrix key pressed OR
Switch OR _WKUP)
Description: This state is entered
when a PWR_OK signal is asserted
(transition high to low), indicating a
critically low level of battery
voltage. The PWR_OK signal will
cause an interrupt to the
UR5HCSPI, which guarantees that
the transition is performed in real
time. While in this state, the
UR5HCSPI will perform as follows:
1. The LED will be turned off.
Nevertheless, its state is saved and
will be restored after exiting the
disabled state (change of
batteries).
2. The UR5HCSPI will enter the
STOP mode for maximum energy
conservation.
7
3. Stop mode time-out entry will be
shortened to further conserve
energy.
4. While in this state all interrupts
are disabled. The UR5HCSPI will
exit this state on the next interrupt
event that detects the PWR_OK line
has been de-asserted.e
“Send XSW Key Only"
Entry Condition: (LID=0) AND
(WUKO=0) AND (Key Press)
Exit Condition: (LID=1) AND
(WUKO=0) AND (Key Press) ->
“Send All Keys”PWR_OK = 0 ->
“Send No Keys”
(WUKO = 1) AND (Key Press) ->
“Send Wake Up Keys Only”
Description: This state is entered
upon closing the lid of the device.
While in this state, the encoder will
transmit only the XSW key, which is
located outside the unit. This
feature is designed to
accommodate buttons on the
outside of the box, such as a
microphone button, that need to be
used while the lid is closed.
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KEY CODES
LED MODES
Key codes range from 01H to 73H
and are arranged as follows:
1
2
on
Make code = column_number * 8 +
row_number + 1
XSW = 71H
SW0 = 72H
meta blink count
on
on
on
off
off
off interval
on interval
Break code = Make code OR 80H
Discrete Switches transmit the
following codes:
on
off
3
meta blink off
1 blinking cycle
Figure 3: The behavior of an LED using the settings 1: LED on; 0: LED off.
The UR5HCSPI provides three LED pins. There are three LED modes: off,
on, and blinking. The LED can be individually set to one of these modes. In
the Blinking Mode, both the on-interval and the off-interval can be
individually set. Additionally, a meta blink count and meta blink interval
may be specified. This describes an interval of a different length which may
be inserted after each specified number of blinks. All the intervals are
based on a 1/16th of a second duration. When the LED is on or blinking, the
SPICoderTM will not enter the STOP Mode unless the PWR_OK signal is
asserted low. In this case, the device will save the status of the LED and
turn it off. The default LED mode is off.
The above timing chart describes the behavior of an LED using these
settings,1: LED on; 0: LED off.
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
8
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SPI COMMUNICATION CHANNEL
SPI data transfers can be performed at a maximum clock rate of 500 KHz. When the UR5HCSPI asserts the _ATN
signal to the host Master, the data will have already been loaded into the data register waiting for the clocks from
the master. The Slave Select (SS) line can be tied permanently to Ground if the UR5HCSPI is the only slave device
in the SPI network. One _ATN signal is used per each byte transfer. If the host fails to provide clock signals for
successive bytes in the data packet within 120 mS, the transmission will be aborted and a new session will be
initiated by asserting a new ATN signal. In this case, the whole packet will be re-transmitted.
If the SPI transmission fails 20 times consecutively, the synchronization between the master and slave may be lost.
In this case, the UR5HCSPI will enter the reset state.
The UR5HCSPI implements the SPI communication protocol according to the following diagram:
CPOL = 0 ---------- SCK line idles in low state
CPHA = 1 ---------- SS line is an output enable control
_ATN SIGNAL
SCK (CPOL=0)
_SS
SAMPLE INPUT
DATA OUTPUT
(CPHA=1)
?
MSB
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
LSB
Figure 4: SPI Communication Protocol
When the host sends commands to the keyboard, the UR5HCSPI requires that the minimum and maximum
intervals between two successive bytes be 200 µS and 5 mS respectively.
Figure 5: Transmitting Data Waveforms:
Figure 6: Receiving Data Waveforms
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
9
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DATA/COMMAND BUFFER
POWER MANAGEMENT UNIT
The UR5HCSPI implements a data
buffer that contains the key
code/command bytes waiting to be
transmitted to the host. If the data
buffer is full, the whole buffer will be
cleared and an "Initialize" command
will be sent to the host. At the
same time, the keyboard will be
disabled until the "Initialize" or
"Initialize Complete" command from
the host is received.
The UR5HCSPI supports two modes of operation. The following table lists
the typical and maximum supply current (no DC loads) for each mode at
3.3 Volts (+/- 10%).
Current
RUN
Typical
1.5 1
Max
3.0
Unit
mA
STOP
2.0
20
µA
Description
Entered only while data/commands
are in process and if the LEDs
are blinking
Entered after 125 mS of inactivity if
LEDs islow
Power consumption of the keyboard sub-system will be determined
primarily by the use of the LEDs. While the UR5HCSPI is in the STOP
mode, an active low Wake-Up Output from the Master must be connected
to the edge-sensitive _WKU pin of the UR5HCSPI. This signal will be used
to wake up the UR5HCSPI in order to receive data from the Master host.
The Master host will have to wait a minimum of 5 mS prior to providing
clocks to the UR5HCSPI. The UR5HCSPI will enter the STOP mode after a
125 mS period of keypad and/or host communications inactivity, or anytime
the PWR_OK line is asserted low by the host. Note that while one or more
keys are held pressed, the UR5HCSPI will not enter the STOP mode until
every key is released.
Figure 7: The power states of the UR5HCSPI
-
Keyboard
Switch
Input transaction
System wake-up
Stop
After Reset
or 125 mS of
inactivity
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
10
Run
While processing
current task
and/or LED(s)
are active
- After 125 mS of
inactivity and LEDs
are off
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COMMUNICATION PROTOCOL
There are eight commands that may be sent from the UR5HCSPI to the host, and ten commands that may be sent
from the host to the UR5HCSPI.
Each command from UR5HCSPI to the host is composed of a sequence of codes. All commands start with
<CONTROL> code (80H) and end with LRC code (see the description of the LRC calculation on page 12).
Command details are listed below.
Commands to the Host - Summary
Command Name
Code
Initialize Request
AOH
Initialize Complete
A1H
Heartbeat Response
A2H
Identification Response
F2H
LED Status Report
A3H
Resend Request
A5H
Description
Sent to the host when the data buffer is full
Issued upon completion of the “Initialize” command issued by the host
Response to “Heartbeat Request” issued by the host
Response to “Identification Request” issued by the host
Response to “LED Status Request”
Issued upon error during the reception of a packet
LRC CALCULATION
COMMANDS TO THE HOST ANALYTICALLY
The LRC is calculated for the
whole packet, including the
Command Code and the
Command Prefix. The LRC is
calculated by first taking the
bitwise exclusive OR of all bytes
from the message. If the most
significant bit (MSB) of the LRC is
set, the LRC is modified by
clearing the MSB and changing the
state of the next most significant
bit. Thus, the Packet Check Byte
will never consist of a valid LRC
with the most significant bit set.
Initialize Request
<CONTROL>
80H
<INIT>
A0H
<LRC>
20H
The UR5HCSPI will send the Initialize Request Command to the host when
its data buffer is full.
Initialization Complete
<CONTROL>
80H
<INIT COMPLETE>
A1H
<LRC>
21H
The UR5HCSPI wil send the Initialize Complete Report to the host when it
finishes the initialization caused by Initialize Command from the host.
Heartbeat Response
<CONTROL>
80H
<ONLINE>
A2H
<LRC>
22H
The UR5HCSPI will send the Heartbeat Response to the host when it
receives the Heartbeat Request Command from the host.
Identification Response
<CONTROL>
80H
<ID>
F2H
<Vendor>
02H
--- USAR
<Revision>
08H
--- Rev 0.8A
<Switch>
00H
.
<LRC>
7EH
The UR5HCSPI will send the Identification Response to the host when it
receives the Identification Request Command from the host.
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
11
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LRC CALCULATION, (CON’T)
COMMANDS FROM THE UR5HCSPI TO THE HOST, (CON’T)
The following C language function
is an example of an LRC
calculation program. It accepts
two arguments: a pointer to a
buffer and a buffer length. Its
return value is the LRC value for
the specified buffer.
LED Status Report
<CONTROL>
<LED>
<Status 0>
80H
A3H
xxH
<Status 1>
xxH
<Status 2>
xxH
char Calculate LRC (char buffer,
size buffer)
{
char LRC;
size_t index;
/*
* Init the LRC using the first two
message bytes.
*/
LRC = buffer [0] ^ buffer [1];
/*
* Update the LRC using the
remainder of the buffer.
*/
for (index = 2; index < buffer; index
++)
LRC ^ = buffer[index];
/*
* If the MSB is set then clear the
MSB and change the next most
significant bit
*/
if (LRC & 0x80)
LRC ^ = 0xC0;
/* * Return the LRC value for the
buffer.*/}
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
LED0 status:( 0=OFF; 1=ON;
2=BLINKING; 3=NO LED MODE )
LED1 status:( 0=OFF; 1=ON;
2=BLINKING; 3=NO LED MODE )
LED2 status:( 0=OFF; 1=ON;
2=BLINKING; 3=NO LED MODE)
<LRC>
xxH
The UR5HCSPI will send the LED Status Report to the host when it receives
the LED Status Request Command from the host.
Resend Request
<CONTROL>
80H
<RESEND>
A5H
<LRC>
25H
The UR5HCSPI will send this Resend Request Command to the host when
its command buffer is full, or if it detects either a parity error or an unknown
command during a system command transmission.
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COMMANDS FROM THE HOST TO THE UR5HCSPI
Commands from the Host - Summary
Command Name
Code
Initialize
AOH
Initialization Complete
A1H
Heartbeat Request
A2H
Identification Request
F2H
LED Status Request
A3H
LED Modify
A6H
Resend Request
A5H
Input/Output Mode Modify
A7H
Output Data to I/O pin
A8H
Set Wake-Up Keys
A9H
Description
Causes the UR5HCSPI to enter the power-on state
Issued as a response to the “Initialize Request”
The UR5HCSPI will respond with “Heartbeat Response”
The UR5HCSPI will respond with “Identification Response”
The UR5HCSPI will respond with “LED Status Response”
The UR5HCSPI will change the LED accordingly
Issued upon error during the reception of a packet
The UR5HCSPI will modify or report the status of the GIO0 pin
The UR5HCSPI will output a signal to the GIO0 pin
Defines which keys are “wake-up” keys
Each command to UR5HCSPI is composed of a sequence of codes. All commands start with <ESC> code (1BH)
and end with the LRC code (bitwise exclusive OR of all bytes).
COMMANDS FROM THE HOST TO THE UR5HCSPI ANALYTICALLY
Initialize
<ESC>
<INIT>
<LRC>
When the UR5HCSPI receives
1BH
A0H
7BH
this command, it will clear all buffers and return to the power-on state.
Initialization Complete
<ESC>
1BH
<INIT COMPLETE>
A1H
<LRC>
7AH
When the UR5HCSPI receives this command, it will enable transmission of keyboard data. Keyboard data
transmission is disabled if the TX output buffer is full (32 bytes). Note that if the transmit data buffer gets full the
encoder will issue an "Initialize Request" to the host.
Heartbeat Request
<ESC>
<ONLINE>
<LRC>
When the UR5HCSPI receives
1BH
A2H
79H
this command, it will reply with the Heartbeat Response Report.
Identification Request
<ESC>
<ID>
<LRC>
The UR5HCSPI will reply to this
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
1BH
F2H
29H
command with the Identification Response Report.
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COMMANDS FROM THE HOST TO THE UR5HCSPI, (CON’T)
Set Wake-Up Keys
<ESC>
<SETMATRIX>
<COL0>
R6 R5 R4 R3 R2 R1 R0
enabled, 1-disabled)
<COL1>
<COL2>
<COL3>
<COL4>
<COL5>
<COL6>
<COL7>
<COL8>
<COL9>
<COL10>
<COL11>
<SWITCHES>
<LRC>
1BH
A9H
xxH
(R7
Bitmap: 0xxH
xxH
xxH
xxH
xxH
xxH
xxH
xxH
xxH
xxH
xxH
xxH
xxH
The "Set Wake-Up Keys" command
is used to disable specific keys
from waking up the host. Using this
command, the host can set only a
group of keys.
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
LED Status Request
<ESC>
<LED>
<LRC>
When UR5HCSPI receives this
Report.
1BH
A3H
78H
command, it will reply with the LED Status
LED Modify
<ESC>
1BH
<MODLED>
A6H
<LED NUMBER>
xxH
LED number (0)
<LED STATE>
xxH
(0=LED OFF; 1=LED ON; 2=LED
BLINKING)
<ON INTERVAL>
xxH
Time in 1/16ths of a second for
LED to be on
<OFF INTERVAL>
xxH
Time in 1/16ths of a second for
LED to be off
<META COUNT>
xxH
Number of blinks after which to
apply meta blink interval
<META INTERVAL>
xxH
Time in 1/16ths of a second for
LED to be off after <META COUNT> blinks
<LRC>
xxH
When the UR5HCSPI receives this command, it will change the LED mode
accordingly.
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_WKUP
PWR_OK
_ATN
SCK
15K
150K
35
17
34
GND
Vin
NC0
VSS
PWR_OK
ATN
SS
SCK
MOSI
MISO
Vout
41
RESET
Ceramic resonator circuit
with built in capacitors
Alternatively a 2MHz CMOS
signal can be tied directly
to OSC1
Power OK Signal
Attention Signal 33
Tied to Gnd
if not used
Slave Select 32
31
30
1MOhm
UR5HCSPI-FB
2MHz
R7
R6
R5
R4
R3
R2
R1
R0
XSW
SW0
C0
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10/WUKO
C11/LID
36
MISO
OSCO
MOSI
VCC
OSCI
37
29
43
38
Vpp
VDD
VCC
19
LED0
Alternatively an RC circuit
or Master Reset Signal
can be used
Wake Up
Signal
20
LED1
Telcom
TC54C4302ECB
Power OK
Signal
21
LED2
IOTEST
18
15
WKU
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
42
UR5HCSPI-FB
15K
15K
UR5HCSPI-FB V0.9
(c) 2000, USAR, A Semtech Co.
1.5M
DISCRETE
SWITCHES
28
27
1.5M
COLUMN
OUTPUTS
WUKO
_LID
TO SWITCH
MATRIX
ROW
INPUTS
7
6
5
4
3
2
1
44
26
25
24
23
15
14
13
12
11
10
9
8
SUGGESTED SCHEMATIC FOR THE UR5HCSPI-FB
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IMPLEMENTATION NOTES FOR THE UR5HCSPI
The following notes pertain to the suggested schematic found on the
previous page.
The Built-in Oscillator on the UR5HCSPI-06 requires the attachment of the
2.00 MHz Ceramic Resonators with built-in Load Capacitors.. You can use
either an AVX, part number PBRC-2.00 BR; or a Murata part number
CSTCC2.00MG ceramic resonator.
It may also be possible to operate with the 2.00 MHz Crystal, albeit with
reduced performance. Due to their high Q, the Crystal oscillator circuits
start-up slowly. Since the SPICoderTM constantly switches the clock on and
off, it is important that the Ceramic Resonator is used (it starts up much
quicker than the Crystal). Resonators are also less expensive than Crystals.
Also, if Crystal is attached, two Load Capacitors (33pF to 47pF) should be
added, a Capacitor between each side of the Crystal and ground.
In both cases, using Ceramic Resonator with built-in Load Capacitors, or
Crystal with external Load Capacitors, a feedback Resistor of 1 Meg should
be connected between OSCIN and OSCOUT.
Troubleshoot the circuit by looking at the Output pin of the Oscillator. If the
voltage is half-way between Supply and Ground (while the Oscillator should
be running) --- the problem is with the Load Caps / Crystal. If the voltage is
all the way at Supply or Ground (while the Oscillator should be running) --there are shorts on the PCB.
Note: When the Oscillator is intentionally turned OFF, the voltage on the
Output pin of the Oscillator is High (at the Supply rail).
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
16
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ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings
Ratings
Supply Voltage
Input Voltage
Current Drain per Pin
(not including Vss or Vdd)
Operating Temperature
UR5HCSPI
Storage Temperature Range
Thermal Characteristics
Characteristic
Thermal Resistance
Plastic
PLCC
Symbol
Vdd
Vin
I
Value
-0.3 to +7.0
Vss -0.3 to Vdd +0.3
25
Unit
V
V
mA
Ta
T low to T high
-40 to +85
-65 to +150
°C
Value
Unit
°C per W
Tstg -
Symbol
Tja
°C
60
70
DC Electrical Characteristics (Vdd=3.3 Vdc +/-10%, Vss=0 Vdc, Temperature range=T low to T high unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Output Voltage (I load<10µA)
Vol
0.1
V
Voh
Vdd–0.1
Output High Voltage (I load=0.8mA)
Voh
Vdd–0.8
V
Output Low Voltage (I load=1.6mA)
Vol:
0.4
V
Input High Voltage
Vih
0.7xVdd
Vdd
V
Input Low Voltage
Vil
Vss
0.2xVdd
V
User Mode Current
Ipp
5
10
mA
Data Retention Mode (0 to 70°C)
Vrm
2.0
V
Supply Current (Run)
Idd
1.53
3.0
mA
(Wait)
0.711
1.0
mA
(Stop)
2.0
20
µA
I/O Ports Hi-Z Leakage Current
Iil
+/-10
µA
Input Current
Iin
+/- 1
µA
I/O Port Capacitance
Cio
8
12
pF
Control Timing (Vdd=3.3 Vdc +/-10%, Vss=0 Vdc, Temperature range=T low to T high unless otherwise noted)
Characteristic
Symbol
Min
Max
Unit
Frequency of Operation
fosc
MHz
Crystal Option
2.0
External Clock Option
dc
2.0
Cycle Time
tcyc
1000
ns
Crystal Oscillator Startup Time
toxov
100
ms
Stop Recovery Startup Time
tilch
100
ms
RESET Pulse Width
trl
8
tcyc
Interrupt Pulse Width Low
tlih
250
ns
Interrupt Pulse Period
tilil
*
tcyc
OSC1 Pulse Width
toh, tol
200
ns
*The minimum period tlil should not be less than the number of cycle times it takes to execute the interrupt service routine plus 21 tcyc.
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
17
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SPICODERTM BILL OF MATERIALS
UR5HCSPI-FB
Quantity
3
3
3
1
1
2
1
1
Manufacturer
Generic
Generic
Generic
Generic
Generic
Generic
TELCOM
AVX
Part#
330 Ohms
LED
15 K
150 K
1M
1.5 K
TC54VC4302ECB713
TC54VC2702ECB713
PBRC-2.00BR
Description
330 Ohms Resistor
Led used as LED1. LED2. LED3
15 K Resistors
150 K Resistors
1M Resistors
1.5 K Resistors
IC Volt Detector CMOS 4.3V SOT23, for 5V Operation
IC Volt Detector CMOS 2.7V SOT23, for 3.3V Operation
2.00MHZCeramic Resonator with Built in Capacitors, SMT
Revised 7/14/99
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
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DOC5-SPI-DS-117
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For sales information
and product literature,
contact:
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Semtech Corporation
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[email protected]
http://www.semtech.com
212 226 2042 Telephone
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Copyright 2000-2001 Semtech Corporation. All rights reserved.
Zero-Power, SPICoder and Self-Power Management are trademarks
of Semtech Corporation. Semtech is a registered trademark of
Semtech Company. All other trademarks belong to their respective
companies.
INTELLECTUAL PROPERTY DISCLAIMER
This specification is provided "as is" with no warranties whatsoever
including any warranty of merchantability, fitness for any particular
purpose, or any warranty otherwise arising out of any proposal,
specification or sample. A license is hereby granted to reproduce
and distribute this specification for internal use only. No other
license, expressed or implied to any other intellectual property
rights is granted or intended hereby. Authors of this specification
disclaim any liability, including liability for infringement of proprietary
rights, relating to the implementation of information in this
specification. Authors of this specification also do not warrant or
represent that such implementation(s) will not infringe such rights.
Copyright Semtech 1997-2001
DOC5-SPI-DS-117
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