Revised August 2003 FIN1047 3.3V LVDS 4-Bit Flow-Through High Speed Differential Driver General Description Features This quad driver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350mV which provides low EMI at ultra low power dissipation even at high frequencies. This device is ideal for high speed transfer of clock and data. ■ Greater than 400Mbs data rate The FIN1047 can be paired with its companion receiver, the FIN1048, or any other LVDS receiver. ■ Power-Off protection ■ Flow-through pinout simplifies PCB layout ■ 3.3V power supply operation ■ 0.4 ns maximum differential pulse skew ■ 1.7 ns maximum propagation delay ■ Low power dissipation ■ Meets or exceeds the TIA/EIA-644 LVDS standard ■ Pin compatible with equivalent RS-422 and LVPECL devices ■ 16-Lead SOIC and TSSOP packages save space Ordering Code: Order Number Package Number FIN1047M M16A FIN1047MTC MTC16 Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Pin Descriptions Pin Name Description DIN1, DIN2, DIN3, DIN4 LVTTL Data Inputs DOUT1+, DOUT2+, DOUT3+, DOUT4+ Non-Inverting Driver Outputs DOUT1−, DOUT2−, DOUT3−, DOUT4− Inverting Driver Outputs EN Driver Enable Pin EN Inverting Driver Enable Pin VCC Power Supply GND Ground Truth Table Inputs Outputs EN EN DIN DOUT+ H L or OPEN H H L H L or OPEN L L H H L or OPEN OPEN L H X H X Z Z L or OPEN X X Z Z H = HIGH Logic Level X = Don’t Care DOUT− L = LOW Logic Level Z = High Impedance © 2003 Fairchild Semiconductor Corporation DS500589 www.fairchildsemi.com FIN1047 3.3V LVDS 4-Bit Flow-Through High Speed Differential Driver June 2001 FIN1047 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions −0.5V to +4.6V Supply Voltage (VCC) DC Input Voltage (VIN) −0.5V to +6V DC Input Voltage (VOUT) −0.5V to 4.6V Driver Short Circuit Current (IOSD) Storage Temperature Range (TSTG) Supply Voltage (VCC) Continuous 150°C Lead Temperature (TL) 260°C Note 1: The “Absolute Maximum Ratings”: are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature and output/input loading variables. Fairchild does not recommend operation of circuits outside databook specification. (Soldering, 10 seconds) ESD (Human Body Model) ≥ 9000V ESD (Machine Model) ≥ 1200V 0 to VCC −40°C to +85°C Operating Temperature (TA) −65°C to +150°C Max Junction Temperature (TJ) 3.0V to 3.6V Input Voltage (VIN) DC Electrical Characteristics Over supply voltage and operating temperature ranges, unless otherwise specified Symbol Parameter VOD Output Differential Voltage ∆VOD VOD Magnitude Change from Test Conditions Differential LOW-to-HIGH RL = 100Ω, Driver Enabled, VOS Offset Voltage See Figure 1 ∆VOS Offset Magnitude Change from Min Typ Max (Note 2) 250 340 1.125 Differential LOW-to-HIGH Units 450 mV 1.4 25 mV 1.25 1.375 V 1.2 25 mV 1.4 1.6 VOH HIGH Output Voltage VIN = VCC VOL LOW Output Voltage VIN = 0V 0.9 IOFF Power Off Output Current VCC = 0V, VOUT = 0V or 3.6V −20 IOS Short Circuit Output Current VOUT = 0V, Driver Enabled VIH Input HIGH Voltage VIL Input LOW Voltage (Note 3) IIN Input Current VIN = 0V or VCC −20 20 µA IOZ Disabled Output Leakage Current VOUT = 0V or 4.6V −20 20 µA II(OFF) Power-Off Input Current VCC = 0V, VIN = 0V or 3.6V −20 20 µA VIK Input Clamp Voltage IIK = −18 mA −1.5 ICC Power Supply Current No Load, VIN = 0V or VCC, Driver Enabled Output Power Up/Power Down High Z Leakage Current −6 −6 V GND 0.8 V −0.7 5 V 8 1.7 4 16 22 −20 Note 3: For transient conditions when t ≤ 5ns and IIN ≤ −100 mA, VILmin = −1.0V. 2 mA VCC + 1.0 RL = 100 Ω, VIN = 0V or VCC, Driver Enabled VCC = 0V or 1.5V µA 2.0 RL = 100 Ω, Driver Disabled Note 2: All typical values are at TA = 25°C and with VCC = 3.3V. www.fairchildsemi.com −3.5 V V 20 −3 VOD = 0V, Driver Enabled IPU/PD 1.05 20 mA µA Over supply voltage and operating temperature ranges, unless otherwise specified Symbol tPLHD Parameter Test Conditions Differential Propagation Delay LOW-to-HIGH tPHLD Differential Propagation Delay HIGH-to-LOW Min Typ Max (Note 4) Units 0.6 1.1 1.7 ns 0.6 1.2 1.7 ns tTLHD Differential Output Rise Time (20% to 80%) RL = 100 Ω, CL = 10 pF, 0.4 1.2 ns tTHLD Differential Output Fall Time (80% to 20%) See Figure 2 (Note 8), and Figure 3 0.4 1.2 ns 0.4 ns 0.3 ns tSK(P) Pulse Skew |tPLH - tPHL| tSK(LH) Channel-to-Channel Skew tSK(HL) (Note 5) tSK(PP) Part-to-Part Skew (Note 6) fMAX Maximum Frequency (Note 7) tZHD Differential Output Enable Time from Z to HIGH 1.7 5.0 ns tZLD Differential Output Enable Time from Z to LOW RL = 100Ω, CL = 10 pF, 1.7 5.0 ns tHZD Differential Output Disable Time from HIGH to Z See Figure 4 (Note 8), and Figure 5 2.7 5.0 ns tLZD Differential Output Disable Time from LOW to Z 2.7 5.0 ns CIN Input Capacitance 4.2 pF COUT Output Capacitance 5.2 pF 0.05 1.0 RL = 100Ω, See Figure 6 (Note 8) 200 250 ns MHz Note 4: All typical values are at TA = 25°C and with VCC = 3.3V. Note 5: tSK(LH), tSK(HL) is the skew between specified outputs of a single device when the outputs have identical loads and are switching in the same direction. Note 6: tSK(PP) is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction (either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits. Note 7: fMAX criteria: Input tR = tF < 1ns, 0V to 3V, 50% Duty Cycle; Output VOD > 250 mv, 45% to 55% Duty Cycle; all switching in phase channels. Note 8: Test Circuits in Figures 2, 4, 6 are simplified representations of test fixture and DUT loading. 3 www.fairchildsemi.com FIN1047 AC Electrical Characteristics FIN1047 Note A: All input pulses have frequency = 10 MHz, tR or tF = 1 ns Note B: C L includes all fixture and instrumentation capacitance FIGURE 1. Differential Driver DC Test Circuit FIGURE 2. Differential Driver Propagation Delay and Transition Time Test Circuit Note B: All input pulses have the frequency = 10 MHz, tR or tF = 1 ns Note A: C L includes all fixture and instrumentation capacitance FIGURE 3. AC Waveforms FIGURE 4. Differential Driver Enable and Disable Test Circuit FIGURE 5. Enable and Disable AC Waveforms FIGURE 6. fMAX Test Circuit www.fairchildsemi.com 4 FIN1047 DC / AC Typical Performance Curves FIGURE 7. Output High Voltage vs. Power Supply Voltage FIGURE 8. Output Low Voltage vs. Power Supply Voltage FIGURE 9. Output Short Circuit Current vs. Power Supply Voltage FIGURE 10. Differential Output Voltage vs. Power Supply Voltage FIGURE 11. Differential Output Voltage vs. Load Resistor FIGURE 12. Offset Voltage vs. Power Supply Voltage 5 www.fairchildsemi.com FIN1047 DC / AC Typical Performance Curves (Continued) FIGURE 13. Power Supply Current vs. Frequency FIGURE 14. Power Supply Current vs. Power Supply Voltage FIGURE 15. Power Supply Current vs. Ambient Temperature FIGURE 16. Differential Propagation Delay vs. Power Supply Voltage FIGURE 17. Differential Propagation Delay vs. Ambient Temperature FIGURE 18. Differential Pulse Skew (tPLH - tPHL) vs. Power Supply Voltage www.fairchildsemi.com 6 FIGURE 19. Differential Pulse Skew (tPLH - tPHL) vs. Ambient Temperature FIN1047 DC / AC Typical Performance Curves (Continued) FIGURE 20. Transition Time vs. Power Supply Voltage FIGURE 21. Transition Time vs. Ambient Temperature 7 www.fairchildsemi.com FIN1047 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A www.fairchildsemi.com 8 FIN1047 3.3V LVDS 4-Bit Flow-Through High Speed Differential Driver Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 9 www.fairchildsemi.com