M54/74HC690/691 M54/74HC692/693 HC690/692 DECADE COUNTER/REGISTER (3-STATE) HC691/693 4 BIT BINARY COUNTER/REGISTER (3-STATE) . . . . . . . . HIGH SPEED fMAX = 50 MHz (TYP.) at VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) at TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS (for QA to QD) 10 LSTTL LOADS (for RCO) SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 6 mA (MIN.) (for QA to QD) IOH = IOL = 4 mA (MIN.) (for RCO) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V to 6 V PIN AND FUNCTION COMPATIBLE WITH LSTTL 54/74LS690/691 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) ORDER CODES : M54HCXXXF1R M74HCXXXM1R M74HCXXXB1R M74HCXXXC1R PIN CONNECTIONS (top view) DESCRIPTION The HC690/691/692/693 are high speed CMOS COUNTER/REGISTER fabricated in silicon gate C2MOS technology. They have the same high speed performance of LSTTL combined with true CMOS low power consumption. The internal circuit is composed of 3 stages including buffer output, which offers high noise immunity and stable output. These devices incorporate a synchronous counter, four-bit D-type register, and quadruple two-line to one-line multiplexers with three-state outputs in a single 20-pin package. The counter can be programmed from the data inputs and have enable P and enable T inputs and a ripplecarry output for easy expansion. The register/counter select input, R/C, selects the counter when low or the register when high for the threestate outputs, QA, QB, QC, and QD. If the LOAD input (LOAD) is held ”L” DATA input (AD) are loaded in to the internal counter at positive edge of counter clock input (CCK). In the counter mode, internal counter counts up at the positive of the counter clock. If the counter clear input (CCLR) is held ”L”, the internal counter is cleared ( synchronously to the counter clock for HC692/HC693, and asynchronously for HC690/HC691). The internal March 1993 NC = No Internal Connection 1/23 M54/M74HC690/691/692/693 counter’s outputs are stored in the output register at the positive edge of the register clock (RCK). If the register clear input (RCLR) is held ”L” the register is cleared (synchronously to register clock for HC692/HC693 and asynchronously for HC690/HC691). All inputs are equipped with protection circuits against static discharge and transient excess voltage. INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 3 to 6 A to D 7, 14 15 to 18 ENT, ENP QA to QD 1 CCLR 2 CCK Counter Clock 11 8 R/C RCLR Counter/ Register Select Register Clear (Active LOW) IEC LOGIC SYMBOLS HC690 HC691 HC692 HC693 2/23 NAME AND FUNCTION Data Inputs Enable Inputs Data Outputs Counter Clear (Active LOW) 9 RCK Register Clock 19 10 RCO GND Ripple Counter Output Ground (0V) 20 VCC Positive Supply Voltage M54/M74HC690/691/692/693 TRUTH TABLE INPUTS CCLR LOAD X X ENP X ENT X X X X OUTPUS CCK RCLR X X (*) RCK X R/C X G X QA Z X X X X X X L L L L L L L a QB Z QC Z L L b c NO CHANGE QD Z HIGH IMPEDANCE L H H X L H X X L H H X L X X L L NO CHANGE NO COUNT H H H X H X H X X X X X L L L L COUNT UP NO CHANGE COUNT UP NO COUNT X X X X X L (*) H L L X X X X X X X X X X H H H H L L a’ L L b’ c’ NO CHANGE L d FUNCTION CLEAR COUNTER LOAD COUNTER NO COUNT L CLEAR REGISTER d’ LOAD REGISTER NO LOAD (*) : X for HC690/691 for HC692/693 X : DON’T CARE Z : HIGH IMPEDANCE a-d : THE LEVEL OF STEADY STATE INPUTS AT INPUTS A THROUGHT D RESPECTIVELY. a’-d’ : THE LEVEL OF STEADY STATE OUTPUTS AT INTERNAL COUNTER OUTPUTS a’ through qd’ respectively HC690/692 RCO = QA • QD • ENT HC691/693 RCO = QA • QB • QC • QD • ENT BLOCK DIAGRAM 3/23 M54/M74HC690/691/692/693 LOGIC DIAGRAM (HC690) 4/23 M54/M74HC690/691/692/693 TIMING CHART (HC690) 5/23 M54/M74HC690/691/692/693 LOGIC DIAGRAM (HC691) 6/23 M54/M74HC690/691/692/693 TIMING CHART (HC691) 7/23 M54/M74HC690/691/692/693 LOGIC DIAGRAM (HC692) 8/23 M54/M74HC690/691/692/693 TIMING CHART (HC692) 9/23 M54/M74HC690/691/692/693 LOGIC DIAGRAM (HC693) 10/23 M54/M74HC690/691/692/693 TIMING CHART (HC693) 11/23 M54/M74HC690/691/692/693 ABSOLUTE MAXIMUM RATINGS Symbol Value Unit VCC VI Supply Voltage DC Input Voltage -0.5 to +7 -0.5 to VCC + 0.5 V V VO DC Output Voltage -0.5 to VCC + 0.5 V IIK IOK DC Input Diode Current DC Output Diode Current ± 20 ± 20 mA mA IO DC Output Source Sink Current Per Output Pin RCO ± 25 mA QA to QD ± 35 ICC or IGND Parameter DC VCC or Ground Current PD Tstg Power Dissipation Storage Temperature TL Lead Temperature (10 sec) ± 70 mA 500 (*) -65 to +150 mW o C 300 o C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied. (*) 500 mW: ≅ 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage VI Input Voltage VO Top Output Voltage Operating Temperature: M54HC Series M74HC Series Input Rise and Fall Time tr, tf 12/23 VCC = 2 V Value 2 to 6 Unit V 0 to VCC V 0 to VCC -55 to +125 -40 to +85 0 to 1000 V C o C ns VCC = 4.5 V 0 to 500 VCC = 6 V 0 to 400 o M54/M74HC690/691/692/693 DC SPECIFICATIONS Test Conditions Symbol VIH V IL Parameter High Level Input Voltage Low Level Input Voltage Value VCC (V) TA = 25 oC 54HC and 74HC Min. Typ. Max. 2.0 1.5 1.5 1.5 4.5 6.0 3.15 4.2 3.15 4.2 3.15 4.2 High Level Output Voltage (QA - QD) 0.5 0.5 0.5 4.5 1.35 1.35 1.35 2.0 4.5 6.0 4.5 V OH VOL High Level Output Voltage (RCO) Low Level Output Voltage (QA - QD) 6.0 2.0 Low Level Output Voltage (RCO) Input Leakage Current IO=-7.8 mA 6.0 4.5 6.0 IO=-5.2 mA 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 II VI = IO=-20 µA VIH or V IL IO=-6.0 mA VI = IO=-20 µA VIH or V IL IO=-4.0 mA 4.5 4.5 6.0 VOL 1.8 6.0 1.8 V 1.8 1.9 2.0 1.9 1.9 4.4 5.9 4.5 6.0 4.4 5.9 4.4 5.9 4.18 4.31 4.13 4.10 5.68 1.9 5.8 2.0 5.63 1.9 5.60 1.9 4.4 4.5 4.4 4.4 5.9 4.18 6.0 4.31 5.9 4.13 5.9 4.10 5.68 5.8 5.63 Unit V 2.0 6.0 V OH -40 to 85 oC -55 to 125 oC 74HC 54HC Min. Max. Min. Max. V V 5.60 0.0 0.0 0.1 0.1 0.1 0.1 0.1 0.1 0.0 0.1 0.1 0.1 0.17 0.18 0.26 0.26 0.37 0.37 0.40 0.40 0.0 0.0 0.1 0.1 0.1 0.1 0.1 0.1 0.0 0.1 0.1 0.1 0.17 0.18 0.26 0.26 0.37 0.37 0.40 0.40 VI = VCC or GND ±0.1 ±1 ±1 µA VI = IO= 20 µA VIH or V IL IO= 6.0 mA IO= 7.8 mA VI = IO= 20 µA VIH or V IL IO= 4.0 mA IO= 5.2 mA V V IOZ 3 State Output Off State Current 6.0 VI = VIH or VIL VO = VCC or GND ±0.5 ±5.0 ±10 µA ICC Quiescent Supply Current 6.0 VI = VCC or GND 4 40 80 µA 13/23 M54/M74HC690/691/692/693 AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = tf = 6 ns) Test Conditions Symbol Parameter VCC (V) tTLH tTHL Output Transition Time (Q) tTLH tTHL Output Transition Time (RCO) tPLH tPHL Propagation Delay Time (CCK - Q) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 tPLH tPHL Propagation Delay Time (RCK - Q) tPLH tPHL Propagation Delay Time (CCK - RCO) tPLH tPHL Propagation Delay Time (R/C - Q) tPLH tPHL Propagation Delay Time (ENT - RCO) tPHL Propagation Delay Time (CCLR - Q) (for HC690/691) tPHL tPHL 14/23 Propagation Delay Time (RCLR - Q) (for HC690/691) Propagation Delay Time (CCLR - RCO) (for HC690/691) CL (pF) 50 50 50 150 50 150 50 50 150 50 50 150 50 150 50 TA = 25 oC 54HC and 74HC Min. Typ. Max. 25 60 7 12 6 10 30 75 8 15 7 13 82 205 26 41 22 35 95 235 30 47 26 40 86 210 27 42 23 36 99 240 31 48 26 41 65 165 21 33 18 28 59 145 18 29 15 25 72 175 22 35 19 30 36 100 12 20 10 17 91 225 29 45 25 38 104 255 33 51 28 43 86 210 27 42 23 36 100 240 31 48 26 41 70 175 22 35 19 30 Value -40 to 85 oC -55 to 125 oC 74HC 54HC Min. Max. Min. Max. 75 90 15 19 13 15 95 115 19 23 16 20 255 310 51 62 43 53 295 255 59 71 50 60 265 315 53 63 45 54 300 360 60 72 51 61 205 250 41 50 35 43 180 220 36 44 31 37 220 265 44 53 37 45 125 150 25 30 21 26 280 340 56 68 48 58 320 385 64 77 54 65 265 315 53 63 45 54 300 360 60 72 51 61 220 265 44 53 37 45 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns M54/M74HC690/691/692/693 AC ELECTRICAL CHARACTERISTICS (Continued) Test Conditions Symbol fMAX tPZL tPZH Parameter Maximum Clock Frequency Output Enable Time tPLH tPHL Output Disable Time tW(H) tW(L) Minimum Pulse Width (CCK - RCK) tW(L) Minimum Pulse Width (CCLR - RCLR) (for HC690/691) ts ts ts ts th tREM CIN CPD (*) Minimum Set-up Time (LOAD, ENT, ENP) Minimum Set-up Time (A, B, C, D) Minimum Set-up Time (CCLR, RCLR) (for HC692/693) Minimum Set-up Time (CCK, RCK) Minimum Hold Time Minimum Removal Time (for HC690/691) Input Capacitance Power Dissipation Capacitance VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 CL (pF) 50 50 RL = 1 KΩ 150 RL = 1 KΩ 50 RL = 1 KΩ 50 50 50 50 50 50 TA = 25 oC 54HC and 74HC Min. Typ. Max. 4.4 12 22 45 26 53 48 120 15 24 13 20 61 150 19 30 17 26 32 145 15 29 13 25 28 75 7 15 6 13 40 75 8 15 7 13 68 17 14 44 11 9 44 11 9 150 30 26 100 20 17 100 20 17 190 38 32 125 25 21 125 25 21 220 44 37 145 29 25 145 29 25 48 12 10 125 25 21 0 0 0 25 5 5 10 155 31 26 0 0 0 30 6 5 10 180 36 31 0 0 0 40 8 7 10 50 50 for HC690/691 for HC692/693 Value -40 to 85 oC -55 to 125 oC 74HC 54HC Min. Max. Min. Max. 3.6 3 18 15 21 18 150 180 30 36 26 31 190 225 38 45 32 38 180 220 36 44 31 37 95 110 19 22 16 19 95 110 19 22 16 19 5 70 80 Unit MHz ns ns ns ns ns ns ns ns ns ns ns pF pF (*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD •VCC •fIN + ICC 15/23 M54/M74HC690/691/692/693 TEST CIRCUIT ICC (Opr.) SWITCHING CHARACTERISTICS TEST WAVEFORM for HC690/691 16/23 M54/M74HC690/691/692/693 SWITCHING CHARACTERISTICS TEST WAVEFORM (Continued) for HC692/693 for ALL TYPES (Fix Maximum Count) 17/23 M54/M74HC690/691/692/693 SWITCHING CHARACTERISTICS (continued) tPLZ, tPZL The 1 kΩ load resistors should be connected between outputs and VCC line and the 50 pF load capacitors should be connected between outputs and GND line. All inputs except G input should be connected to VCC line or GND line such that outputs will be in low logic level while G input is held low. 18/23 tPHZ, tPZH The 1 kΩ load resistors and the 50 pF load capacitors should be connected between each output and GND line. All inputs except G input should be connected to VCC or GND line such that output will be in high logic level while G input is held low. M54/M74HC690/691/692/693 Plastic DIP20 (0.25) MECHANICAL DATA mm DIM. MIN. a1 0.254 B 1.39 TYP. inch MAX. MIN. TYP. MAX. 0.010 1.65 0.055 0.065 b 0.45 0.018 b1 0.25 0.010 D 25.4 1.000 E 8.5 0.335 e 2.54 0.100 e3 22.86 0.900 F 7.1 0.280 I 3.93 0.155 L Z 3.3 0.130 1.34 0.053 P001J 19/23 M54/M74HC690/691/692/693 Ceramic DIP20 MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 25 0.984 B 7.8 0.307 D E 3.3 0.5 e3 0.130 1.78 0.020 22.86 0.070 0.900 F 2.29 2.79 0.090 0.110 G 0.4 0.55 0.016 0.022 I 1.27 1.52 0.050 0.060 L 0.22 0.31 0.009 0.012 M 0.51 1.27 0.020 0.050 N1 P Q 4° (min.), 15° (max.) 7.9 8.13 5.71 0.311 0.320 0.225 P057H 20/23 M54/M74HC690/691/692/693 SO20 MECHANICAL DATA mm DIM. MIN. TYP. A a1 inch MAX. MIN. TYP. 2.65 0.10 0.104 0.20 a2 MAX. 0.004 0.007 2.45 0.096 b 0.35 0.49 0.013 0.019 b1 0.23 0.32 0.009 0.012 C 0.50 0.020 c1 45° (typ.) D 12.60 13.00 0.496 0.512 E 10.00 10.65 0.393 0.419 e 1.27 0.050 e3 11.43 0.450 F 7.40 7.60 0.291 0.299 L 0.50 1.27 0.19 0.050 M S 0.75 0.029 8° (max.) P013L 21/23 M54/M74HC690/691/692/693 PLCC20 MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 9.78 10.03 0.385 0.395 B 8.89 9.04 0.350 0.356 D 4.2 4.57 0.165 0.180 d1 2.54 0.100 d2 0.56 0.022 E 7.37 8.38 0.290 0.330 e 1.27 0.050 e3 5.08 0.200 F 0.38 0.015 G 0.101 0.004 M 1.27 0.050 M1 1.14 0.045 P027A 22/23 M54/M74HC690/691/692/693 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A 23/23