ZXBM1004 VARIABLE SPEED SINGLE-PHASE BLDC MOTOR CONTROLLER DESCRIPTION The ZXBM1004 is a single-phase, DC brushless motor pre-driver with PWM variable speed control suitable for fan and blower motors. The controller is intended for applications where the fan or blower speed is controlled by an external PWM signal, thermistor or DC voltage. FEATURES QSOP16 • Compliant with external PWM speed control • Compliant with thermistor control • Minimum speed setting • Low noise • Auto restart • Built in hall amplifier • Speed pulse (FG) and lock rotor (RD) outputs • Up to 18V input voltage (60V with external regulator) • QSOP16 package Associated application notes:AN41 - Thermistor control AN42 - External PWM control AN43 - Interfacing to the motor windings APPLICATIONS • Mainframe and personal computer fans and blowers • Instrumentation fans • Central heating blowers • Automotive climate control ORDERING INFORMATION - QSOP16 DEVICE ZXBM1004Q16TA ZXBM1004Q16TC REEL SIZE TAPE WIDTH QUANTITY PER REEL 7" (180mm) 12mm 500 13" (330mm) 12mm 2,500 DEVICE MARKING • ZETEX ZXBM 1004 ISSUE 6 - MAY 2007 1 SEMICONDUCTORS ZXBM1004 ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL Supply voltage V CCmax -0.6 to 20 LIMITS UNIT V Input current I CCmax 200 mA V Input voltage V IN max -0.5 to V CC +0.5 Output voltage Power dissipation V OUT max P Dmax -0.5 to V CC +0.5 V 500 mW Operating temp. T OPR -40 to 110 ⬚C Storage temp. T STG -55 to 150 ⬚C Power Dissipation and 1) Maximum allowable Power Dissipation, PD, is shown plotted against Ambient Temperature, TA, in the accompanying Power Derating Curve, indicating the Safe Operating Area for the device. PPhLo = IOH x (VCC - VOH) 2) Power consumed by the device, PT, can be calculated from the equation: where IOH is the application Ph1Lo and Ph2Lo output currents and Vcc is the application device Supply Voltage and VOH is the minimum High Level Output Voltage for the Ph1Lo and Ph2Lo outputs given in the Electrical Characteristics PT = PQ + PPhHi + PPhLo where PPhLo is power generated due to either one of the phase outputs Ph1Lo or Ph2Lo being active, given by: PQ is power dissipated under quiescent current conditions, given by: PQ = Vcc x Icc where Vcc is the application device Supply Voltage and Icc is the maximum Supply Current given in the Electrical Characteristics and PPhHi is power generated due to either one of the phase outputs Ph1Hi or Ph2Hi being active, given by: PPhHi = IOL x VOL where IOL is the application Ph1Hi and Ph2Hi output currents and VOL is the maximum Low Level Output Voltage for the Ph1Hi and Ph2Hi outputs given in the Electrical Characteristics ISSUE 6 - MAY 2007 SEMICONDUCTORS 2 ZXBM1004 ELECTRICAL CHARACTERISTICS (at Tamb = 25°C & VCC = 12V) MIN. PARAMETER SYMBOL Supply voltage V CC Supply current I CC Hall amp input voltage V IN 40 Hall amp common mode voltage V CM 0.5 Hall amp input offset V OFS Hall amp bias current I BS Ph1Lo, Ph2Lo output high voltage V OH Ph1Lo, Ph2Lo output low voltage Ph1Lo, Ph2Lo output low voltage TYP. MAX. 18 V 6 8.5 mA No load (1) mV diff p-p 4.7 VCC-1.5 ⫾7 400 VCC-2.2 UNIT CONDITIONS V mV 650 V CC -1.8 nA V OLA 0.4 0.6 V V I OH =80mA I OL =16mA (2) V OLB 0.4 0.6 V I OL =50A (3) Ph1Lo, Ph2Lo output source current I OH -80 mA Ph1Lo, Ph2Lo output sink current I OL 16 mA Ph1Hi, Ph2Hi output low voltage V OL 0.7 V Ph1Hi, Ph2Hi output sink current I OL 100 mA C PWM charge current I PWMC -6.2 -7.6 -9 A C PWM discharge current I PWMD 65 80 95 A C PWM high threshold voltage V THH 2.95 3 3.15 V V THL 0.94 1 1.11 V 2.925 3.0 3.14 V C PWM low threshold voltage 0.5 24 kHz PWM frequency F PWM ThRef voltage V ThRef ThRef output current I OThRef -0.2 -1 mA S MIN input current I ISMIN -0.25 -0.5 A SPD voltage minimum V SPDL 1 SPD voltage maximum V SPDH SPD input current I ISPD C LCK charge current I LCKC C LCK discharge current I LCKD 0.2 C LCK high threshold voltage V THH 3 V C LCK low threshold voltage V THL 1 V 3 -0.8 -2 FG & RD low level output voltage C PWM =0.1nF I OThRef =-100A Vin = 2V V 100% PWM drive V 0% PWM drive A Vin = 2V A -3 0.35 A 1:12 Lock condition On:Off ratio FG & RD output current -2 I OL =100mA I OL 5 mA V OL 0.5 V I OI =5mA Notes: (1) Measured with pins H+, H-, CLCK and CPWM = 0V and all other signal pins open circuit. (2) Measured when opposing phase output is low. (3) Measured when opposing phase output is high. ISSUE 6 - MAY 2007 3 SEMICONDUCTORS ZXBM1004 Block diagram Pin assignments Vcc V+OP 1 H+ H- Ph1Lo ZXBM1004 ThRef SPD Ph2Lo Ph2Hi QSOP16 Ph1Hi SMIN FG C PWM RD C LCK Gnd ISSUE 6 - MAY 2007 SEMICONDUCTORS 4 ZXBM1004 PIN FUNCTIONAL DESCRIPTION If required this pin can also be used as an enable pin. The application of a voltage >3.0V will force the PWM drive fully off, in effect disabling the drive. H+ - Hall input H- - Hall input The rotor position is detected by a Hall sensor, with the output applied to the H+ and H- pins. This sensor can be either a 4 pin 'naked' Hall device or of the 3 pin buffered switching type. For a 4 pin device the differential Hall output signal is connected to the H+ and H- pins. For a buffered Hall sensor the Hall device output is attached to the H+ pin, with a pull-up attached if needed, whilst the H- pin has an external potential divider attached to hold the pin at half Vcc. When H+ is high in relation to H-, Ph2 is the active drive. SMIN - Sets Minimum Speed A voltage can be set on this pin via a potential divider between the ThRef and Gnd. This voltage is monitored by the SPD pin such that it cannot rise above it. As a higher voltage on the SPD pin represents a lower speed it therefore restricts the lower speed range of the fan. If this feature is not required the pin is left tied to ThRef so no minimum speed will be set. If the fan is being controlled from an external voltage source onto the SPD pin then either this feature should not be used or if it is required then a >1k⍀ resistor should be placed in series with the SPD pin. ThRef - Network Reference This is a reference voltage of nominal 3V. It is designed for the ability to 'source' and therefore it will not 'sink' any current from a higher voltage. CPWM - Sets PWM Frequency The total current drawn from the pin by the minimum speed potential divider to pin SMIN and any voltage setting network should not exceed 1mA at maximum temperature. This pin has an external capacitor attached to set the PWM frequency for the Phase drive outputs. A capacitor value of 0.1nF will provide a PWM frequency of typically 24kHz. SPD - Speed Control Input The CPWM timing period (TPWM) is determined by the following equation: The voltage applied to the SPD pin provides control over the Fan Motor speed by varying the Pulse Width Modulated (PWM) drive ratio at the Ph1Lo and Ph2Lo outputs. The control signal takes the form of a voltage input of range 3V to 1V, representing 0% to 100% drive respectively. TPWM = (V THH − V THL ) x C (V − V THL ) x C + THH I PWMC I PWMD Where: If variable speed control is not required this pin can be left with an external potential divider to set a fixed speed or tied to ground to provide full speed i.e. 100% PWM drive. C = CPWM +15, in pF V T H H and V T H L are the C P W M pin threshold voltages IPWMC and IPWMD are the charge and discharge currents in A. TPWM is in ms ISSUE 6 - MAY 2007 5 SEMICONDUCTORS ZXBM1004 Ph1Lo & Ph2Lo - Low-side External H-bridge Driver As these threshold voltages are nominally set to VTHH = 3V and VTHL = 1V the equations can be simplified as follows: TPWM = This pair of outputs drive the Low side of the external high power H-bridge devices which in turn drives the single phase winding. These outputs provide both the commutation and PWM waveforms. The outputs are of the Darlington emitter follower type with an active pull-down to help faster switch off when using bipolar devices. When in the high state the outputs will provide up to 80mA of drive into the base or gates of external transistors as shown in the Typical Application circuit following. 2C 2C + I PWMC I PWMD CLCK - Locked rotor timing capacitor Should the fan stop rotating for any reason, i.e. an obstruction in the fan blade or a seized bearing, then the device will enter a Rotor Locked condition. In this condition after a predetermined time (TLOCK) the RD pin will go high and the Phase outputs will be disabled. After a further delay (TOFF) the controller will re-enable the Phase drive for a defined period (TON) in an attempt to re-start the fan. This cycle of (TOFF) and (TON) will be repeated indefinitely or until the fan re-starts. When in the low state the active Phase drive is capable of sinking up to 16mA when driving low to aid turn off times during PWM operation. When the Phase is inactive the output is held low by an internal pull-down resistor. Ph1Hi & Ph2Hi - High-side External H-bridge Driver GND - Ground These are the High side outputs to the external H-bridge and are open collector outputs capable of sinking 100mA. This signal provides commutation only to the H-bridge. This is the device supply ground return pin and will generally be the most negative supply pin to the fan. RD - Locked Rotor error output This pin is the Locked Rotor output as referred to in the CLCK timing section above. It is high when the rotor is stopped and low when it is running. V+OP - Phase Outputs Supply Voltage This pin is the supply to the Phase outputs and will be connected differently dependant upon external transistor type. This is an open collector drive giving an active pull down with the high level being provided by an external pull up resistor. For bipolar devices this pin will be connected by a resistor to the VCC pin. The resistor is used to control the current into the transistor base so its value is chosen accordingly. FG - Frequency Generator (speed) output For MOSFET devices the pin will connect directly to the VCC pin. This is the Frequency Generator output and is a buffered signal from the Hall sensor. This is an open collector drive giving an active pull down with the high level being provided by an external pull up resistor. ISSUE 6 - MAY 2007 SEMICONDUCTORS 6 ZXBM1004 VCC - Applied Voltage This is the device internal circuitry supply voltage. For 5V to 12V fans this can be supplied directly from the Fan Motor supply. For fans likely to run in excess of the 18V maximum rating for the device this will be supplied from an external regulator such as a Zener diode. RD Timing Waveform: Hall VTHH C LCK VTHL T Lock T Off TOn RD FG Applications Information The ZXBM1004 is primarily controlled by a voltage on the SPD pin. A voltage of 1V represents a 100% PWM at the Phase Outputs and in turn represents full speed. 3V on the SPD pin conversely represents 0% PWM. The motor can therefore be controlled simply by applying a control voltage onto the SPD pin with the minimal use of external components. A common form of control of fans is by a PWM signal derived from a central processor or controller. This signal can be converted into a voltage and that voltage adjusted as neccesary to compensate for motor none linearity, inclusion of the Minimum speed feature etc. Full applications details and further examples of how to control the ZXBM1004 are available in the Applications Notes AN41, AN42 and AN43. This voltage control method easily lends itself to control by other signal types. For example if a thermistor is applied to the SPD pin a varying voltage can be generated at the SPD pin as the resistance of the thermistor varies with temperature. ISSUE 6 - MAY 2007 7 SEMICONDUCTORS ZXBM1004 Figure 1: Typical circuit for thermistor controlled speed Figure 2: Typical circuit for external PWM controlled speed ISSUE 6 - MAY 2007 SEMICONDUCTORS 8 ZXBM1004 Figure 3: Typical circuit for 48V input and external PWM control Figure 4: Typical circuit for constant speed operation ISSUE 6 - MAY 2007 9 SEMICONDUCTORS ZXBM1004 Drive transisitors Zetex offers a range of devices that are ideally suited to interface between the ZXBM1004 controller and the motor. The following tables show a selection of products ranging from single packaged H-bridge devices to individual power components that can be used in this application. If your needs are not covered by this selection then please refer to the the more comprehensive listings that can be found on the Zetex website: www.zetex.com Description MOSFET H-Bridge Part Number ZXMHC6A07T8 ZXMHC3A01T8 N+P channel MOSFET ID IDM 2xN V 60 A 1.8 2xP -60 -1.5 A 8.7 -7.5 2xN 30 3.1 14.5 120 2xP -30 -2.3 -10.8 210 max. m 300 Package SM-8 425 SM-8 60 4.7 22 55 P -60 -3.5 -18 105 N 30 35 -30 6.4 -5.4 30 P -25 48 ZXMN10A09K N 100 7.7 27 85 ZXMN6A09K ZXMN3A04K N 60 11.2 40 45 N 30 18.4 66 20 Content BVCEO IC ICM VCE(sat) at IC=2A V A A max. mV Description Part Number High side switch Bipolar BVDSS N ZXMC4559DN8 ZXMC3A16DN8 Low side switch MOSFET RDS(on) @ VGS=10V Content ZXT953K PNP -100 -5 -10 -175 ZXT951K PNP -60 -6 -15 -165 ZXT790AK PNP -40 -3 -6 -450 SO8 SO8 DPAK Package DPAK ISSUE 6 - MAY 2007 SEMICONDUCTORS 10 ZXBM1004 Definitions Product change Zetex Semiconductors reserves the right to alter, without notice, specifications, design, price or conditions of supply of any product or service. Customers are solely responsible for obtaining the latest relevant information before placing orders. Applications disclaimer The circuits in this design/application note are offered as design ideas. It is the responsibility of the user to ensure that the circuit is fit for the user's application and meets with the user's requirements. No representation or warranty is given and no liability whatsoever is assumed by Zetex with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Zetex does not assume any legal responsibility or will not be held legally liable (whether in contract, tort (including negligence), breach of statutory duty, restriction or otherwise) for any damages, loss of profit, business, contract, opportunity or consequential loss in the use of these circuit applications, under any circumstances. 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Samples may be available "Active"Product status recommended for new designs "Last time buy (LTB)"Device will be discontinued and last time buy period and delivery is in effect "Not recommended for new designs"Device is still in production to support existing designs and production "Obsolete"Production has been discontinued Datasheet status key: "Draft version"This term denotes a very early datasheet version and contains highly provisional information, which may change in any manner without notice. "Provisional version"This term denotes a pre-release datasheet. It provides a clear indication of anticipated performance. However, changes to the test conditions and specifications may occur, at any time and without notice. "Issue"This term denotes an issued datasheet containing finalized specifications. However, changes to specifications may occur, at any time and without notice. ISSUE 6 - MAY 2007 11 SEMICONDUCTORS ZXBM1004 PACKAGE OUTLINE QSOP16 PACKAGE DIMENSIONS Dim Millimeters Inches Min. Max. Min. Max. A 0.053 0.069 1.35 1.75 A1 0.004 0.010 0.10 0.25 A2 0.049 0.059 1.25 1.50 D 0.189 0.197 4.80 5.00 0.009 Ref ZD 0.23 BSC E 0.228 0.244 5.79 6.20 E1 0.150 0.157 3.81 3.99 L 0.016 0.050 0.41 1.27 e 0.025 BSC 0.64 BSC b 0.008 0.012 0.20 0.30 c 0.007 0.010 0.18 0.25 θ 0° 8° 0° 8° Note: Dimensions in inches are control dimensions, dimensions in millimeters are approximate. © Zetex Semiconductors plc 2007 Europe Americas Asia Pacific Corporate Headquarters Zetex GmbH Kustermann-Park Balanstraße 59 D-81541 München Germany Telefon: (49) 89 45 49 49 0 Fax: (49) 89 45 49 49 49 [email protected] Zetex Inc 700 Veterans Memorial Hwy Hauppauge, NY 11788 USA Zetex (Asia) Ltd 3701-04 Metroplaza Tower 1 Hing Fong Road, Kwai Fong Hong Kong Zetex Semiconductors plc Zetex Technology Park Chadderton, Oldham, OL9 9LL United Kingdom Telephone: (1) 631 360 2222 Fax: (1) 631 360 8222 [email protected] Telephone: (852) 26100 611 Fax: (852) 24250 494 [email protected] Telephone (44) 161 622 4444 Fax: (44) 161 622 4446 [email protected] ISSUE 6 - MAY 2007 SEMICONDUCTORS 12