SM843256 10 Gigabit Ethernet and SONET, 6 output, Ultra-Low Jitter LVPECL Frequency Synthesizer General Description Features The SM843256 provides a low-noise timing solution for high speed, high accuracy synthesis of clock signals. Common applications include SONET, Gigabit Ethernet, 10 Gigabit Ethernet, and similar networking standards. It includes a unique power reduction methodology, along with a patented RotaryWaveTM architecture that provides a very stable clock with very low noise. Power supplies of either 3.3V or 2.5V are supported, with superior jitter and phase noise performance. The device synthesizes different low noise LVPECL output frequencies such as 125MHz, 156.25MHz, 312.5MHz, and 625MHz for Ethernet applications; 77.76MHz, 155.52MHz, 311.04MHz, and 622.08MHz for SONET applications. The crystal reference frequencies used include 25MHz and 19.44Mhz for Ethernet and SONET applications, respectively. The SM843256 is an excellent replacement for IDT Femtoclocks, with improved accuracy, power consumption, waveform integrity, and jitter. Data sheets and support documentation can be found on Micrel’s web site at: www.micrel.com. • Generates six LVPECL outputs • 2.5V or 3.3V operating range • Typical phase jitter @ 156.25MHz (1.875MHz to 20MHz): 80fs (typical) @ 3.3V • 75MHz to 625MHz output frequencies • Industrial temperature range • Green, RoHS, and PFOS compliant • Available in 24-pin TSSOP EPAD • Operating supply modes: Core/Output 3.3V/3.3V, 3.3V/2.5V, 2.5V/2.5V Applications • • • • SONET Gigabit Ethernet 10-Gigabit Ethernet Infiniband ________________________________________________________________________________________________________________________ Block Diagram RotaryWave is a trademark of Multigig, Inc. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com July 2010 M9999-072110-B Micrel, Inc. SM843256 Ordering Information(1, 2) Part Number Marking Shipping Junction Temperature Range Package SM843256KA 843256 Tube, Tape & Reel –40° to +85°C 24-Pin TSSOP EPAD Notes: 1. Devices are Green, RoHS, and PFOS Compliant. 2. Lead finish is 100% matte tin. Pin Configuration 24-Pin TSSOP EPAD (Top View) July 2010 2 M9999-072110-B Micrel, Inc. SM843256 Pin Description Pin Number Pin Name Pin Type Pin Level Pin Function 1, 2 VDDO PWR 3, 4 /Q2, Q2 O, (DIF) LVPECL Differential Clock Output 5, 6 /Q1, Q1 O, (DIF) LVPECL Differential Clock Output 7, 8 /Q0, Q0 O, (DIF) LVPECL Differential Clock Output 9 PLL_BYPASS I, (SE) LVCMOS 2.5V or 3.3V Power Supply Pull-Up 45k, Single-Ended Input Select Pin. Logic (0) = PLL Output Logic (1) = Xtal Reference 10 VDDA PWR Analog 3.3V or 2.5V Power Supply 11 VDD PWR 3.3V or 2.5V Power Supply 12 FB_SEL I, (SE) LVCMOS Pull-Down 45k, Single-Ended Input Select Pin 13 XTAL_IN I, (SE) 12pF crystal Crystal Reference Input, no load caps needed. 14 XTAL_OUT O, (SE) 12pF crystal 15 N_SEL0 I, (SE) LVCMOS 16, 17 GND PWR Crystal Reference Output, no load caps needed. Pull-Up 45k, Single-Ended Input Select Pin Ground 18 N_SEL1 I, (SE) LVCMOS Pull-Up 45k, Single-Ended Input Select Pin 19, 20 /Q5, Q5 O, (DIF) LVPECL Differential Clock Output 21, 22 /Q4, Q4 O, (DIF) LVPECL Differential Clock Output 23, 24 /Q3, Q3 O, (DIF) LVPECL Differential Clock Output Input and Output Frequency Table XTAL (MHz) FB_SEL N_SEL1 N_SEL0 Outputs (MHz) 24 0 0 0 600 Application - 24 0 0 1 300 - 24 0 1 0 150 SAS/SATA 24 0 1 1 120 - 25 0 0 0 625 10 Gigabit Ethernet 25 0 0 1 312.50 10 Gigabit Ethernet 25 0 1 0 156.25 10 Gigabit Ethernet 25 0 1 1 125 Gigabit Ethernet/Infiniband/PCI/PCI-E/PCI-X 18.75 1 0 0 600 - 18.75 1 0 1 300 - 18.75 1 1 0 150 SAS/SATA 18.75 1 1 1 75 SAS/SATA 19.44 1 0 0 622.08 10 Gigabit Ethernet/SONET 19.44 1 0 1 311.04 SONET 19.44 1 1 0 155.52 SONET 19.44 1 1 1 77.76 SONET 19.53125 1 0 0 625 10 Gigabit Ethernet 19.53125 1 0 1 312.5 10 Gigabit Ethernet 19.53125 1 1 0 156.25 10 Gigabit Ethernet 19.53125 1 1 1 78.125 10 Gigabit Ethernet July 2010 3 M9999-072110-B Micrel, Inc. SM843256 Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VDDA, VDD, VDDO)................................+4.6V Input Voltage (VIN)………………………-0.50V to VDD+0.5V LVPECL Output Current ( IOUT) Continuous……………………………………………….50mA Surge…………………………………………………….100mA Lead Temperature (soldering, 20sec.)....................... 260°C Case Temperature ..................................................... 115°C Storage Temperature (Ts) ..........................-65°C to +150°C Supply Voltage (VDDO) .......................... +2.375V to +3.465V Supply Voltage (VDD, VDDA) ................... +2.375V to +3.465V Ambient Temperature (TA) .......................... –40°C to +85°C (3) Junction Thermal Resistance TSSOP (θJA)(Still Air).........................................32°C/W DC Electrical Characteristics(4) VDDA = VDD = 3.3V ±5% or 2.5V ±5%, VDDO = 2.5V ±5%, TA = –40°C to +85°C, unless noted. Symbol Parameter VDDO Min Typ Max Units 2.5V Operating Voltage 2.375 2.5 2.625 V VDDA,VDD 3.3V Operating Voltage 2.375 3.3 3.465 V IDDA Analog Supply Range FOUT = 156.25MHz 55 65 mA FOUT = 625.00MHz 56 FOUT = 156.25MHz 13 17 mA FOUT = 625.00MHz 13 FOUT = 156.25MHz 235 TBD mA FOUT = 625.00MHz 330 IDD IDDO Core Supply Current I/O Supply Range Condition VDDA = VDD = VDDO = 3.3V ±5%, TA = –40°C to +85°C, unless noted. Symbol Parameter VDDA, VDD, VDDO 3.3V Operating Voltage IDDA Analog Supply Range IDD IDDO Core Supply Current I/O Supply Range Condition Min Typ Max Units 3.135 3.3 3.465 V FOUT = 156.25MHz 55 65 mA FOUT = 625.00MHz 56 FOUT = 156.25MHz 13 17 mA FOUT = 625.00MHz 13 FOUT = 156.25MHz 256 282 mA FOUT = 625.00MHz 366 Notes: 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. 4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. July 2010 4 M9999-072110-B Micrel, Inc. SM843256 LVPECL DC Electrical Characteristics(5, 6) VDDA = VDD = 3.3V ±5% or 2.5V ±5%, VDDO = 2.5V or 3.3V ±5%, TA = –40°C to +85°C, unless noted. Symbol Parameter Condition Min Typ Max Units VOH Output High Voltage 50Ω to VDDO-2V VDDO –1.145 VDDO –0.97 VDDO –0.845 V VOL Output Low Voltage 50Ω to VDDO-2V VDDO –1.945 VDDO –1.77 VDDO –1.645 V VSWING Peak-to-Peak Output Voltage Swing Figure 1 0.6 0.8 1.0 V LVCMOS DC Electrical Characteristics(6) VDDA = VDD = 3.3V ±5% or 2.5V ±5%, VDDO = 2.5V or 3.3V ±5%, TA = –40°C to +85°C, unless noted. Symbol Parameter VIH Input High Voltage VIL Input Low Voltage IIH Input High Current (FB_SEL) IIH Condition Min Typ Max Units 2 VDD +0.3 V -0.3 0.8 V VDD = VIN = 3.465V 150 μA Input High Current (PLL_BYPASS), (N_SEL0), (NSEL1) VDD = VIN = 3.465V 5 μA IIL Input Low Current (FB_SEL) VDD = 3.465V, VIN = 0V -5 μA IIL Input Low Current (PLL_BYPASS), (N_SEL0), (NSEL1) VDD = 3.465V, VIN = 0V -150 μA AC Electrical Characteristics(7) VDDA = VDD = 3.3V ±5% or 2.5V ±5%, VDDO = 2.5V or 3.3V ±5%, TA = –40°C to +85°C, unless noted. Symbol Parameter Condition FOUT Output Frequency Refer to Frequency Table 75 TR/TF LVPECL Output Rise/Fall Time 20% – 80% 100 ODC Output Duty Cycle 46 TSKEW Output-to-Output Skew TLOCK PLL Lock Time Tjit(∅) RMS Phase Jitter (Output = 156.25 MHz) Min Typ Max Units 625 MHz 175 350 ps 50 54 % 45 ps 20 ms Note 8 Integration Range (12kHz – 20MHz) 251 fs Integration Range (1.875MHz – 20MHz) 80 fs Notes: 5. See Figure 4 for load test circuit example. 6. The circuit is designed to meet the DC specifications shown in the above table(s) after thermal equilibrium has been established. 7. The circuit is designed to meet the AC specifications shown in the above table(s) after thermal equilibrium has been established. 8. Defined as skew between outputs at the same supply voltage and with equal load conditions; Measured at the output differential crossing points. July 2010 5 M9999-072110-B Micrel, Inc. SM843256 RMS Phase Jitter (Random) 1.875MHz to 20MHz = 80fs (Typical) Noise Power dBc/Hz Offset Frequency (Hz) Phase Noise Plot: 156.25MHz @ 3.3V Figure 1. Duty Cycle Timing Figure 2. All Outputs Rise/Fall Time July 2010 6 M9999-072110-B Micrel, Inc. SM843256 Figure 3. RMS Phase Noise/Jitter Figure 4. LVPECL Output Load and Test Circuit Figure 5. Crystal Input Interface July 2010 7 M9999-072110-B Micrel, Inc. SM843256 Package Information 24-pin EPAD TSSOP MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. July 2010 8 © 2010 Micrel, Incorporated. M9999-072110-B