LT3060 45V VIN , Micropower, Low Noise, 100mA Low Dropout, Linear Regulator DESCRIPTION FEATURES n n n n n n n n n n n n n Input Voltage Range: 1.6V to 45V Output Current: 100mA Quiescent Current: 40μA Dropout Voltage: 300mV Low Noise: 30μVRMS (10Hz to 100kHz) Adjustable Output: VREF = 600mV Output Tolerance: ±2% Over Line, Load and Temperature Single Capacitor Soft-Starts Reference and Lowers Output Noise Shutdown Current: < 1μA Reverse Battery Protection Current Limit Foldback Protection Thermal Limit Protection 8-Lead 2mm × 2mm × 0.75mm DFN and 8-Lead ThinSOT ™ Packages n n n n The LT3060 optimizes stability and transient response with low ESR, ceramic output capacitors. The regulator does not require the addition of ESR as is common with other regulators. The LT3060 typically provides 0.1% line regulation and 0.03% load regulation. Internal protection circuitry includes reverse-battery protection, reverse-output protection, reverse-current protection, current limit with foldback and thermal shutdown. The LT3060 is an adjustable voltage regulator with an output voltage range from the 600mV reference to 44.5V. The LT3060 is offered in the thermally enhanced 8-lead TSOT-23 and 8-lead (2mm × 2mm × 0.75mm) DFN packages. APPLICATIONS n The LT®3060 is a micropower, low dropout voltage (LDO) linear regulator that operates over a 1.6V to 45V input supply range. The device supplies 100mA of output current with a typical dropout voltage of 300mV. A single external capacitor provides programmable low noise reference performance and output soft-start functionality. The LT3060’s quiescent current is merely 40μA and provides fast transient response with a minimum 2.2μF output capacitor. In shutdown, quiescent current is less than 1μA and the reference soft-start capacitor is reset. Battery-Powered Systems Automotive Power Supplies Industrial Power Supplies Avionic Power Supplies Portable Instruments L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. ThinSOT is a Trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION Dropout Voltage 350 1.8V Low Noise Regulator VIN 2.3V TO 45V 1μF VOUT 1.8V AT 100mA 30μVRMS NOISE OUT 249k 1% LT3060 SHDN CFF 10nF 10μF ADJ GND REF/BYP 124k 1% 10nF DROPOUT VOLTAGE (mV) IN TJ = 25°C 300 250 200 150 100 50 3060 TA01 0 0 10 20 30 40 50 60 70 80 90 100 OUTPUT CURRENT (mA) 3060 TA02 3060f 1 LT3060 ABSOLUTE MAXIMUM RATINGS (Note 1) IN Pin Voltage ........................................................ ±50V OUT Pin Voltage ..................................................... ±50V Input-to-Output Differential Voltage (Note 2) ......... ±50V ADJ Pin Voltage ..................................................... ±50V SHDN Pin Voltage .................................................. ±50V REF/BYP Pin Voltage ....................................... – 0.3V, 1V Output Short-Circuit Duration .......................... Indefinite Operating Junction Temperature (Notes 3, 5, 13) LT3060E, LT3060I ..............................– 40°C to 125°C LT3060MPTS8.................................... –55°C to 125°C LT3060HTS8 ...................................... –40°C to 150°C Storage Temperature Range...................– 65°C to 150°C Lead Temperature (TS8 Soldering, 10 sec) ........... 300°C PIN CONFIGURATION TOP VIEW ADJ 2 OUT 3 TOP VIEW 8 GND REF/BYP 1 9 GND OUT 4 SHDN 1 GND 2 GND 3 GND 4 7 SHDN 6 IN 5 IN 8 REF/BYP 7 ADJ 6 OUT 5 IN TS8 PACKAGE 8-LEAD PLASTIC TSOT-23 DC PACKAGE 8-LEAD (2mm s 2mm) PLASTIC DFN TJMAX = 125°C, θJA = 48°C/W TO 60°C/W*, θJC = 20°C/W EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB TJMAX = 150°C, θJA = 57°C/W TO 67°C/W*, θJC = 25°C/W * SEE APPLICATIONS INFORMATION SECTION ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3060EDC#PBF LT3060EDC#TRPBF LDTD 8-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LT3060IDC#PBF LT3060IDC#TRPBF LDTD 8-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LT3060ETS8#PBF LT3060ETS8#TRPBF LTDTF 8-Lead Plastic ThinSOT –40°C to 125°C LT3060ITS8#PBF LT3060ITS8#TRPBF LTDTF 8-Lead Plastic ThinSOT –40°C to 125°C LT3060MPTS8#PBF LT3060MPTS8#TRPBF LTDTF 8-Lead Plastic ThinSOT –55°C to 125°C LT3060HTS8#PBF LT3060HTS8#TRPBF LTDTF 8-Lead Plastic ThinSOT –40°C to 150°C LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3060EDC LT3060EDC#TR LDTD 8-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LT3060IDC LT3060IDC#TR LDTD 8-Lead (2mm × 2mm) Plastic DFN –40°C to 125°C LT3060ETS8 LT3060ETS8#TR LTDTF 8-Lead Plastic ThinSOT –40°C to 125°C LT3060ITS8 LT3060ITS8#TR LTDTF 8-Lead Plastic ThinSOT –40°C to 125°C LT3060MPTS8 LT3060MPTS8#TR LTDTF 8-Lead Plastic ThinSOT –55°C to 125°C LT3060HTS8 LT3060HTS8#TR LTDTF 8-Lead Plastic ThinSOT –40°C to 150°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 3060f 2 LT3060 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) PARAMETER Minimum Input Voltage (Notes 4, 12) ADJ Pin Voltage (Notes 4, 5) CONDITIONS ILOAD = 100mA VIN = 2.1V, ILOAD = 1mA 2.1V < VIN < 45V, 1mA < ILOAD < 100mA (E, I, MP Grade) 2.1V < VIN < 45V, 1mA < ILOAD < 100mA (H Grade) Line Regulation (Note 4) ΔVIN = 2.1V to 45V, ILOAD = 1mA (E, I, MP Grade) VIN = 2.1V, ILOAD = 1mA to 100mA VIN = 2.1V, ILOAD = 1mA to 100mA (H Grade) ILOAD = 1mA ILOAD = 1mA ILOAD = 10mA ILOAD = 10mA ILOAD = 50mA (Note 14) ILOAD = 50mA (Note 14) ILOAD = 100mA (Note 14) ILOAD = 100mA (Note 14) ILOAD = 0μA ILOAD = 1mA ILOAD = 10mA ILOAD = 50mA ILOAD = 100mA VIN = 45V, VSHDN = 0V VIN = 2.1V COUT = 10μF, ILOAD = 100mA, CBYP = 0.01μF VOUT = 600mV, BW = 10Hz to 100kHz VOUT = Off to On VOUT = On to Off VSHDN = 0V VSHDN = 45V VIN – VOUT = 1.5V (AVG), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 100mA VIN = 7V, VOUT = 0 VIN = VOUT(NOMINAL) + 1V (Notes 6, 12), ΔVOUT = –5% VIN = –45V, VOUT = 0 VOUT = 1.2V, VIN = 0 Load Regulation (Note 4) Dropout Voltage VIN = VOUT(NOMINAL) (Notes 6, 7) GND Pin Current VIN = VOUT(NOMINAL) + 0.55V (Notes 6, 8) Quiescent Current in Shutdown ADJ Pin Bias Current (Notes 4, 9) Output Voltage Noise Shutdown Threshold SHDN Pin Current (Note 10) Ripple Rejection (Note 4) Current Limit Input Reverse Leakage Current Reverse Output Current (Note 11) MIN l l l 594 588 585 TYP 1.6 600 l 0.6 l l 0.2 75 l 150 l 240 l 300 l l l l l l 40 60 160 0.8 2 0.3 15 30 l l l 0.3 0.8 0.7 65 0.9 85 l l l MAX 2.1 606 612 612 3.5 UNITS V mV mV mV mV 4 9 110 180 200 300 280 410 350 510 80 100 350 1.8 4 1 60 mV mV mV mV mV mV mV mV mV mV μA μA μA mA mA μA nA μVRMS 1.5 1 3 200 110 l 0.2 300 10 V V μA μA dB mA mA μA μA 3060f 3 LT3060 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Absolute maximum input-to-output differential voltage is not achievable with all combinations of rated IN pin and OUT pin voltages. With the IN pin at 50V, the OUT pin may not be pulled below 0V. The total measured voltage from IN to OUT must not exceed ±50V. Note 3: The LT3060 is tested and specified under pulse load conditions such that TJ ≅ TA . The LT3060E regulator is 100% tested at TA = 25°C. Performance at –40°C to 125°C is assured by design, characterization and correlation with statistical process controls. The LT3060I regulator is guaranteed over the full –40°C to 125°C operating junction temperature range. The LT3060MP is 100% tested over the –55°C to 125°C operating junction temperature range. The LT3060H is 100% tested over the –40°C to 150°C operating junction temperature range. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125°C. Note 4: The LT3060 is tested and specified for these conditions with the ADJ connected to the OUT pin. Note 5: Maximum junction temperature limits operating conditions. The regulated output voltage specification does not apply for all possible combinations of input voltage and output current. Limit the output current range if operating at the maximum input-to-output voltage differential. Limit the input-to-output voltage differential if operating at maximum output current. Current limit foldback will limit the maximum output current as a function of input-to-output voltage. See Current Limit vs VIN – VOUT in the Typical Performance Characteristics section. Note 6: To satisfy minimum input voltage requirements, the LT3060 is tested and specified for these conditions with an external resistor divider (bottom 115k, top 365k) for an output voltage of 2.5V. The external resistor divider adds 5μA of DC load on the output. The external current is not factored into GND pin current. Note 7: Dropout voltage is the minimum input-to-output voltage differential needed to maintain regulation at a specified output current. In dropout, the output voltage equals: (VIN – VDROPOUT). For some output voltages, minimum input voltage requirements limit dropout voltage. Note 8: GND pin current is tested with VIN = V(OUT(NOMINAL) + 0.5V and a current source load. GND pin current will increase in dropout. See GND pin current curves in the Typical Performance Characteristics section. Note 9: ADJ pin bias current flows out of the ADJ pin. Note 10: SHDN pin current flows into the SHDN pin. Note 11: Reverse output current is tested with the IN pin grounded and the OUT pin forced to the rated output voltage. This current flows into the OUT pin and out of the GND pin. Note 12: To satisfy requirements for minimum input voltage, current limit is tested at VIN = VOUT(NOMINAL) + 1V or VIN = 2.1V, whichever is greater. Note 13: This IC includes overtemperature protection that protects the device during momentary overload conditions. Junction temperature will exceed 125°C (LT3060E, LT3060I, LT3060MP) or 150°C (LT3060H) when overtemperature circuitry is active. Continuous operation above the specified maximum junction temperature may impair device reliability. Note 14: The dropout voltage specification is guaranteed for the DFN package. The dropout voltage specification for high output currents cannot be guaranteed for the TS8 package due to production test limitations. 3060f 4 LT3060 TYPICAL PERFORMANCE CHARACTERISTICS Typical Dropout Voltage 400 TJ = 125°C 300 250 TJ = 25°C 150 100 50 = TEST POINTS 500 500 450 350 300 TJ ≤ 25°C 250 200 150 0 Quiescent Current 2.5V Quiescent Current 60 0.606 30 20 200 0.604 0.602 0.600 0.598 0.596 0.594 0.592 10 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 100 75 VSHDN = VIN 50 0 2.50 TJ = 25°C RL = 120k VOUT = 0.6V VSHDN = VIN 30 20 2.00 1.75 1.50 1.25 1.00 RL = 50Ω IL = 50mA* 0.75 RL = 2.5k IL = 1mA* 0.25 2.00 1.75 5 10 15 20 25 30 35 INPUT VOLTAGE (V) 40 45 3060 G07 45 RL = 6Ω IL = 100mA* 1.50 1.25 1.00 RL = 12Ω IL = 50mA* 0.75 0.50 RL = 250Ω IL = 10mA* RL = 600Ω IL = 1mA* 0.25 RL = 60Ω IL = 10mA* 0 0 0 40 TJ = 25°C *FOR VOUT = 0.6V VSHDN = VIN 2.25 VSHDN = 0 0 15 20 25 30 35 INPUT VOLTAGE (V) 0.6V GND Pin Current RL = 25Ω IL = 100mA* 0.50 10 10 2.50 TJ = 25°C *FOR VOUT = 2.5V VSHDN = VIN 2.25 GND PIN CURRENT (mA) 50 5 3060 G06 2.5V GND Pin Current 60 VSHDN = 0 3060 G05 Quiescent Current 70 125 0 0.588 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 3060 G04 80 150 25 0.590 VSHDN = 0V TJ = 25°C RL = 500k VOUT = 2.5V 175 QUIESCENT CURRENT (μA) VIN = 6V 70 RL = 120k, IL = 5μA 40 IL = 1mA 3060 G03 ADJ Pin Voltage ADJ PIN VOLTAGE (V) QUIESCENT CURRENT (μA) 150 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 10 20 30 40 50 60 70 80 90 100 OUTPUT CURRENT (mA) 0.612 I = 1mA 0.610 VL = 2.1V IN 0.608 VSHDN = VIN IL = 10mA 200 3060 G02 80 QUIESCENT CURRENT (μA) 250 50 3060 G01 40 300 50 0 IL = 50mA 350 100 10 20 30 40 50 60 70 80 90 100 OUTPUT CURRENT (mA) 50 400 100 0 0 IL = 100mA 450 TJ ≤ 150°C 400 GND PIN CURRENT (mA) DROPOUT VOLTAGE (mV) 450 550 DROPOUT VOLTAGE (mV) GUARANTEED DROPOUT VOLTAGE (mV) 500 200 Dropout Voltage Guaranteed Dropout Voltage 550 550 350 TA = 25°C, unless otherwise noted. 0 1 2 3 4 5 6 7 INPUT VOLTAGE (V) 8 9 10 3060 G08 0 1 2 3 4 5 6 7 INPUT VOLTAGE (V) 8 9 10 3060 G09 3060f 5 LT3060 TYPICAL PERFORMANCE CHARACTERISTICS SHDN PIN THRESHOLD (V) GND PIN CURRENT (mA) 3.0 2.5 2.0 1.5 1.0 0.5 0 10 20 30 40 50 60 70 80 90 100 OUTPUT CURRENT (mA) 1.5 1.4 1.3 1.2 1.1 1.0 0.9 OFF TO ON 0.8 0.7 0.6 ON TO OFF 0.5 0.4 0.3 0.2 0.1 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 3060 G10 1.4 1.2 1.0 0.8 0.6 0.4 0 0 VSHDN = 45V ADJ PIN BIAS CURRENT (nA) 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 250 40 225 30 200 20 10 0 –10 –20 75 25 0 0 75 50 25 VIN = 7V VOUT = 0V 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 3060 G16 10 15 20 25 30 35 40 INPUT/OUTPUT DIFFERENTIAL (V) Reverse Output Current 50 TJ = 25°C 1.8 VIN = 0V CURRENT FLOWS 1.6 INTO OUT PIN 1.4 VOUT = VADJ 45 1.2 1.0 ADJ 0.8 0.6 0.4 0.2 0 5 10 15 20 25 30 35 OUTPUT VOLTAGE (V) 40 45 3060 G17 VIN = 0V VOUT = VADJ = 1.2V 40 35 30 25 20 15 ADJ 10 5 OUT 0 45 3060 G15 REVERSE OUTPUT CURRENT (μA) 100 5 3060 G14 REVERSE OUTPUT CURRENT (mA) 125 TJ = –50°C 100 Reverse Output Current 150 TJ = 25°C 125 50 2.0 175 45 $VOUT = – 5% TJ = 125°C 150 –40 Current Limit vs Temperature 40 175 –30 –50 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 250 200 10 15 20 25 30 35 SHDN PIN VOLTAGE (V) Current Limit vs VIN –VOUT 50 3060 G13 225 5 3060 G12 ADJ Pin Bias Current 0.2 CURRENT LIMIT (mA) 1.6 0.2 CURRENT LIMIT (mA) SHDN PIN INPUT CURRENT (μA) 1.8 1.8 3060 G11 SHDN Pin Input Current 2.0 2.0 SHDN PIN INPUT CURRENT (μA) VIN = VOUT(NOMINAL) + 1V 3.5 0 SHDN Pin Input Current SHDN Pin Threshold GND Pin Current vs ILOAD 4.0 TA = 25°C, unless otherwise noted. OUT 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 3060 G18 3060f 6 LT3060 TYPICAL PERFORMANCE CHARACTERISTICS 5V Input Ripple Rejection 100 100 VOUT = 0.6V 80 VOUT = 5V 60 COUT = 10μF 50 40 30 I = 100mA 20 L CREF/BYP = CFF = 0 10 VIN = VOUT(NOMINAL) + 1.5V + COUT = 2.2μF 50mVRMS RIPPLE 0 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) 70 60 50 40 30 IL = 100mA VOUT = 5V CREF/BYP = CFF = 0 10 COUT = 10μF VIN = 6V + 50mVRMS RIPPLE 0 10 100 1k 10k 100k 1M FREQUENCY (Hz) Minimum Input Voltage IL = 100mA LOAD REGULATION (mV) IL = 50mA 1.2 1.0 0.8 0.6 0.4 2 1 0 –1 –2 VIN = 2.1V –3 VOUT = 0.6V $IL = 1mA TO 100mA –4 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) VSHDN = VIN 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 3060 G22 0.1 CREF/BYP = 10nF 100 CREF/BYP = 1nF 1k 10k FREQUENCY (Hz) 100k 3060 G25 OUTPUT NOISE SPECTRAL DENSITY (μV/√Hz) OUTPUT NOISE SPECTRAL DENSITY (μV/√Hz) CREF/BYP = 100pF VOUT = 0.6V 10 1 VOUT = 5V VOUT = 3.3V VOUT = 2.5V VOUT = 1.8V VOUT = 1.5V VOUT = 1.2V VOUT = 0.6V 0.1 0.01 100 10 COUT = 10μF IL = 100mA 10k 1k FREQUENCY (Hz) RMS Output Noise vs Load Current vs CREF/BYP, CFF = 0 10 110 CFF = 0 1 CFF = 10nF 0.1 0.01 100k 3060 G24 Output Noise Spectral Density vs CFF, CREF/BYP = 10nF 1 0.01 10 3060 G23 Output Noise Spectral Density vs CREF/BYP, CFF = 0 COUT = 10μF IL = 100mA 30 3060 G21 OUTPUT NOISE VOLTAGE (μVRMS) MINIMUM INPUT VOLTAGE (V) 3 VOUT = 5V 40 Output Noise Spectral Density CREF/BYP = 0, CFF = 0 1.8 10 50 Load Regulation 2.0 0.2 60 20 I = 100mA L 10 VOUT = 0.6V VIN = 2.6V + 0.5VP-P RIPPLE AT f = 120Hz 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 10M 4 1.4 70 3060 G20 2.2 1.6 CREF/BYP = 0 80 20 3060 G19 CREF/BYP = 10nF 90 CREF/BYP = 10nF, CFF = 0 80 70 RIPPLE REJECTION (dB) RIPPLE REJECTION (dB) CREF/BYP = CFF = 10nF 90 OUTPUT NOISE SPECTRAL DENSITY (μV/√Hz) 90 Ripple Rejection vs Temperature 100 RIPPLE REJECTION (dB) Input Ripple Rejection TA = 25°C, unless otherwise noted. VOUT = 5V COUT = 10μF IL = 100mA 10 100 CFF = 1nF CFF = 100pF 1k 10k FREQUENCY (Hz) VOUT = 0.6V 100 COUT = 10μF 90 80 CREF/BYP = 10pF 70 60 CREF/BYP = 100pF 50 40 30 CREF/BYP = 1nF 20 CREF/BYP = 10nF 10 100k 3060 G26 CREF/BYP = 0 0 0.01 CREF/BYP = 100nF 0.1 1 10 LOAD CURRENT (mA) 100 3060 G27 3060f 7 LT3060 TYPICAL PERFORMANCE CHARACTERISTICS RMS Output Noise vs Feedforward Capacitor (CFF) 120 110 OUTPUT NOISE VOLTAGE (μVRMS) OUTPUT NOISE VOLTAGE (μVRMS) RMS Output Noise vs Load Current CREF/BYP = 10nF, CFF = 0 170 160 f = 10Hz TO 100kHz VOUT = 5V 150 COUT = 10μF 140 VOUT = 2.5V 130 VOUT = 3.3V 120 VOUT = 1.8V 110 100 VOUT = 1.5V 90 80 70 60 50 40 VOUT = 1.2V 30 20 VOUT = 0.6V 10 0 0.01 0.1 1 10 100 LOAD CURRENT (mA) TA = 25°C, unless otherwise noted. 100 90 VOUT = 5V VOUT = 3.3V VOUT = 2.5V 80 f = 10Hz TO 100kHz CREF/BYP = 10nF COUT = 10μF IFB-DIVIDER = 5μA IL = 100mA 70 60 50 40 30 20 VOUT = 1.8V VOUT = 1.2V VOUT = 0.6V 10 VOUT = 1.5V 0 1n 10n 10p 100p FEEDFORWARD CAPACITOR, CFF (F) 3060 G28 3060 G29 5V 10Hz to 100kHz Output Noise CREF/BYP = 10nF, CFF = 10nF 5V 10Hz to 100kHz Output Noise CREF/BYP = 10nF, CFF = 0 VOUT 100μV/DIV VOUT 100μV/DIV COUT = 10μF IL = 100mA 1ms/DIV 3060 G30 COUT = 10μF IL = 100mA 3060 G31 5V Transient Response CFF = 10nF 5V Transient Response CFF = 0 VOUT 50mV/DIV 1ms/DIV VOUT = 5V VOUT 20mV/DIV VOUT = 5V ΔIOUT = 10mA TO 100mA ΔIOUT = 10mA TO 100mA IOUT 50mA/DIV IOUT 50mA/DIV VIN = 6V 100μs/DIV COUT = CIN = 10μF IFB-DIVIDER = 5μA 3060 G32 VIN = 6V 20μs/DIV COUT = CIN = 10μF IFB-DIVIDER = 5μA 3060 G33 3060f 8 LT3060 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted. SHDN Transient Response CREF/BYP = 0 5V Transient Response Load Dump VOUT 2V/DIV RL = 50Ω VOUT VOUT = 5V 10mV/DIV VIN = 12V TO 45V REF/BYP 500mV/DIV SHDN 1V/DIV VIN 10V/DIV 2ms/DIV COUT = CIN = 2.2μF CREF/BYP = CFF = 10nF IFB-DIVIDER = 5μA 3060 G34 COUT = CIN = 2.2μF CFF = 0 SHDN Transient Response CREF/BYP = 10nF 4ms/DIV 3060 G35 Start-Up Time vs REF/BYP Capacitor 100 START-UP TIME (ms) VOUT 2V/DIV RL = 50Ω REF/BYP 500mV/DIV SHDN 1V/DIV CFF = 0 10 1 0.1 COUT = CIN = 2.2μF CFF = 0 4ms/DIV 3060 G36 0.01 10p 100p 10n 1n REF/BYP CAPACITOR (F) 100n 3060 G37 3060f 9 LT3060 PIN FUNCTIONS (DC8/TS8) REF/BYP (Pin 1 / Pin 8): Reference/Bypass. Connecting a single capacitor from this pin to GND bypasses the LT3060’s reference noise and soft-starts the reference. A 10nF bypass capacitor typically reduces output voltage noise to 30μVRMS in a 10Hz to 100kHz bandwidth. Softstart time is directly proportional to the REF/BYP capacitor value. If the LT3060 is placed in shutdown, REF/BYP is actively pulled low by an internal device to reset soft-start. If low noise or soft-start performance is not required, this pin must be left floating (unconnected). Do not drive this pin with any active circuitry. ADJ (Pin 2 / Pin 7): Adjust. This pin is the error amplifier’s inverting terminal. It’s typical bias current of 15nA flows out of the pin (see curve of ADJ Pin Bias Current vs Temperature in the Typical Performance Characteristics section). The ADJ pin voltage is 600mV referenced to GND. OUT (Pins 3, 4 / Pin 6): Output. These pin(s) supply power to the load. Stability requirements demand a minimum 2.2μF ceramic output capacitor to prevent oscillations. Large load transient applications require larger output capacitors to limit peak voltage transients. See the Applications Information section for details on transient response and reverse output characteristics. Permissible output voltage range is 600mV to 44.5V. IN (Pins 5, 6 / Pin 5): Input. These pin(s) supply power to the device. The LT3060 requires a local IN bypass capacitor if it is located more than six inches from the main input filter capacitor. In general, battery output impedance rises with frequency, so adding a bypass capacitor in batterypowered circuits is advisable. An input bypass capacitor in the range of 1μF to 10μF suffices. The LT3060 withstands reverse voltages on the IN pin with respect to its GND and OUT pins. In a reversed input situation, such as a battery plugged in backwards, the LT3060 behaves as if a large resistor is in series with its input. Limited reverse current flows into the LT3060 and no reverse voltage appears at the load. The device protects itself and the load. SHDN (Pin 7 / Pin 1): Shutdown. Pulling the SHDN pin low puts the LT3060 into a low power state and turns the output off. Drive the SHDN pin with either logic or an open collector/drain with a pull-up resistor. The resistor supplies the pull-up current to the open collector/drain logic, normally several microamperes, and the SHDN pin current, typically less than 3μA. If unused, connect the SHDN pin to IN. The LT3060 does not function if the SHDN pin is not connected. The SHDN pin cannot be driven below GND unless tied to the IN pin. If the SHDN pin is driven below GND while IN is powered, the output may turn on. SHDN pin logic cannot be referenced to a negative supply voltage. GND (Pin 8, Exposed Pad Pin 9 / Pins 2, 3, 4): Ground. Connect the bottom of the external resistor divider that sets the output voltage directly to GND for optimum regulation. For the DFN package, tie exposed pad Pin 9 directly to Pin 8 and the PCB ground. This exposed pad provides enhanced thermal performance with its connection to the PCB ground. See the Applications Information section for thermal considerations and calculating junction temperature. 3060f 10 LT3060 APPLICATIONS INFORMATION The LT3060 is a micropower, low noise, low dropout voltage, 100mA linear regulator with micropower shutdown. The device supplies up to 100mA at a typical dropout voltage of 300mV and operates over a 1.6V to 45V input range. A single external capacitor can provide programmable low noise reference performance and output soft-start functionality. For example, connecting a 10nF capacitor from the REF/BYP pin to GND lowers output noise to 30μVRMS over a 10Hz to 100kHz bandwidth. This capacitor also soft-starts the reference and prevents output voltage overshoot at turn-on. The LT3060’s quiescent current is merely 40μA but provides fast transient response with a minimum low ESR 2.2μF ceramic output capacitor. In shutdown, quiescent current is less than 1μA and the reference soft-start capacitor is reset. The LT3060 optimizes stability and transient response with low ESR, ceramic output capacitors. The regulator does not require the addition of ESR as is common with other regulators. The LT3060 typically provides 0.1% line regulation and 0.03% load regulation. Internal protection circuitry includes reverse-battery protection, reverse-output protection, reverse-current protection, current limit with foldback and thermal shutdown. This “bullet-proof” protection set makes it ideal for use in battery-powered systems. In battery backup applications where the output is held up by a backup battery and the input is pulled to ground, the LT3060 acts like it has a diode in series with its output and prevents reverse current flow. Additionally, in dual supply applications where the regulator load is returned to a negative supply, the output can be pulled below ground by as much as 45V and the device still starts normally and operates. Adjustable Operation The LT3060 has an output voltage range of 0.6V to 44.5V. The output voltage is set by the ratio of two external resistors, as shown in Figure 1. The device servos the output to maintain the ADJ pin voltage at 0.6V referenced to ground. The current in R1 is then equal to 0.6V/R1, and the current in R2 is the current in R1 minus the ADJ pin bias current. IN VIN OUT LT3060 SHDN VOUT R2 ADJ GND REF/BYP R1 ⎛ R2 ⎞ VOUT = 0.6 V ⎜ 1+ – IADJ • R2 R1 ⎟⎠ ⎝ ( ) VADJ = 0.6 V IADJ = 15nA at 25º C 3060 F01 OUTPUT RANGE = 0.6 V to 44.5V Figure 1. Adjustable Operation The ADJ pin bias current, 15nA at 25˚C, flows from the ADJ pin through R1 to GND. Calculate the output voltage using the formula in Figure 1. The value of R1 should be no greater than 124k to provide a minimum 5μA load current so that errors in the output voltage, caused by the ADJ pin bias current, are minimized. Note that in shutdown, the output is turned off and the divider current is zero. Curves of ADJ Pin Voltage vs Temperature and ADJ Pin Bias Current vs Temperature appear in the Typical Performance Characteristics Section. The LT3060 is tested and specified with the ADJ pin tied to the OUT pin, yielding VOUT = 0.6V. Specifications for output voltages greater than 0.6V are proportional to the ratio of the desired output voltage to 0.6V: VOUT /0.6V. For example, load regulation for an output current change of 1mA to 100mA is 0.2mV (typical) at VOUT = 0.6V. At VOUT = 12V, load regulation is: 12V • (0.2mV) = 4mV 0.6 V Table 1 shows 1% resistor divider values for some common output voltages with a resistor divider current of 5μA. Table 1. Output Voltage Resistor Divider Values VOUT (V) R1 (k Ω) R2 (k Ω) 1.2 118 118 1.5 121 182 1.8 124 249 2.5 115 365 3 124 499 3.3 124 562 5 115 845 3060f 11 LT3060 APPLICATIONS INFORMATION The LT3060 regulator provides low output voltage noise over the 10Hz to 100kHz bandwidth while operating at full load with the addition of a reference bypass capacitor (CREF/BYP) from the REF/BYP pin to GND. A good quality, low leakage capacitor is recommended. This capacitor will bypass the internal reference of the regulator, providing a low frequency noise pole. With the use of 10nF for CREF/BYP, the output voltage noise decreases to as low as 30μVRMS when the output voltage is set for 0.6V. For higher output voltages (generated by using a feedback resistor divider), the output voltage noise gains up accordingly when using CREF/BYP by itself. Higher values of output voltage noise are often measured if care is not exercised with regard to circuit layout and testing. Crosstalk from nearby traces induces unwanted noise onto the LT3060’s output. Power supply ripple rejection must also be considered. The LT3060 regulator does not have unlimited power supply rejection and passes a small portion of the input noise through to the output. Using a feedforward capacitor (CFF) from VOUT to the ADJ pin has the added benefit of improving transient response for output voltages greater than 0.6V. With no feedforward capacitor, the settling time will increase as the output voltage is raised above 0.6V. Use the equation in Figure 2 to determine the minimum value of CFF to achieve a transient response that is similar to 0.6V output voltage performance regardless of the chosen output voltage (See Figure 3 and Transient Response in the Typical Performance Characteristics section). IN VIN OUT LT3060 SHDN VOUT R2 CFF COUT ADJ GND REF/BYP R1 4.7nF • IFB−DIVIDER 5μA V IFB−DIVIDER = OUT R1+R 2 CFF ≥ CREF/BYP 3060 F02 ( ) Figure 2. Feedforward Capacitor for Fast Transient Response VOUT = 5V COUT = 10μF IFB-DIVIDER = 5μA 0 VOUT 50mV/DIV To lower the output voltage noise for higher output voltages, include a feedforward capacitor (CFF) from VOUT to the ADJ pin. A good quality, low leakage capacitor is recommended. This capacitor will bypass the error amplifier of the regulator, providing a low frequency noise pole. With the use of 10nF for both CFF and CREF/BYP, output voltage noise decreases to 30μVRMS when the output voltage is set to 5V by a 5μA feedback resistor divider. If the current in the feedback resistor divider is doubled, CFF must also be doubled to achieve equivalent noise performance. During start-up, the internal reference will soft-start if a reference bypass capacitor is present. Regulator startup time is directly proportional to the size of the bypass capacitor, slowing to 6ms with a 10nF bypass capacitor (See Start-up Time vs REF/BYP Capacitor in the Typical Performance Characteristics section). The reference bypass capacitor is actively drained during shutdown to reset the internal reference soft-start. FEEDFORWARD CAPACITOR, CFF Bypass Capacitance, Output Voltage Noise and Transient Response 100pF 1nF 10nF LOAD CURRENT 100mA/DIV 100μs/DIV 3060 F03 Figure 3. Transient Response vs Feedforward Capacitor Start-up time is also affected by the presence of a feedforward capacitor. Start-up time is directly proportional to the size of the feedforward capacitor and the output voltage, and is inversely proportional to the feedback resistor divider current, slowing to 15ms with a 4.7nF feedforward capacitor and a 10μF output capacitor for an output voltage set to 5V by a 5μA feedback resistor divider. Output Capacitance The LT3060 regulator is stable with a wide range of output capacitors. The ESR of the output capacitor affects stability, most notably with small capacitors. Use a minimum output capacitor of 2.2μF with an ESR of 3Ω or less to prevent oscillations. If a feedforward capacitor is used with output 3060f 12 LT3060 APPLICATIONS INFORMATION The X7R type works over a wider temperature range and has better temperature stability, while the X5R is less expensive and is available in higher values. Care still must be exercised when using X5R and X7R capacitors; the X5R and X7R codes only specify operating temperature range and maximum capacitance change over temperature. Capacitance change due to DC bias with X5R and X7R capacitors is better than Y5V and Z5U capacitors, but can still be significant enough to drop capacitor values below appropriate levels. Capacitor DC bias characteristics tend to improve as component case size increases, but expected capacitance at operating voltage should be verified. Voltage and temperature coefficients are not the only sources of problems. Some ceramic capacitors have a piezoelectric response. A piezoelectric device generates voltage across its terminals due to mechanical stress, similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor, the stress is induced by vibrations in 20 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10μF 0 CHANGE IN VALUE (%) Give extra consideration to the use of ceramic capacitors. Manufacturers make ceramic capacitors with a variety of dielectrics, each with different behavior across temperature and applied voltage. The most common dielectrics are specified with EIA temperature characteristic codes of Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics provide high C-V products in a small package at low cost, but exhibit strong voltage and temperature coefficients, as shown in Figures 4 and 5. When used with a 5V regulator, a 16V 10μF Y5V capacitor can exhibit an effective value as low as 1μF to 2μF for the DC bias voltage applied, and over the operating temperature range. The X5R and X7R dielectrics yield much more stable characteristics and are more suitable for use as the output capacitor. the system or thermal transients. The resulting voltages produced cause appreciable amounts of noise. A ceramic capacitor produced the trace in Figure 6 in response to light tapping from a pencil. Similar vibration induced behavior can masquerade as increased output voltage noise. X5R –20 –40 –60 Y5V –80 –100 0 2 4 14 8 6 10 12 DC BIAS VOLTAGE (V) 16 3060 F04 Figure 4. Ceramic Capacitor DC Bias Characteristics 40 20 CHANGE IN VALUE (%) voltages set for greater than 24V, use a minimum output capacitor of 4.7μF. The LT3060 is a micropower device and output load transient response is a function of output capacitance. Larger values of output capacitance decrease the peak deviations and provide improved transient response for larger load current changes. Bypass capacitors, used to decouple individual components powered by the LT3060, increase the effective output capacitor value. For applications with large load current transients, a low ESR ceramic capacitor in parallel with a bulk tantalum capacitor often provides an optimally damped response. X5R 0 –20 –40 Y5V –60 –80 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10μF –100 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 3060 F05 Figure 5. Ceramic Capacitor Temperature Characteristics VOUT = 0.6V COUT = 10μF CREF/BYP = 10nF ILOAD = 100mA VOUT 500μV/DIV 4ms/DIV 3060 F06 Figure 6. Noise Resulting from Tapping on a Ceramic Capacitor 3060f 13 LT3060 APPLICATIONS INFORMATION Overload Recovery Like many IC power regulators, the LT3060 has safe operating area protection. The safe operating area protection decreases current limit as input-to-output voltage increases, and keeps the power transistor inside a safe operating region for all values of input-to-output voltage. The LT3060 provides some output current at all values of input-to-output voltage up to the specified 45V operational maximum. When power is first applied, the input voltage rises and the output follows the input; allowing the regulator to start-up into very heavy loads. During start-up, as the input voltage is rising, the input-to-output voltage differential is small, allowing the regulator to supply large output currents. With a high input voltage, a problem can occur wherein the removal of an output short will not allow the output to recover. Other regulators, such as the LT1083/LT1084/ LT1085 family and LT1764A also exhibit this phenomenon, so it is not unique to the LT3060. The problem occurs with a heavy output load when the input voltage is high and the output voltage is low. Common situations are: (1) immediately after the removal of a short-circuit or (2) if the shutdown pin is pulled high after the input voltage is already turned on. The load line intersects the output current curve at two points creating two stable output operating points for the regulator. With this double intersection, the input power supply needs to be cycled down to zero and brought up again for the output to recover. Thermal Considerations The power handling capability of the device will be limited by the maximum rated junction temperature (125°C for LT3060E, LT3060I, LT3060MP or 150°C for LT3060H). Two components comprise the power dissipated by the device: 1. Output current multiplied by the input/output voltage differential: IOUT • (VIN –VOUT), and 2. GND pin current multiplied by the input voltage: IGND • VIN GND pin current is determined using the GND Pin Current curves in the Typical Performance Characteristics section. Power dissipation equals the sum of the two components listed above. The LT3060 regulator has internal thermal limiting that protects the device during overload conditions. For continuous normal conditions, the maximum junction temperature of 125°C (E-grade, I-grade, MP-grade) or 150°C (H-grade) must not be exceeded. Carefully consider all sources of thermal resistance from junction-to-ambient including other heat sources mounted in proximity to the LT3060. The underside of the LT3060 DFN package has exposed metal (1mm2) from the lead frame to the die attachment. The package allows heat to directly transfer from the die junction to the printed circuit board metal to control maximum operating junction temperature. The dual-in-line pin arrangement allows metal to extend beyond the ends of the package on the topside (component side) of a PCB. Connect this metal to GND on the PCB. The multiple IN and OUT pins of the LT3060 also assist in spreading heat to the PCB. For surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the PC board and its copper traces. Copper board stiffeners and plated through-holes also can spread the heat generated by power devices. The following tables list thermal resistance for several different board sizes and copper areas. All measurements were taken in still air on a 4 layer FR-4 board with 1oz solid internal planes and 2oz top/bottom external trace planes with a total board thickness of 1.6mm. The four layers were electrically isolated with no thermal vias present. PCB layers, copper weight, board layout and thermal vias will affect the resultant thermal resistance. For more information on thermal resistance and high thermal conductivity test boards, refer to JEDEC standard JESD51, notably JESD51-12 and JESD51-7. Achieving low thermal resistance necessitates attention to detail and careful PCB layout. 3060f 14 LT3060 APPLICATIONS INFORMATION Table 2. DC Package, 8-Lead DFN COPPER AREA TOPSIDE* BACKSIDE (mm2) (mm2) 2500 BOARD AREA (mm2) THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 2500 48°C/W 2500 1000 2500 2500 49°C/W 225 2500 2500 50°C/W 100 2500 2500 54°C/W 50 2500 2500 60°C/W *Device is mounted on topside Table 3. TS8 Package, 8 Lead TSOT-23 COPPER AREA TOPSIDE* BACKSIDE (mm2) (mm2) BOARD AREA (mm2) THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 2500 2500 2500 57°C/W 1000 2500 2500 58°C/W 225 2500 2500 59°C/W 100 2500 2500 63°C/W 50 2500 2500 67°C/W *Device is mounted on topside Calculating Junction Temperature Example: Given an output voltage of 2.5V, an input voltage range of 12V ±5%, an output current range of 0mA to 50mA and a maximum ambient temperature of 85°C, what will the maximum junction temperature be? The power dissipated by the device equals: IOUT(MAX) • (VIN(MAX)–VOUT) + IGND • VIN(MAX) where, IOUT(MAX) = 50mA VIN(MAX) = 12.6V IGND at (IOUT = 50mA, VIN = 12.6V) = 0.6mA So, P = 50mA • (12.6V – 2.5V) + 0.6mA • 12.6V = 0.513W Using a DFN package, the thermal resistance ranges from 48°C/W to 60°C/W depending on the copper area with no thermal vias. So the junction temperature rise above ambient approximately equals: 0.513W • 54°C/W = 27.8°C The maximum junction temperature equals the maximum ambient temperature plus the maximum junction temperature rise above ambient or: TJMAX = 85°C + 27.8°C = 112.8°C Protection Features The LT3060 incorporates several protection features that make it ideal for use in battery-powered circuits. In addition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the device also protects against reverse-input voltages, reverse-output voltages and reverse output-toinput voltages. Current limit protection and thermal overload protection protect the device against current overload conditions at the output of the device. The typical thermal shutdown temperature is 165°C. For normal operation, do not exceed a junction temperature of 125°C (LT3060E, LT3060I, LT3060MP) or 150°C (LT3060H). The LT3060 IN pin withstands reverse voltages up to 50V. The device limits current flow to less than 300μA (typically less than 50μA) and no negative voltage appears at OUT. The device protects both itself and the load against batteries that are plugged in backwards. The SHDN pin cannot be driven below GND unless tied to the IN pin. If the SHDN pin is driven below GND while IN is powered, the output may turn on. SHDN pin logic cannot be referenced to a negative supply voltage. The LT3060 incurs no damage if its output is pulled below ground. If the input is left open-circuit or grounded, the output can be pulled below ground by 50V. No current flows through the pass transistor from the output. However, current flows in (but is limited by) the resistor divider that sets the output voltage. Current flows from the bottom resistor in the divider and from the ADJ pin’s internal clamp through the top resistor in the divider to the external circuitry pulling OUT below ground. If the input is powered by a voltage source, the output sources current equal to its current limit capability and the LT3060 protects itself by thermal limiting. In this case, grounding the SHDN pin turns off the device and stops the output from sourcing current. 3060f 15 LT3060 APPLICATIONS INFORMATION In circuits where a backup battery is required, several different input/output conditions can occur. The output voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage or left opencircuit. Current flow back into the output follows the curve shown in Figure 7. If the LT3060’s IN pin is forced below the OUT pin or the OUT pin is pulled above the IN pin, input current typically drops to less than 1μA. This occurs if the LT3060 input is connected to a discharged (low voltage) battery and either a backup battery or a second regulator holds up the output. The state of the SHDN pin has no effect on the reverse current if the output is pulled above the input. 2.0 REVERSE OUTPUT CURRENT (mA) The LT3060 incurs no damage if the ADJ pin is pulled above or below ground by less than 50V. If the input is left open-circuit or grounded, the ADJ pin performs like a large resistor (typically 30k) in series with a diode when pulled below ground and like 30k in series with two diodes when pulled above ground. TJ = 25°C 1.8 VIN = 0V CURRENT FLOWS 1.6 INTO OUT PIN 1.4 VOUT = VADJ 1.2 1.0 ADJ 0.8 0.6 0.4 0.2 OUT 0 0 5 10 15 20 25 30 35 OUTPUT VOLTAGE (V) 40 45 3060 F07 Figure 7. Reverse Output Current 3060f 16 LT3060 TYPICAL APPLICATION Paralleling of Regulators for Higher Output Current R1 0.15Ω IN VIN > 2.9V + OUT LT3060 C1 2.2μF SHDN 2.5V 200mA R8 1.91k 1% ADJ GND REF/BYP C3 1nF C2 4.7μF R9 604Ω 1% R2 0.15Ω IN OUT R6 1.74k 1% LT3060 SHDN SHDN ADJ R7 604Ω 1% GND REF/BYP C4 1nF R3 200Ω R4 200Ω 3 + R5 1k 7 6 LT1637 2 – C5 10nF 4 3060 TA03 3060f 17 LT3060 PACKAGE DESCRIPTION DC Package 8-Lead Plastic DFN (2mm × 2mm) (Reference LTC DWG # 05-08-1719 Rev Ø) 0.70 ±0.05 2.55 ±0.05 1.15 ±0.05 0.64 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.45 BSC 1.37 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R = 0.05 TYP 2.00 ±0.10 (4 SIDES) PIN 1 BAR TOP MARK (SEE NOTE 6) R = 0.115 TYP 5 8 0.40 ± 0.10 0.64 ± 0.10 (2 SIDES) PIN 1 NOTCH R = 0.20 OR 0.25 s 45° CHAMFER (DC8) DFN 0106 REVØ 4 0.200 REF 1 0.23 ± 0.05 0.45 BSC 0.75 ±0.05 1.37 ±0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3060f 18 LT3060 PACKAGE DESCRIPTION TS8 Package 8-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1637) 0.52 MAX 2.90 BSC (NOTE 4) 0.65 REF 1.22 REF 1.4 MIN 3.85 MAX 2.62 REF 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.22 – 0.36 8 PLCS (NOTE 3) 0.65 BSC 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 0.09 – 0.20 (NOTE 3) 1.95 BSC TS8 TSOT-23 0802 NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193 3060f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LT3060 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1761 100mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20μVRMS , VIN = 1.8V to 20V, ThinSOT package LT1762 150mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20μVRMS , VIN = 1.8V to 20V, MS8 package LT1763 500mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20μVRMS , VIN = 1.8V to 20V, SO-8 Package LT1764/A 3A, Fast Transient Response, Low Noise LDO 340mV Dropout Voltage, Low Noise: 40μVRMS , VIN = 2.7V to 20V, TO-220 and DD Packages “A” version stable also with ceramic caps LT1962 300mA, Low Noise LDO 270mV Dropout Voltage, Low Noise: 20μVRMS , VIN = 1.8V to 20V, MS8 Package LT1963/A 1.5A Low Noise, Fast Transient Response LDO 340mV Dropout Voltage, Low Noise: 40μVRMS , VIN = 2.5V to 20V, “A” version stable with ceramic caps, TO-220, DD, SOT-223 and SO-8 Packages LT1964 200mA, Low Noise, Negative LDO 340mV Dropout Voltage, Low Noise 30μVRMS , VIN = –1.8V to –20V, ThinSOT Package LT1965 1.1A, Low Noise, Low Dropout Linear Regulator 290mV Dropout Voltage, Low Noise: 40μVRMS , VIN: 1.8V to 20V, VOUT: 1.2V to 19.5V, stable with ceramic caps, TO-220, DDPak, MSOP and 3 × 3 DFN Packages LT3008 20mA, 45V, 3uA Iq Micropower LDO 300mV Dropout Voltage, Low Iq: 3μA, VIN = 2.0V to 45V, VOUT = 0.6V to 39.5V; ThinSOT and 2 × 2 DFN-6 packages LT3009 20mA, 3uA Iq Micropower LDO 280mV Dropout Voltage, Low Iq: 3μA, VIN = 1.6V to 20V, ThinSOT and SC-70 packages LT3010 50mA, High Voltage, Micropower LDO VIN: 3V to 80V, VOUT: 1.275V to 60V, VDO = 0.3V, IQ = 30μA, ISD < 1μA, Low Noise: <100μVRMS, Stable with 1μF Output Capacitor, Exposed MS8 Package LT3011 50mA, High Voltage, Micropower LDO with PWRGD VIN: 3V to 80V, VOUT: 1.275V to 60V, VDO = 0.3V, IQ = 46μA, ISD < 1μA, Low Noise: <100μVRMS, PowerGood, Stable with 1μF Output Capacitor, 3 × 3 DFN-10 and Exposed MS12E Packages LT3012 250mA, 4V to 80V, Low Dropout Micropower Linear Regulator VIN: 4V to 80V, VOUT: 1.24V to 60V, VDO = 0.4V, IQ = 40μA, ISD < 1μA, TSSOP-16E and 4mm × 3mm DFN-12 Packages LT3013 250mA, 4V to 80V, Low Dropout Micropower Linear Regulator with PWRGD VIN: 4V to 80V, VOUT: 1.24V to 60V, VDO = 0.4V, IQ = 65μA, ISD < 1μA, PowerGood feature; TSSOP-16E and 4mm × 3mm DFN-12 Packages LT3014/HV 20mA, 3V to 80V, Low Dropout Micropower Linear Regulator VIN: 3V to 80V (100V for 2ms, “HV” version), VOUT: 1.22V to 60V, VDO = 0.35V, IQ = 7μA, ISD < 1μA, ThinSOT and 3mm × 3mm DFN-8 Packages LT3050 100mA, Low Noise Linear Regulator with 340mV Dropout Voltage, Low Noise: 30μVRMS , VIN: 1.6V to 45V, VOUT: 0.6V to 44.5V, Precision Current Limit and Diagnostic Functions. Programmable Precision Current Limit: ±5%, Programmable Minimum IOUT Monitor, Output Current Monitor, Fault Indicator, Reverse Protection, 12-Lead 2mm × 3mm DFN and MSOP Packages. LT3080/-1 1.1A, Parallelable, Low Noise, Low Dropout Linear Regulator 300mV Dropout Voltage (2-supply operation), Low Noise: 40μVRMS , VIN : 1.2V to 36V, VOUT: 0V to 35.7V, current-based reference with 1-resistor VOUT set; directly parallelable (no op amp required), stable with ceramic caps, TO-220, SOT-223, MSOP and 3 × 3 DFN Packages; “-1” version has integrated internal ballast resistor LT3082 200mA, Parallelable, Single Resistor, Low Dropout Linear Regulator Outputs May Be Paralleled for Higher Output, Current or Heat Spreading, Wide Input Voltage Range: 1.2V to 40V Low Value Input/Output Capacitors Required: 0.22μF, Single Resistor Sets Output Voltage Initial Set Pin Current Accuracy: 1%, Low Output Noise: 40μVRMS (10Hz to 100kHz) Reverse-Battery Protection, Reverse-Current Protection 8-Lead SOT-23, 3-Lead SOT-223 and 8-Lead 3mm × 3mm DFN Packages LT3085 500mA, Parallelable, Low Noise, Low Dropout Linear Regulator 275mV Dropout Voltage (2-supply operation), Low Noise: 40μVRMS, VIN: 1.2V to 36V, VOUT: 0V to 35.7V, current-based reference with 1-resistor VOUT set; directly parallelable (no op amp required), stable with ceramic caps, MS8E and 2 × 3 DFN-6 packages LT3092 200mA Two-Terminal Programmable Current Source Programmable Two-Terminal Current Source, Maximum Output Current: 200mA Wide Input Voltage Range: 1.2V to 40V, Resistor Ratio Sets Output Current Initial Set Pin Current Accuracy: 1%, Current Limit and Thermal Shutdown Protection ReverseVoltage Protection, Reverse-Current Protection 8-Lead SOT-23, 3-Lead SOT-223 and 8-Lead 3mm × 3mm DFN Packages 3060f 20 Linear Technology Corporation LT 0110 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2010