SN54HC244, SN74HC244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS130D – DECEMBER 1982 – REVISED AUGUST 2003 D Wide Operating Voltage Range of 2 V to 6 V High-Current Outputs Drive Up To 15 LSTTL Loads 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers D D D D Low Power Consumption, 80-µA Max ICC Typical tpd = 11 ns ±6-mA Output Drive at 5 V Low Input Current of 1 µA Max SN54HC244 . . . J OR W PACKAGE SN74HC244 . . . DB, DW, N, NS, OR PW PACKAGE (TOP VIEW) 20 2 19 3 18 4 17 5 6 16 15 7 14 8 13 9 12 10 11 2Y4 1A1 1OE VCC 1 VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 1A2 2Y3 1A3 2Y2 1A4 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 1Y1 2A4 1Y2 2A3 1Y3 2Y1 GND 2A1 1Y4 2A2 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND SN54HC244 . . . FK PACKAGE (TOP VIEW) 2OE D D description/ordering information These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC244 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes noninverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. ORDERING INFORMATION PACKAGE† TA PDIP – N SN74HC244N Tube of 25 SN74HC244DW Reel of 2000 SN74HC244DWR SOP – NS Reel of 2000 SN74HC244NSR HC244 SSOP – DB Reel of 2000 SN74HC244DBR HC244 Tube of 70 SN74HC244PW Reel of 2000 SN74HC244PWR Reel of 250 SN74HC244PWT CDIP – J Tube of 20 SNJ54HC244J SNJ54HC244J CFP – W Tube of 85 SNJ54HC244W SNJ54HC244W LCCC – FK Tube of 55 SNJ54HC244FK TSSOP – PW –55°C 125°C –55 C to 125 C TOP-SIDE MARKING Tube of 20 SOIC – DW –40 C to 85 –40°C 85°C C ORDERABLE PART NUMBER SN74HC244N HC244 HC244 SNJ54HC244FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54HC244, SN74HC244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS130D – DECEMBER 1982 – REVISED AUGUST 2003 FUNCTION TABLE (each buffer/driver) INPUTS OE A OUTPUT Y L H H L L L H X Z logic diagram (positive logic) 1OE 1A1 1A2 1A3 1A4 1 2OE 2 18 4 16 6 14 8 12 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 19 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54HC244, SN74HC244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS130D – DECEMBER 1982 – REVISED AUGUST 2003 recommended operating conditions (see Note 3) SN54HC244 VCC VIH Supply voltage VCC = 2 V VCC = 4.5 V High-level input voltage VCC = 6 V VCC = 2 V VIL VI VO ∆t/∆v t/ v Low-level input voltage NOM MAX 2 5 6 MAX 2 5 6 3.15 3.15 4.2 4.2 0 UNIT V V 0.5 0.5 1.35 1.35 1.8 1.8 VCC VCC VCC = 2 V VCC = 4.5 V Input transition rise/fall time NOM 1.5 0 Output voltage MIN 1.5 VCC = 4.5 V VCC = 6 V Input voltage SN74HC244 MIN 0 VCC VCC 0 1000 1000 500 500 V V V ns VCC = 6 V 400 400 TA Operating free-air temperature –55 125 –40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VOH VOL TEST CONDITIONS VI = VCC or 0, SN54HC244 MIN MAX SN74HC244 MIN MAX UNIT 2V 1.9 1.998 1.9 1.9 4.4 4.499 4.4 4.4 6V 5.9 5.999 5.9 5.9 IOH = –6 mA IOH = –7.8 mA 4.5 V 3.98 4.3 3.7 3.84 6V 5.48 5.8 5.2 5.34 2V 0.002 0.1 0.1 0.1 IOL = 20 µA A 4.5 V 0.001 0.1 0.1 0.1 6V 0.001 0.1 0.1 0.1 4.5 V 0.17 0.26 0.4 0.33 6V 0.15 0.26 0.4 0.33 6V ±0.1 ±100 ±1000 ±1000 nA 6V ±0.01 ±0.5 ±10 ±5 µA 8 160 80 µA 10 10 10 pF IOL = 6 mA IOL = 7.8 mA ICC Ci TA = 25°C TYP MAX 4.5 V VI = VIH or VIL VI = VCC or 0 VO = VCC or 0, MIN IOH = –20 µA A VI = VIH or VIL II IOZ VCC VI = VIH or VIL IO = 0 6V 2 V to 6 V POST OFFICE BOX 655303 3 • DALLAS, TEXAS 75265 V V 3 SN54HC244, SN74HC244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS130D – DECEMBER 1982 – REVISED AUGUST 2003 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) TA = 25°C TYP MAX SN54HC244 SN74HC244 PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2V 40 115 170 145 tpd A Y 4.5 V 13 23 34 29 6V 11 20 29 25 ten OE tdis OE tt Y Y Y MIN MIN MAX MIN MAX 2V 75 150 225 190 4.5 V 15 30 45 38 6V 13 26 38 32 2V 75 150 225 190 4.5 V 15 30 45 38 6V 13 26 38 32 2V 28 60 90 75 4.5 V 8 12 18 15 6V 6 10 15 13 UNIT ns ns ns ns switching characteristics over recommended operating free-air temperature range, CL = 150 pF (unless otherwise noted) (see Figure 1) TA = 25°C MIN TYP MAX SN54HC244 SN74HC244 PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2V 56 165 245 210 tpd A Y 4.5 V 18 33 49 42 ten tt OE Y Y MIN MAX MIN MAX 6V 15 28 42 35 2V 100 200 300 250 4.5 V 20 40 60 50 6V 17 34 51 43 2V 45 210 315 265 4.5 V 17 42 63 53 6V 13 36 53 45 UNIT ns ns ns operating characteristics, TA = 25°C PARAMETER Cpd 4 TEST CONDITIONS Power dissipation capacitance per buffer/driver POST OFFICE BOX 655303 No load • DALLAS, TEXAS 75265 TYP 35 UNIT pF SN54HC244, SN74HC244 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS130D – DECEMBER 1982 – REVISED AUGUST 2003 PARAMETER MEASUREMENT INFORMATION VCC PARAMETER Test Point From Output Under Test tPZH S1 ten RL CL (see Note A) 1 kΩ tPZL tPHZ tdis S2 RL tPLZ tpd or tt 1 kΩ –– LOAD CIRCUIT CL S1 S2 50 pF or 150 pF Open Closed Closed Open Open Closed Closed Open Open Open 50 pF 50 pF or 150 pF VCC Input 50% 50% 0V tPLH In-Phase Output 50% 10% tPHL 90% VOH 50% 10% V OL tf 90% tr tPHL Out-of-Phase Output 90% tPLH 50% 10% 50% 10% 90% VOH VOL tf tr VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES Output Control (Low-Level Enabling) VCC 50% 50% 0V tPZL Output Waveform 1 (See Note B) tPLZ 10% tPZH Input 50% 10% 90% VCC 90% 50% 10% 0 V tr Output Waveform 2 (See Note B) ≈VCC ≈VCC 50% VOL tPHZ 50% 90% VOH ≈0 V tf VOLTAGE WAVEFORM INPUT RISE AND FALL TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS NOTES: A. CL includes probe and test-fixture capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. D. The outputs are measured one at a time with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 26-Sep-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type 5962-8409601VRA ACTIVE CDIP J 20 1 TBD Call TI Level-NC-NC-NC 5962-8409601VSA ACTIVE CFP W 20 1 TBD Call TI Level-NC-NC-NC Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) 84096012A ACTIVE LCCC FK 20 1 TBD Call TI Level-NC-NC-NC 8409601RA ACTIVE CDIP J 20 1 TBD Call TI Level-NC-NC-NC 8409601SA ACTIVE CFP W 20 1 TBD Call TI Level-NC-NC-NC JM38510/65705B2A ACTIVE LCCC FK 20 1 TBD Call TI Level-NC-NC-NC JM38510/65705BRA ACTIVE CDIP J 20 1 TBD Call TI Level-NC-NC-NC JM38510/65705BSA ACTIVE CFP W 20 1 TBD Call TI Level-NC-NC-NC 1 SN54HC244J ACTIVE CDIP J 20 TBD Call TI Level-NC-NC-NC SN74HC244ADBLE OBSOLETE SSOP DB 20 TBD Call TI Call TI SN74HC244APWLE OBSOLETE TSSOP PW 20 TBD Call TI Call TI SN74HC244DBLE OBSOLETE SSOP DB 20 Call TI Call TI SN74HC244DBR ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC244DBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC244DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC244DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC244DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC244DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC244DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC244DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC244N ACTIVE PDIP N 20 CU NIPDAU Level-NC-NC-NC TBD 20 Pb-Free (RoHS) SN74HC244N3 OBSOLETE PDIP N 20 TBD Call TI SN74HC244NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC SN74HC244NSG4 ACTIVE SO NS 20 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC244NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC244NSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC244NSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC244PW ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC244PWE4 ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC244PWLE OBSOLETE TSSOP PW 20 TBD Call TI SN74HC244PWR ACTIVE TSSOP PW 20 2000 Green (RoHS & Addendum-Page 1 CU NIPDAU Call TI Call TI Level-1-260C-UNLIM PACKAGE OPTION ADDENDUM www.ti.com 26-Sep-2005 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74HC244PWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC244PWT ACTIVE TSSOP PW 20 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC244PWTE4 ACTIVE TSSOP PW 20 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SNJ54HC244FK ACTIVE LCCC FK 20 1 TBD Call TI Level-NC-NC-NC SNJ54HC244J ACTIVE CDIP J 20 1 TBD Call TI Level-NC-NC-NC SNJ54HC244W ACTIVE CFP W 20 1 TBD Call TI Level-NC-NC-NC Lead/Ball Finish MSL Peak Temp (3) no Sb/Br) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 MECHANICAL DATA MLCC006B – OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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