TI TL3843DR-8

TL284x, TL384x
CURRENT-MODE PWM CONTROLLERS
SLVS038F – JANUARY 1989 – REVISED FEBRUARY 2003
D
D
D
D
D
D
D
D
D
D
D
D
Optimized for Off-Line and dc-to-dc
Converters
Low Start-Up Current (<1 mA)
Automatic Feed-Forward Compensation
Pulse-by-Pulse Current Limiting
Enhanced Load-Response Characteristics
Undervoltage Lockout With Hysteresis
Double-Pulse Suppression
High-Current Totem-Pole Output
Internally Trimmed Bandgap Reference
500-kHz Operation
Error Amplifier With Low Output
Resistance
Designed to Be Interchangeable With
UC2842 and UC3842 Series
description/ordering information
D PACKAGE
(TOP VIEW)
COMP
NC
VFB
NC
ISENSE
NC
RT/CT
1
14
2
13
3
12
4
11
5
10
6
9
7
8
REF
NC
VCC
VC
OUTPUT
GND
POWER GROUND
NC – No internal connection
D-8 OR P PACKAGE
(TOP VIEW)
COMP
VFB
ISENSE
RT/CT
1
8
2
7
3
6
4
5
REF
VCC
OUTPUT
GND
The TL284x and TL384x series of control
integrated circuits provide the features that are
necessary to implement off-line or dc-to-dc fixed-frequency current-mode control schemes, with a minimum
number of external components. Some of the internally implemented circuits are an undervoltage lockout
(UVLO), featuring a start-up current of less than 1 mA, and a precision reference trimmed for accuracy at the
error amplifier input. Other internal circuits include logic to ensure latched operation, a pulse-width modulation
(PWM) comparator (that also provides current-limit control), and a totem-pole output stage designed to source
or sink high-peak current. The output stage, suitable for driving N-channel MOSFETs, is low when it is in the
off state.
Major differences between members of these series are the UVLO thresholds and maximum duty-cycle ranges.
Typical UVLO thresholds of 16 V (on) and 10 V (off) on the TLx842 and TLx844 devices make them ideally suited
to off-line applications. The corresponding typical thresholds for the TLx843 and TLx845 devices are 8.4 V (on)
and 7.6 V (off). The TLx842 and TLx843 devices can operate to duty cycles approaching 100%. A duty-cycle
range of 0 to 50% is obtained by the TLx844 and TLx845 by the addition of an internal toggle flip-flop, which
blanks the output off every other clock cycle.
The TL284x-series devices are characterized for operation from –40°C to 85°C. The TL384x-series devices are
characterized for operation from 0°C to 70°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
TL284x, TL384x
CURRENT-MODE PWM CONTROLLERS
SLVS038F – JANUARY 1989 – REVISED FEBRUARY 2003
ORDERING INFORMATION
ORDERABLE
PART NUMBER
PACKAGE†
TA
PDIP ((P))
(8 pin)
SOIC ((D))
(8 pin)
0°C to 70°C
SOIC ((D))
(14 pin)
PDIP ((P))
(8 pin)
SOIC ((D))
(8 pin)
–40°C
40°C to 85°C
SOIC ((D))
(14 pin)
Tube of 50
TL3842P
TL3842P
TL3843P
TL3843P
TL3844P
TL3844P
TL3845P
TL3845P
Tube of 75
TL3842D-8
Reel of 2500
TL3842DR-8
Tube of 75
TL3843D-8
Reel of 2500
TL3843DR-8
Tube of 75
TL3844D-8
Reel of 2500
TL3844DR-8
Tube of 75
TL3845D-8
Reel of 2500
TL3845DR-8
Tube of 50
TL3842D
Reel of 2500
TL3842DR
Tube of 50
TL3843D
Reel of 2500
TL3843DR
Tube of 50
TL3844D
Reel of 2500
TL3844DR
Tube of 50
TL3845D
Reel of 2500
TL3845DR
Tube of 50
TOP-SIDE
MARKING
TL3842
TL3843
TL3844
TL3845
TL3842
TL3843
TL3844
TL3845
TL2842P
TL2842P
TL2843P
TL2843P
TL2844P
TL2844P
TL2845P
TL2845P
Tube of 75
TL2842D-8
Reel of 2500
TL2842DR-8
Tube of 75
TL2843D-8
Reel of 2500
TL2843DR-8
Tube of 75
TL2844D-8
Reel of 2500
TL2844DR-8
Tube of 75
TL2845D-8
Reel of 2500
TL2845DR-8
Tube of 50
TL2842D
Reel of 2500
TL2842DR
Tube of 50
TL2843D
Reel of 2500
TL2843DR
Tube of 50
TL2844D
Reel of 2500
TL2844DR
Tube of 50
TL2845D
Reel of 2500
TL2845DR
TL2842
TL2843
TL2844
TL2845
TL2842
TL2843
TL2844
TL2845
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL284x, TL384x
CURRENT-MODE PWM CONTROLLERS
SLVS038F – JANUARY 1989 – REVISED FEBRUARY 2003
functional block diagram
VCC
12
34 V NOM
GND
UVLO
9
–
5-V REF
EN
+
14
REF
Internal
Bias
Vref
Good
Logic
RT/CT
7
11
10
OSC
VC
OUTPUT
†
T
Error
Amplifier
VFB
COMP
ISENSE
3
1
5
+
–
8
POWER
GROUND
S
2R
R
R
1V
PWM
Latch
CurrentSense
Comparator
† The toggle flip-flop is present only in TL2844, TL2845, TL3844, and TL3845.
Pin numbers shown are for the D (14-pin) package.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
TL284x, TL384x
CURRENT-MODE PWM CONTROLLERS
SLVS038F – JANUARY 1989 – REVISED FEBRUARY 2003
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage (see Note 1) (ICC < 30 mA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Self limiting
Analog input voltage range, VI (VFB and ISENSE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6.3 V
Output voltage, VO (OUTPUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 V
Input voltage, VI, (VC, D package only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 V
Supply current, ICC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1 A
Error amplifier output sink current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 mA
Package thermal impedance, θJA (see Notes 2 and 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
D-8 package . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
Virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Output energy (capacitive load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 µJ
Lead temperature, 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages are with respect to the device GND terminal.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can impact reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
MIN
MAX
UNIT
Supply voltage
30
V
VI, RT/CT
VI, VFB and ISENSE
Input voltage
0
5.5
V
Input voltage
0
5.5
V
VO, OUTPUT
VO, POWER GROUND‡
Output voltage
0
30
V
Output voltage
–0.1
1
V
ICC
IO
Supply current, externally limited
25
mA
Average output current
200
mA
IO(ref)
fosc
Reference output current
–20
mA
500
kHz
TA
Oscillator frequency
100
TL284x
–40
85
TL384x
0
70
Operating free-air
free air temperature
‡ These recommended voltages for VC and POWER GROUND apply only to the D package.
4
NOM
VCC and VC‡
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
°C
TL284x, TL384x
CURRENT-MODE PWM CONTROLLERS
SLVS038F – JANUARY 1989 – REVISED FEBRUARY 2003
electrical characteristics over recommended operating free-air temperature range, VCC = 15 V (see
Note 4), RT = 10 kΩ, CT = 3.3 nF (unless otherwise specified)
reference section
PARAMETER
Output voltage
TEST CONDITIONS
Line regulation
IO = 1 mA,
VCC = 12 V to 25 V
Load regulation
IO = 1 mA to 20 mA
TA = 25°C
TL284x
MIN TYP†
MAX
4.95
5
5.05
5
5.1
V
6
20
6
20
mV
6
25
6
25
mV
0.2
0.4
0.2
0.4
mV/°C
5.18
V
Temperature coefficient
of output voltage
Output voltage
with worst-case variation
VCC = 12 V to 25 V,
Output noise voltage
f = 10 Hz to 10 kHz,
Output-voltage long-term drift
IO = 1 mA to 20 mA
4.9
5.1
TA = 25°C
After 1000 h at TA = 25°C
TL384x
MIN TYP†
4.9
4.82
50
Short-circuit output current
–30
MAX
UNIT
µV
50
5
25
5
25
mV
–100
–180
–30
–100
–180
mA
MAX
MIN
TL384x
TYP†
MAX
52
57
47
2
10
† All typical values are at TA = 25°C.
NOTE 4: Adjust VCC above the start threshold before setting it to 15 V.
oscillator section
PARAMETER
TEST CONDITIONS
Oscillator frequency (see Note 5)
Frequency change with supply voltage
TA = 25°C
VCC = 12 V to 25 V
MIN
TL284x
TYP†
47
Frequency change with temperature
50
UNIT
52
57
kHz
2
10
Hz/kHz
50
Hz/kHz
Peak-to-peak amplitude at RT/CT
1.7
1.7
V
† All typical values are at TA = 25°C.
NOTES: 4. Adjust VCC above the start threshold before setting it to 15 V.
5. Output frequency equals oscillator frequency for the TLx842 and TLx843. Output frequency is one-half the oscillator frequency for
the TLx844 and TLx845.
error-amplifier section
PARAMETER
Feedback input voltage
TL284x
MIN TYP†
COMP at 2.5 V
2.45
VO = 2 V to 4 V
65
90
65
90
dB
0.7
1
0.7
1
MHz
60
70
60
70
dB
2
6
2
6
mA
–0.5
–0.8
–0.5
–0.8
mA
TEST CONDITIONS
Input bias current
Open-loop voltage amplification
Gain-bandwidth product
Supply-voltage rejection ratio
Output sink current
VCC = 12 V to 25 V
VFB at 2.7 V,
COMP at 1.1 V
Output source current
VFB at 2.3 V,
COMP at 5 V
High-level output voltage
VFB at 2.3 V,
RL = 15 kΩ to GND
Low-level output voltage
VFB at 2.7 V,
RL = 15 kΩ to GND
5
MAX
TL384x
MIN TYP†
MAX
2.50
2.55
2.42
2.50
2.58
V
–0.3
–1
–0.3
–2
µA
6
0.7
5
1.1
6
0.7
UNIT
V
1.1
V
† All typical values are at TA = 25°C.
NOTE 4: Adjust VCC above the start threshold before setting it to 15 V.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
TL284x, TL384x
CURRENT-MODE PWM CONTROLLERS
SLVS038F – JANUARY 1989 – REVISED FEBRUARY 2003
electrical characteristics over recommended operating free-air temperature range, VCC = 15 V (see
Note 4), RT = 10 kΩ, CT = 3.3 nF (unless otherwise specified) (continued)
current-sense section
MAX
TL384x
MIN TYP†
MAX
3
3.13
2.85
3
3.15
V/V
1
1.1
0.9
1
1.1
V
–2
–10
µA
Delay time to output
150
300
150
† All typical values are at TA = 25°C.
NOTES: 4. Adjust VCC above the start threshold before setting it to 15 V.
6. These parameters are measured at the trip point of the latch, with VFB at 0 V.
7. Voltage amplification is measured between ISENSE and COMP, with the input changing from 0 V to 0.8 V.
300
ns
PARAMETER
TEST CONDITIONS
Voltage amplification
See Notes 6 and 7
Current-sense comparator threshold
COMP at 5 V,
See Note 6
Supply-voltage rejection ratio
VCC = 12 V to 25 V,
See Note 6
TL284x
MIN TYP†
2.85
0.9
70
Input bias current
–2
70
–10
UNIT
dB
output section
PARAMETER
TEST CONDITIONS
High level output voltage
High-level
IOH = –20 mA
IOH = –200 mA
Low level output voltage
Low-level
IOL = 20 mA
IOL = 200 mA
Rise time
CL = 1 nF,
Fall time
CL = 1 nF,
TL284x
MIN TYP†
MAX
TL384x
MIN TYP†
13
13.5
13
13.5
12
13.5
12
13.5
TA = 25°C
TA = 25°C
MAX
UNIT
V
0.1
0.4
0.1
0.4
1.5
2.2
1.5
2.2
50
150
50
150
ns
50
150
50
150
ns
V
† All typical values are at TA = 25°C.
NOTE 4: Adjust VCC above the start threshold before setting it to 15 V.
undervoltage-lockout section
PARAMETER
Start threshold voltage
Minimum operating voltage after startup
MIN
TL284x
TYP†
MAX
MIN
TL384x
TYP†
MAX
TLx842, TLx844
15
16
17
14.5
16
17.5
TLx843, TLx845
7.8
8.4
9
7.8
8.4
9
TLx842, TLx844
9
10
11
8.5
10
11.5
TLx843, TLx845
7
7.6
8.2
7
7.6
8.2
MAX
MIN
UNIT
V
V
† All typical values are at TA = 25°C.
NOTE 4: Adjust VCC above the start threshold before setting it to 15 V.
pulse-width-modulator section
PARAMETER
Maximum duty cycle
MIN
TL284x
TYP†
MAX
TLx842, TLx843
95
97
100
95
97
100
TLx844, TLx845
46
48
50
46
48
50
Minimum duty cycle
0
† All typical values are at TA = 25°C.
NOTE 4: Adjust VCC above the start threshold before setting it to 15 V.
6
TL384x
TYP†
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
0
UNIT
%
TL284x, TL384x
CURRENT-MODE PWM CONTROLLERS
SLVS038F – JANUARY 1989 – REVISED FEBRUARY 2003
electrical characteristics over recommended operating free-air temperature range, VCC = 15 V (see
Note 4), RT = 10 kΩ, CT = 3.3 nF (unless otherwise specified) (continued)
supply voltage
PARAMETER
TEST CONDITIONS
MIN
TL284x
TYP†
Start-up current
MAX
MIN
TL384x
TYP†
MAX
UNIT
0.5
1
0.5
1
mA
Operating supply current
VFB and ISENSE at 0 V
11
17
11
17
mA
Limiting voltage
ICC = 25 mA
34
34
V
† All typical values are at TA = 25°C.
NOTE 4: Adjust VCC above the start threshold before setting it to 15 V.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
TL284x, TL384x
CURRENT-MODE PWM CONTROLLERS
SLVS038F – JANUARY 1989 – REVISED FEBRUARY 2003
APPLICATION INFORMATION
2.5 V
0.5 mA
Error
Amplifier
COMP
Zf
NOTE A:
+
–
VFB
Zi
Error amplifier can source or sink up to 0.5 mA.
Figure 1. Error-Amplifier Configuration
Error
Amplifier
IS
(see Note A)
2R
+
–
R
COMP
Rf
RS
1V
Current-Sense
Comparator
ISENSE
Cf
GND
NOTE A: Peak current (IS) is determined by the formula:
1 V
I S(max)
RS
A small RC filter formed by resistor Rf and capacitor Cf may be required to suppress switch transients.
+
Figure 2. Current-Sense Circuit
REF
RT
(see Note A)
RT/CT
CT
GND
NOTE A: For RT > 5 kΩ: f
[ R1.72C
T
T
Figure 3. Oscillator Section
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TL284x, TL384x
CURRENT-MODE PWM CONTROLLERS
SLVS038F – JANUARY 1989 – REVISED FEBRUARY 2003
APPLICATION INFORMATION
TIMING RESISTANCE
vs
FREQUENCY
DEAD TIME
vs
TIMING CAPACITANCE
100
100
CT = 10 nF
VCC = 15 V
RT ≥ 5 kΩ
TA = 25°C
40
CT = 4.7 nF
CT = 22 nF
R T – Timing Resistance – kΩ
Dead Time – µ s
40
10
4
1
CT = 1 nF
CT = 22 nF
10
CT = 47 nF
CT = 100 nF
4
0.4
VCC = 15 V
TA = 25°C
1
100
0.1
0
4
10
40
100
1k
10 k
100 k
1M
f – Frequency – Hz
CT – Timing Capacitance – nF
Figure 4
Figure 5
open-loop laboratory test fixture
In the open-loop laboratory test fixture (see Figure 6), high peak currents associated with loads necessitate
careful grounding techniques. Timing and bypass capacitors should be connected close to the GND terminal
in a single-point ground. The transistor and 5-kΩ potentiometer sample the oscillator waveform and apply an
adjustable ramp to the ISENSE terminal.
REF
RT
A
4.7 kΩ
VCC
2N2222
100 kΩ
1 kΩ
Error Amplifier
Adjust
DUT
VFB
5 kΩ
REF
COMP
ISENSE
0.1 µF
TL284x
TL384x
VCC
OUTPUT
0.1 µF
1 kΩ, 1 W
OUTPUT
4.7 kΩ
ISENSE
Adjust
RT/CT
GND
GND
CT
Figure 6. Open-Loop Laboratory Test Fixture
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
9
TL284x, TL384x
CURRENT-MODE PWM CONTROLLERS
SLVS038F – JANUARY 1989 – REVISED FEBRUARY 2003
APPLICATION INFORMATION
shutdown technique
The PWM controller (see Figure 7) can be shut down by two methods: either raise the voltage at ISENSE above
1 V or pull the COMP terminal below a voltage two diode drops above ground. Either method causes the output
of the PWM comparator to be high (refer to block diagram). The PWM latch is reset dominant so that the output
remains low until the next clock cycle after the shutdown condition at the COMP or ISENSE terminal is removed.
In one example, an externally latched shutdown can be accomplished by adding an SCR that resets by cycling
VCC below the lower UVLO threshold. At this point, the reference turns off, allowing the SCR to reset.
1 kΩ
REF
COMP
Shutdown
330 Ω
ISENSE
500 Ω
Shutdown
To Current-Sense
Resistor
Figure 7. Shutdown Techniques
A fraction of the oscillator ramp can be summed resistively with the current-sense signal to provide slope
compensation for converters requiring duty cycles over 50% (see Figure 8). Note that capacitor C forms a filter
with R2 to suppress the leading-edge switch spikes.
REF
0.1 µF
RT
RT/CT
CT
R1
ISENSE
R2
ISENSE
C
Figure 8. Slope Compensation
10
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
RSENSE
PACKAGE OPTION ADDENDUM
www.ti.com
13-Mar-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TL2842D
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
TL2842D-8
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
TL2842DE4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
TL2842DE4-8
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
TL2842DR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
TL2842DR-8
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
TL2842DRE4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
TL2842DRE4-8
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
TL2842P
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL2842PE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL2843D
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2843D-8
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2843DE4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2843DE4-8
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2843DR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2843DR-8
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2843DRE4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2843DRE4-8
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2843P
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL2843PE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL2844D
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2844D-8
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2844DE4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2844DE4-8
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2844DR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Addendum-Page 1
Lead/Ball Finish
MSL Peak Temp (3)
PACKAGE OPTION ADDENDUM
www.ti.com
13-Mar-2007
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TL2844DR-8
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2844DRE4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2844DRE4-8
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2844P
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL2844PE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL2845D
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2845D-8
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2845DE4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2845DE4-8
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2845DG4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2845DR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL2845DR-8
ACTIVE
SOIC
D
8
2500
TL2845DRE4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
TL2845DRE4-8
ACTIVE
SOIC
D
8
2500
TL2845DRG4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
TL2845P
ACTIVE
PDIP
P
8
50
TL2845PE4
ACTIVE
PDIP
P
8
TL3842D
ACTIVE
SOIC
D
TL3842D-8
ACTIVE
SOIC
TL3842DE4
ACTIVE
TL3842DE4-8
TBD
TBD
Lead/Ball Finish
Call TI
CU NIPDAU
Call TI
MSL Peak Temp (3)
Call TI
Level-1-260C-UNLIM
Call TI
CU NIPDAU
Level-1-260C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
TL3842DR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
TL3842DR-8
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
TL3842DRE4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
TL3842DRE4-8
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
TL3842P
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL3842PE4
ACTIVE
PDIP
P
8
50
Pb-Free
CU NIPDAU
N / A for Pkg Type
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
13-Mar-2007
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TL3843D
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3843D-8
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3843D-8E4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3843DE4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3843DG4-8
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3843DR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3843DR-8
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3843DR-8E4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3843DRE4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3843DRG4-8
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3843P
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL3843PE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL3844D
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3844D-8
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3844DE4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3844DE4-8
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3844DR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3844DR-8
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3844DRE4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3844DRE4-8
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3844P
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL3844PE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL3845D
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3845D-8
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3845DE4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(RoHS)
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
13-Mar-2007
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TL3845DE4-8
ACTIVE
SOIC
D
8
TL3845DR
ACTIVE
SOIC
D
TL3845DR-8
ACTIVE
SOIC
TL3845DRE4
ACTIVE
TL3845DRE4-8
75
Lead/Ball Finish
MSL Peak Temp (3)
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL3845P
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL3845PE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 4
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0.430 (10,92)
MAX
0.010 (0,25) M
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
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