TI SN74HCT541DW

 SCLS306C − JANUARY 1996 − REVISED AUGUST 2003
D
D
D
D
D
D
Directly With System Bus or Can Drive Up
To 15 LSTTL Loads
Low Power Consumption, 80-µA Max ICC
Typical tpd = 12 ns
±6-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Inputs Are TTL-Voltage Compatible
Data Flow-Through Pinout (All Inputs on
Opposite Side From Outputs)
SN54HCT541 . . . J OR W PACKAGE
SN74HCT541 . . . DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
OE1
A1
A2
A3
A4
A5
A6
A7
A8
GND
description/ordering information
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
OE2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
SN54HCT541 . . . FK PACKAGE
(TOP VIEW)
A2
A1
These octal buffers and line drivers are designed
to have the performance of the popular ’HC240
series devices and to offer a pinout with inputs and
outputs on opposite sides of the package. This
arrangement greatly facilitates printed circuit
board layout.
A3
A4
A5
A6
A7
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
Y1
Y2
Y3
Y4
Y5
A8
GND
Y8
Y7
Y6
The 3-state control gate is a 2-input NOR. If either
output-enable (OE1 or OE2) input is high, all eight
outputs are in the high-impedance state. The
’HCT541 devices provide true data at the outputs.
OE1
VCC
OE2
D Operating Voltage Range of 4.5 V to 5.5 V
D High-Current 3-State Outputs Interface
ORDERING INFORMATION
PACKAGE†
TA
PDIP − N
SN74HCT541N
Tube of 25
SN74HCT541DW
Reel of 2000
SN74HCT541DWR
SOP − NS
Reel of 2000
SN74HCT541NSR
HCT541
SSOP − DB
Reel of 2000
SN74HCT541DBR
HT541
Tube of 70
SN74HCT541PW
Reel of 2000
SN74HCT541PWR
Reel of 250
SN74HCT541PWT
CDIP − J
Tube of 20
SNJ54HCT541J
SNJ54HCT541J
CFP − W
Tube of 85
SNJ54HCT541W
SNJ54HCT541W
LCCC − FK
Tube of 55
SNJ54HCT541FK
TSSOP − PW
−55°C
−55
C to 125
125°C
C
TOP-SIDE
MARKING
Tube of 20
SOIC − DW
−40°C to 85°C
ORDERABLE
PART NUMBER
SN74HCT541N
HCT541
HT541
SNJ54HCT541FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2003, Texas Instruments Incorporated
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1
SCLS306C − JANUARY 1996 − REVISED AUGUST 2003
FUNCTION TABLE
(each buffer/driver)
INPUTS
OE1
OE2
A
OUTPUT
Y
L
L
L
L
H
L
L
H
H
X
X
Z
X
H
X
Z
logic diagram (positive logic)
OE1
OE2
A1
1
19
2
18
Y1
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA
Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
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SCLS306C − JANUARY 1996 − REVISED AUGUST 2003
recommended operating conditions (see Note 3)
SN54HCT541
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
VCC
VIH
Supply voltage
VIL
VI
Low-level input voltage
Input voltage
0
VO
∆t/∆v
Output voltage
0
High-level input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
SN74HCT541
2
2
Input transition rise/fall time
V
V
0.8
VCC
VCC
UNIT
0
0
500
0.8
V
VCC
VCC
V
500
ns
V
TA
Operating free-air temperature
−55
125
−40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
VOH
VI = VIH or VIL
IOH = −20 µA
IOH = −6 mA
4.5 V
VOL
VI = VIH or VIL
IOL = 20 µA
IOL = 6 mA
4.5 V
II
IOZ
VI = VCC or 0
VO = VCC or 0,
ICC
∆ICC†
VI = VIH or VIL
VI = VCC or 0,
IO = 0
One input at 0.5 V or 2.4 V,
Other inputs at 0 or VCC
MIN
SN54HCT541
MIN
MAX
SN74HCT541
MIN
4.4
4.499
4.4
4.4
3.98
4.3
3.7
3.84
MAX
UNIT
V
0.001
0.1
0.1
0.1
0.17
0.26
0.4
0.33
5.5 V
±0.1
±100
±1000
±1000
nA
5.5 V
±0.01
±0.5
±10
±5
µA
8
160
80
µA
1.4
2.4
3
2.9
mA
3
10
10
10
pF
5.5 V
5.5 V
4.5 V
to 5.5 V
Ci
TA = 25°C
TYP
MAX
V
† This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or VCC.
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tpd
A
Y
ten
OE
Y
tdis
OE
Y
tt
Y
VCC
MIN
TA = 25°C
TYP
MAX
SN54HCT541
MIN
MAX
SN74HCT541
MIN
MAX
4.5 V
13
23
34
29
5.5 V
12
21
31
26
4.5 V
21
30
45
38
5.5 V
19
27
41
34
4.5 V
19
30
45
38
5.5 V
18
27
41
34
4.5 V
8
12
18
15
5.5 V
7
11
16
14
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UNIT
ns
ns
ns
ns
3
SCLS306C − JANUARY 1996 − REVISED AUGUST 2003
switching characteristics over recommended operating free-air temperature range, CL = 150 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tpd
A
Y
ten
OE
Y
tt
Y
VCC
MIN
TA = 25°C
TYP
MAX
SN54HCT541
MIN
MAX
SN74HCT541
MIN
MAX
4.5 V
20
33
49
42
5.5 V
19
30
45
38
4.5 V
26
40
60
50
5.5 V
25
36
54
45
4.5 V
17
42
63
53
5.5 V
14
38
57
48
UNIT
ns
ns
ns
operating characteristics, TA = 25°C
PARAMETER
Cpd
4
TEST CONDITIONS
Power dissipation capacitance per buffer/driver
POST OFFICE BOX 655303
No load
• DALLAS, TEXAS 75265
TYP
35
UNIT
pF
SCLS306C − JANUARY 1996 − REVISED AUGUST 2003
PARAMETER MEASUREMENT INFORMATION
VCC
From Output
Under Test
CL
(see Note A)
PARAMETER
tPZH
S1
Test
Point
1 kΩ
ten
RL
tPZL
tPHZ
tdis
S2
−−
LOAD CIRCUIT
2.7 V
2.7 V
S1
S2
50 pF
or
150 pF
Open
Closed
Closed
Open
Open
Closed
Closed
Open
Open
Open
1 kΩ
tPLZ
tpd or tt
Input 1.3 V
0.3 V
CL
RL
50 pF
50 pF
or
150 pF
3V
1.3 V
0.3 V 0 V
tr
tf
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
3V
Input
1.3 V
1.3 V
0V
tPLH
In-Phase
Output
1.3 V
10%
tPHL
90%
90%
tr
tPHL
Out-ofPhase
Output
90%
VOH
1.3 V
10% V
OL
tf
tPLH
1.3 V
10%
1.3 V
10%
tf
90%
VOH
VOL
tr
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT RISE AND FALL TIMES
Output
Control
(Low-Level
Enabling)
3V
1.3 V
1.3 V
0V
tPZL
Output
Waveform 1
(See Note B)
tPLZ
≈VCC
1.3 V
10%
tPZH
Output
Waveform 2
(See Note B)
VOL
tPHZ
1.3 V
90%
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
NOTES: A. CL includes probe and test-fixture capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
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5
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
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1
MECHANICAL
MPDI002C – JANUARY 1995 – REVISED DECEMBER 20002
N (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
16 PINS SHOWN
PINS **
14
16
18
20
A MAX
0.775
(19,69)
0.775
(19,69)
0.920
(23,37)
1.060
(26,92)
A MIN
0.745
(18,92)
0.745
(18,92)
0.850
(21,59)
0.940
(23,88)
MS-100
VARIATION
AA
BB
AC
DIM
A
16
9
0.260 (6,60)
0.240 (6,10)
1
C
AD
8
0.070 (1,78)
0.045 (1,14)
0.045 (1,14)
0.030 (0,76)
D
D
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gauge Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.430 (10,92) MAX
0.021 (0,53)
0.015 (0,38)
0.010 (0,25) M
14/18 PIN ONLY
20 pin vendor option
D
4040049/E 12/2002
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001, except 18 and 20 pin minimum body lrngth (Dim A).
D. The 20 pin end lead shoulder width is a vendor option, either half or full width.
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1
MECHANICAL DATA
MSOI003E – JANUARY 1995 – REVISED SEPTEMBER 2001
DW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
16 PINS SHOWN
0.020 (0,51)
0.014 (0,35)
9
0.050 (1,27)
16
0.010 (0,25)
0.419 (10,65)
0.400 (10,15)
0.010 (0,25) NOM
0.299 (7,59)
0.291 (7,39)
Gage Plane
0.010 (0,25)
1
8
0°– 8°
0.050 (1,27)
0.016 (0,40)
A
Seating Plane
0.104 (2,65) MAX
0.012 (0,30)
0.004 (0,10)
PINS **
0.004 (0,10)
16
18
20
24
28
A MAX
0.410
(10,41)
0.462
(11,73)
0.510
(12,95)
0.610
(15,49)
0.710
(18,03)
A MIN
0.400
(10,16)
0.453
(11,51)
0.500
(12,70)
0.600
(15,24)
0.700
(17,78)
DIM
4040000/E 08/01
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
Falls within JEDEC MS-013
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1
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
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1
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
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1
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