MICROCHIP MCP1754T

MCP1754/MCP1754S
150 mA, 16V, High Performance LDO
Features
Description
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The MCP1754/MCP1754S is a family of CMOS low
dropout (LDO) voltage regulators that can deliver up to
150 mA of current while consuming only 56.0 µA of
quiescent current (typical). The input operating range is
specified from 3.6V to 16.0V, making it an ideal choice
for four to six primary cell battery-powered applications,
12V mobile applications and one- to three-cell Li-Ionpowered applications.
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High PSRR: >70 dB @ 1 kHz typical
56.0 µA Typical Quiescent Current
Input Operating Voltage Range: 3.6V to16.0V
150 mA Output Current for All Output Voltages
Low Drop Out Voltage, 300 mV Typical @ 150 mA
0.4% Typical Output Voltage Tolerance
Standard Output Voltage Options (1.8V, 2.5V,
2.8V, 3.0V, 3.3V, 4.0V, 5.0V)
Output Voltage Range 1.8V to 5.5V in 0.1V
Increments (tighter increments also possible per
design)
Output Voltage Tolerances of ±2.0% Over Entire
Temperature Range
Stable with Minimum 1.0 µF Output Capacitance
Power Good Output
Shutdown Input
True Current Foldback Protection
Short-Circuit Protection
Overtemperature Protection
Applications
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Battery-powered Devices
Battery-powered Alarm Circuits
Smoke Detectors
CO2 Detectors
Pagers and Cellular Phones
Smart Battery Packs
PDAs
Digital Cameras
Microcontroller Power
Consumer Products
Battery-powered Data Loggers
The MCP1754/MCP1754S is capable of delivering
150 mA with only 300 mV (typical) of input to output
voltage differential. The output voltage tolerance of the
MCP1754/MCP1754S is typically ±0.4% at +25°C and
±2.0% maximum over the operating junction
temperature range of -40°C to +125°C. Line regulation
is ±0.01% typical at +25°C.
Output voltages available for the MCP1754/MCP1754S
range from 1.8V to 5.5V. The LDO output is stable when
using only 1 µF of output capacitance. Ceramic,
tantalum or aluminum electrolytic capacitors may all be
used for input and output. Overcurrent limit and
overtemperature shutdown provide a robust solution for
any application.
The MCP1754/MCP1754S family introduces a true
current foldback feature. When the load impedance
decreases beyond the MCP1754/MCP1754S load
rating, the output current and voltage will gracefully
foldback towards 30 mA at about 0V output. When the
load impedance decreases and returns to the rated
load, the MCP1754/MCP1754S will follow the same
foldback curve as the device comes out of current
foldback.
Package options for the MCP1754S include the SOT23A, SOT-89-3, SOT-223-3 and 2x3 DFN-8.
Package options for the MCP1754 include the SOT-235, SOT-223-5, and 2x3 DFN-8.
Related Literature
• AN765, “Using Microchip’s Micropower LDOs”,
DS00765, Microchip Technology Inc., 2007
• AN766, “Pin-Compatible CMOS Upgrades to
BiPolar LDOs”, DS00766,
Microchip Technology Inc., 2003
• AN792, “A Method to Determine How Much
Power a SOT23 Can Dissipate in an Application”,
DS00792, Microchip Technology Inc., 2001
© 2011 Microchip Technology Inc.
DS22276A-page 1
MCP1754/MCP1754S
Package Types - MCP1754S
3-Pin SOT-23A
3-Pin SOT-89
VIN
SOT-223-3
GND
GND
2
4
3
8-Lead 2X3 DFN(*)
VOUT 1
NC 2
NC 3
1
1
2
GND VOUT
2
1
3
VIN
VIN GND VOUT
2
8 VIN
EP
9
GND 4
3
7 NC
6 NC
5 GND
Tab will be connected to GND
GND VOUT
(Note: The 3-lead SOT-223 (DB) is not a
standard package for output voltages
below 3.0V)
* Includes Exposed Thermal Pad (EP); see Table 3-2.
Package Types - MCP1754
SOT23-5
SOT-223-5
4
5
8-Lead 2X3 DFN(*)
3
VOUT 1
PWRGD 2
NC 3
1
2
3
1
2
3
4
5
GND 4
8 VIN
EP
9
7 NC
6 NC
5 SHDN
Tab will be connected to GND
PIN
1
2
3
4
5
FUNCTION
VIN
GND
/SHDN
PWRGD
VOUT
PIN
1
2
3
4
5
FUNCTION
/SHDN
VIN
GND
VOUT
PWRGD
* Includes Exposed Thermal Pad (EP); see Table 3-1.
DS22276A-page 2
© 2011 Microchip Technology Inc.
MCP1754/MCP1754S
Functional Block Diagrams
MCP1754S
VOUT
VIN
Error Amplifier
+VIN
Voltage
Reference
+
Over Current
Over Temperature
GND
© 2011 Microchip Technology Inc.
DS22276A-page 3
MCP1754/MCP1754S
PMOS
MCP1754
VIN
VOUT
Undervoltage
Lock Out
(UVLO)
Sense
ISNS
Cf
Rf
SHDN
Overtemperature
Sensing
+
Driver w/limit
and SHDN
EA
–
SHDN
VREF
V IN
SHDN
Reference
Soft-Start
Comp
TDELAY
PWRGD
GND
92% of VREF
Typical Application Circuits
CIN
1 µF Ceramic
VIN
+
12V
MCP1754S
VOUT
GND
VOUT
5.0V
COUT
1 µF Ceramic
DS22276A-page 4
IOUT
30 mA
© 2011 Microchip Technology Inc.
MCP1754/MCP1754S
1.0
ELECTRICAL
CHARACTERISTICS
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
Absolute Maximum Ratings †
Input Voltage, VIN..................................................................+17.6V
VIN, PWRGD, SHDN ..................... (GND-0.3V) to (VIN+0.3V)
VOUT .................................................. (GND-0.3V) to (+5.5V)
Internal Power Dissipation ............ Internally-Limited (Note 6)
Output Short Circuit Current ................................. Continuous
Storage temperature .....................................-55°C to +150°C
Maximum Junction Temperature ......................165°C(Note 7)
Operating Junction Temperature...................-40°C to +150°C
ESD protection on all pins ..........≥ 4 kV HBM and ≥ 200V MM
AC/DC CHARACTERISTICS
Electrical Specifications: Unless otherwise specified, all limits are established for VIN = VR + 1V, Note 1, ILOAD = 1 mA, COUT =
1 µF (X7R), CIN = 1 µF (X7R), TA = 25°C, tr(VIN) = 0.5V/µs, SHDN = VIN, PWRGD = 10K to VOUT.
Boldface type applies for junction temperatures, TJ (Note 7) of -40°C to +125°C.
Parameters
Sym
Min
Typ
Max
Units
Conditions
VIN
3.6
—
16.0
V
VOUT-RANGE
1.8
—
5.5
V
Input Quiescent Current
Iq
—
56
90
µA
IL = 0 mA
Input Quiescent Current
for SHDN mode
ISHDN
—
0.1
5
µA
SHDN = GND
ILOAD = 150 mA
Input / Output Characteristics
Input Operating Voltage
Output Voltage Operating
Range
IGND
—
150
250
µA
Maximum Output Current
IOUT_mA
150
—
—
mA
Output Soft Current Limit
IOUT_CL
—
250
—
mA
VIN = VIN(MIN), VOUT ≥ 0.1V,
Current measured 10 ms after
load is applied
Output Pulse Current Limit
IOUT_CL
—
250
—
mA
Pulse Duration < 100 ms, Duty
Cycle < 50%, VOUT ≥ 0.1V,
Note 6
Output Short Circuit
Foldback Current
IOUT_SC
—
30
—
mA
VIN = VIN(MIN), VOUT = GND
Output Voltage Overshoot
on Startup
VOVER
—
0.5
—
%VOUT
Ground Current
Note 1:
2:
3:
4:
5:
6:
7:
VIN = 0 to 16V, ILOAD = 150 mA
The minimum VIN must meet two conditions: VIN ≥ 3.6V and VIN ≥ VR + VDROPOUT(MAX).
VR is the nominal regulator output voltage when the input voltage VIN = VRated + VDROPOUT(MAX) or ViIN = 3.6V (whichever is greater); IOUT = 1 mA.
TCVOUT = (VOUT-HIGH - VOUT-LOW) *106 / (VR * ΔTemperature), VOUT-HIGH = highest voltage measured over the
temperature range. VOUT-LOW = lowest voltage measured over the temperature range.
Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output
voltage due to heating effects are determined using thermal regulation specification TCVOUT.
Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal VR
measured value. The nominal VR measured value is obtained with
The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air (i.e., TA, TJ, θJA). Exceeding the maximum allowable power
dissipation will cause the device operating junction temperature to exceed the maximum 150°C rating. Sustained
junction temperatures above 150°C can impact the device reliability.
The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the
desired Junction temperature. The test time is small enough such that the rise in the Junction temperature over the
ambient temperature is not significant.
© 2011 Microchip Technology Inc.
DS22276A-page 5
MCP1754/MCP1754S
AC/DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise specified, all limits are established for VIN = VR + 1V, Note 1, ILOAD = 1 mA, COUT =
1 µF (X7R), CIN = 1 µF (X7R), TA = 25°C, tr(VIN) = 0.5V/µs, SHDN = VIN, PWRGD = 10K to VOUT.
Boldface type applies for junction temperatures, TJ (Note 7) of -40°C to +125°C.
Parameters
Sym
Min
Typ
Max
Units
Output Voltage Regulation
VOUT
VR2.0%
VR±0.
2%
VR+2.0
%
V
Note 2
TCVOUT
—
22
ppm/°C
Note 3
Line Regulation
ΔVOUT/
(VOUTXΔVIN)
-0.05
±0.01
Load Regulation
ΔVOUT/VOUT
-1.1
-0.4
0
%
VDROPOUT
—
300
500
mV
IL = 150 mA
IDO
—
50
85
µA
VIN = 0.95VR, IOUT = 0 mA
Undervoltage Lockout
UVLO
—
2.95
—
V
Rising VIN
Undervoltage Lockout
Hysterisis
UVLOHYS
—
285
—
mV
Falling VIN
Logic High Input
VSHDN-HIGH
2.4
—
VIN(MAX)
V
Logic Low Input
VSHDN-LOW
0.0
—
0.8
V
SHDNILK
—
—
0.100
0.500
0.500
2.0
µA
SHDN = GND
SHDN = 16V
PWRGD Input Voltage
Operating Range
VPWRGD_VIN
1.7
—
VIN
V
ISINK = 1 mA
PWRGD Threshold Voltage (Referenced to VOUT)
VPWRGD_TH
90
92
94
%VOUT
Falling Edge of VOUT
PWRGD Threshold
Hysteresis
VPWRGD_HYS
—
2.0
—
%VOUT
Rising Edge of VOUT
PWRGD Output Voltage
Low
VPWRGD_L
—
0.2
0.6
V
PWRGD Output Sink
Current
IPWRGD_L
5.0
—
—
mA
VPWRGD ≤ 0.4V
PWRGD Leakage Current
IPWRGD_LK
—
40
700
nA
VPWRGD Pullup = 10 KΩ to VIN,
VIN = 16V
VOUT Temperature
Coefficient
Dropout Voltage (Note 5)
Dropout Current
+0.05
%/V
Conditions
VR + 1V ≤ VIN ≤ 16V
IL = 1.0 mA to 150 mA, Note 4
Undervoltage Lockout
Shutdown Input
Shutdown Input Leakage
Current
Power Good Output
Note 1:
2:
3:
4:
5:
6:
7:
IPWRGD_SINK = 5.0 mA,
VOUT = 0V
The minimum VIN must meet two conditions: VIN ≥ 3.6V and VIN ≥ VR + VDROPOUT(MAX).
VR is the nominal regulator output voltage when the input voltage VIN = VRated + VDROPOUT(MAX) or ViIN = 3.6V (whichever is greater); IOUT = 1 mA.
TCVOUT = (VOUT-HIGH - VOUT-LOW) *106 / (VR * ΔTemperature), VOUT-HIGH = highest voltage measured over the
temperature range. VOUT-LOW = lowest voltage measured over the temperature range.
Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output
voltage due to heating effects are determined using thermal regulation specification TCVOUT.
Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal VR
measured value. The nominal VR measured value is obtained with
The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air (i.e., TA, TJ, θJA). Exceeding the maximum allowable power
dissipation will cause the device operating junction temperature to exceed the maximum 150°C rating. Sustained
junction temperatures above 150°C can impact the device reliability.
The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the
desired Junction temperature. The test time is small enough such that the rise in the Junction temperature over the
ambient temperature is not significant.
DS22276A-page 6
© 2011 Microchip Technology Inc.
MCP1754/MCP1754S
AC/DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise specified, all limits are established for VIN = VR + 1V, Note 1, ILOAD = 1 mA, COUT =
1 µF (X7R), CIN = 1 µF (X7R), TA = 25°C, tr(VIN) = 0.5V/µs, SHDN = VIN, PWRGD = 10K to VOUT.
Boldface type applies for junction temperatures, TJ (Note 7) of -40°C to +125°C.
Parameters
Sym
Min
Typ
Max
Units
Conditions
PWRGD Time Delay
TPG
—
100
—
µs
Rising Edge of VOUT,
RPULLUP = 10 kΩ
Detect Threshold to
PWRGD Active Time
Delay
TVDET_PWRGD
—
200
—
µs
Falling Edge of VOUT after
Transition from
VOUT = VPRWRGD_TH + 50 mV,
to VPWRGD_TH - 50 mV,
RPULLUP = 10kΩ to VIN
Output Delay From VIN To
VOUT = 90% VREG
TDELAY
—
240
—
µs
VIN = 0V to 16V, VOUT = 90%
VR,
tr (VIN)= 5V/µs,
COUT = 1 µF, SHDN = VIN
Output Delay From VIN To
VOUT > 0.1V
TDELAY_START
—
80
—
µs
VIN = 0V to 16V, VOUT ≥ 0.1V,
tr (VIN)= 5V/µs,
COUT = 1 µF, SHDN = VIN
Output Delay From SHDN
TDELAY_SHDN
—
160
—
µs
VIN = 16V, VOUT = 90% VR,
COUT = 1 µF, SHDN = GND to
VIN
eN
—
3
—
PSRR
—
72
—
dB
VR = 5V, f = 1 kHz, IL =
150 mA,
VINAC = 1V pk-pk, CIN = 0 µF,
VIN = VR + 1.5V
Thermal Shutdown
Temperature
TSD
—
150
—
°C
Note 6
Thermal Shutdown
Hysteresis
ΔTSD
—
10
—
°C
AC Performance
Output Noise
Power Supply Ripple
Rejection Ratio
Note 1:
2:
3:
4:
5:
6:
7:
µV/(Hz)1/2 IL = 50 mA, f = 1 kHz,
COUT = 1 µF
The minimum VIN must meet two conditions: VIN ≥ 3.6V and VIN ≥ VR + VDROPOUT(MAX).
VR is the nominal regulator output voltage when the input voltage VIN = VRated + VDROPOUT(MAX) or ViIN = 3.6V (whichever is greater); IOUT = 1 mA.
TCVOUT = (VOUT-HIGH - VOUT-LOW) *106 / (VR * ΔTemperature), VOUT-HIGH = highest voltage measured over the
temperature range. VOUT-LOW = lowest voltage measured over the temperature range.
Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output
voltage due to heating effects are determined using thermal regulation specification TCVOUT.
Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal VR
measured value. The nominal VR measured value is obtained with
The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air (i.e., TA, TJ, θJA). Exceeding the maximum allowable power
dissipation will cause the device operating junction temperature to exceed the maximum 150°C rating. Sustained
junction temperatures above 150°C can impact the device reliability.
The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the
desired Junction temperature. The test time is small enough such that the rise in the Junction temperature over the
ambient temperature is not significant.
© 2011 Microchip Technology Inc.
DS22276A-page 7
MCP1754/MCP1754S
TEMPERATURE SPECIFICATIONS (Note 1)
Parameters
Sym
Min
TA
Operating Temperature Range
Storage Temperature Range
Thermal Resistance, SOT-223-3
θJA
θJC
—
—
Thermal Resistance, SOT-223-5
θJA
θJC
Thermal Resistance, SOT-23A-3
Typ
Max
Units
-40
+125
°C
TJ
-40
+150
°C
TA
-55
+150
°C
62
15
—
—
°C/W
—
—
62
15
—
—
°C/W
θJA
θJC
—
—
336
110
—
—
°C/W
Thermal Resistance, SOT-89-3
θJA
θJC
—
—
153.3
100
—
—
°C/W
Thermal Resistance, 2X3 DFN
θJA
θJC
—
—
93
26
—
—
°C/W
Conditions
Temperature Ranges
Specified Temperature Range
Thermal Package Resistance
Note 1:
The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air (i.e., TA, TJ, θJA). Exceeding the maximum allowable power
dissipation will cause the device operating junction temperature to exceed the maximum 150°C rating. Sustained
junction temperatures above 150°C can impact the device reliability.
DS22276A-page 8
© 2011 Microchip Technology Inc.
MCP1754/MCP1754S
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note:
Unless otherwise indicated VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 1 mA, TA = +25 °C,
VIN = VR + 1V or VIN = 3.6V (whichever is greater), SHDN = VIN, package = SOT223.
Note:
Junction Temperature (TJ) is approximated by soaking the device under test to an ambient temperature equal to the
desired Junction temperature. The test time is small enough such that the rise in Junction temperature over the ambient
temperature is not significant.
180
+90°C
160
70
+25°C
+130°C
60
-45°C
0°C
50
VOUT = 1.8V
IOUT = 0 µA
GND Current (µA)
Quiescent Current (µA)
80
140
120
VOUT = 5.0V
100
80
VOUT = 3.3V
60
VOUT = 1.8V
40
40
3
4
5
6
7
8
9 10 11 12 13 14 15 16
0
20
40
Input Voltage (V)
FIGURE 2-1:
Voltage.
Quiescent Current vs. Input
FIGURE 2-4:
Current.
+130°C
+90°C
60
55
+25°C
0°C
50
-45°C
45
40
5
7
9
11
13
140
160
VOUT = 1.8V
60
50
40
30
VOUT = 3.3V
20
10
15
-45
-20
Quiescent Current vs. Input
VOUT = 5.0V
IOUT = 0 µA
+130°C
30
55
80
80
50
+25°C
30
105
130
FIGURE 2-5:
Quiescent Current vs.
Junction Temperature.
+90°C
60
40
5
Junction Temperature (°C)
0°C
-45°C
20
10
0
Quiescent Current (µA)
FIGURE 2-2:
Voltage.
Quiescent Current (µA)
120
Ground Current vs. Load
VOUT = 5.0V
70
Input Voltage (V)
70
100
0
3
80
80
80
VOUT = 3.3V
IOUT = 0 µA
Quiescent Current (µA)
Quiescent Current (µA)
70
65
60
Load Current (mA)
VOUT = 5.0V
70
60
50
+25°C
40
30
20
10
0
1.0
3.0
5.0
7.0
9.0
11.0 13.0 15.0 17.0
18
16
Input Voltage (V)
FIGURE 2-3:
Voltage.
Quiescent Current vs. Input
© 2011 Microchip Technology Inc.
14
12
10
8
6
4
2
0
Input Voltage (V)
FIGURE 2-6:
Voltage.
Quiescent Current vs. Input
DS22276A-page 9
MCP1754/MCP1754S
Note:
Unless otherwise indicated VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 1 mA, TA = +25 °C,
VIN = VR + 1V or VIN = 3.6V (whichever is greater), SHDN = VIN, package = SOT223.
1.815
1.814
+25°C
1.812
VOUT = 1.8V
1.810
1.808
+130°C
0°C
1.806
1.804
-45°C
1.802
1.800
1.810
90°C
1.805
0°C
1.800
130°C
-45°C
1.795
1.790
3
4
5
6
7
8
0
9 10 11 12 13 14 15 16
25
50
Input Voltage (V)
75
100
125
150
Load Current (mA)
Output Voltage vs. Input
FIGURE 2-10:
Current.
Output Voltage vs. Load
3.310
3.310
3.308
3.306
3.304
3.302
3.300
3.298
3.296
3.294
3.292
3.290
VOUT = 3.3V
VOUT = 3.3V
Output Voltage (V)
Output Voltage (V)
FIGURE 2-7:
Voltage.
+90°C
+130°C
+25°C
0°C
-45°C
3.305
25°C
90°C
3.300
3.295
3.290
-45°C
0°C
3.285
130°C
3.280
4
5
6
7
8
0
9 10 11 12 13 14 15 16
25
Input Voltage (V)
FIGURE 2-8:
Voltage.
50
75
100
125
150
Load Current (mA)
Output Voltage vs. Input
FIGURE 2-11:
Current.
Output Voltage vs. Load
5.020
5.020
VOUT = 5.0V
+130°C
5.012
+90°C
5.008
-45°C
VOUT = 5.0V
5.015
5.016
Output Voltage (V)
Output Voltage (V)
VOUT = 1.8V
25°C
Output Voltage (V)
Output Voltage (V)
+90°C
+25°C
5.004
130°C
5.010
90°C
5.005
5.000
25°C
4.995
4.990
4.985
0°C
5.000
6
7
-45°C
4.980
8
9
10
11
12
13
14
15
16
0
Input Voltage (V)
FIGURE 2-9:
Voltage.
DS22276A-page 10
Output Voltage vs. Input
25
50
75
100
0°C
125
150
Load Current (mA)
FIGURE 2-12:
Current.
Output Voltage vs. Load
© 2011 Microchip Technology Inc.
MCP1754/MCP1754S
Note:
Unless otherwise indicated VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 1 mA, TA = +25 °C,
VIN = VR + 1V or VIN = 3.6V (whichever is greater), SHDN = VIN, package = SOT223.
0.500
Dropout Voltage (V)
VOUT = 3.3V
0.400
+25°C
+90°C
0.300
+130°C
0.200
0°C
0.100
-45°C
0.000
0
15
30
45
60
75
90 105 120 135 150
Load Current (mA)
Dropout Voltage vs. Load
Dropout Voltage (V)
0.400
VOUT = 3.3V
0.350
+25°C
0.300
+90°C
0.250
-45°C
0.200
0.150
+130°C
0.100
0°C
0.050
FIGURE 2-16:
Short Circuit Current (mA)
FIGURE 2-13:
Current.
Dynamic Line Response.
50
0°C
25°C
90°C
130°C
40
VOUT = 3.3V
30
-45°C
20
10
0
0.000
0
15
30
45
60
75
90 105 120 135 150
4
6
FIGURE 2-14:
Current.
Dropout Voltage vs. Load
FIGURE 2-15:
Dynamic Line Response.
© 2011 Microchip Technology Inc.
8
10
12
14
16
Input Voltage (V)
Load Current (mA)
FIGURE 2-17:
Input Voltage.
Short Circuit Current vs.
DS22276A-page 11
MCP1754/MCP1754S
Unless otherwise indicated VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 1 mA, TA = +25 °C,
VIN = VR + 1V or VIN = 3.6V (whichever is greater), SHDN = VIN, package = SOT223.
0.01
VIN = 3.6V
VIN = 5V
VIN = 16V
VIN = 12V
VIN = 10V
-20
5
FIGURE 2-18:
Temperature.
30
55
80
Temperature (°C)
105
-0.01
50 mA
150 mA
-0.02
-45
VIN = 4.3V
VIN = 5V
-0.40
VIN = 16V
-20
5
FIGURE 2-21:
Temperature.
VIN = 10V
VIN = 12V
-0.80
30
55
80
Temperature (°C)
105
130
Line Regulation vs.
0.01
VOUT=3.3V
0 mA
-1.00
0.00
10 mA
-0.01
50 mA
100 mA
150 mA
-0.02
-0.03
-45
-20
5
FIGURE 2-19:
Temperature.
30
55
80
Temperature (°C)
105
130
Load Regulation vs.
0.00
-45
VIN = 4.3V
VIN = 5V
-0.40
VIN = 16V
VIN = 10V
VIN = 12V
-0.80
-1.00
-45
-20
FIGURE 2-20:
Temperature.
DS22276A-page 12
5
30
55
80
Temperature (°C)
105
Load Regulation vs.
5
130
30
55
Temperature (°C)
80
105
130
Line Regulation vs.
0.01
VOUT=3.3V
Iout = 1 mA to 150 mA
-0.20
-20
FIGURE 2-22:
Temperature.
VOUT=5V
0 mA
Line Regulation (%/V)
Load Regulation (%)
0.00
130
VOUT=3.3V
Iout = 1 mA to 150 mA
-0.20
-0.60
VOUT=1.8V
0 mA
100 mA
Load Regulation vs.
0.00
-0.60
10 mA
-0.03
-45
Load Regulation (%)
VOUT=1.8V
Iout = 1 mA to 150 mA
Line Regulation (%/V)
-0.50
-0.60
-0.70
-0.80
-0.90
-1.00
-1.10
-1.20
-1.30
-1.40
-1.50
Line Regulation (%/V)
Load Regulation (%)
Note:
0.00
10 mA
-0.01
50 mA
150 mA
-0.02
100 mA
-0.03
-45
-20
FIGURE 2-23:
Temperature.
5
30
55
Temperature (°C)
80
105
130
Line Regulation vs.
© 2011 Microchip Technology Inc.
MCP1754/MCP1754S
PSRR (dB)
Note:
Unless otherwise indicated VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 1 mA, TA = +25 °C,
VIN = VR + 1V or VIN = 3.6V (whichever is greater), SHDN = VIN, package = SOT223.
0
-10 VOUT=1.8V
VIN=6.5V
-20 VINAC = 1 V p-p
-30 CIN=0 μF
-40
-50
-60
-70
-80
-90
-100
-110
0.01
0.1
IOUT = 150 mA
IOUT = 10 mA
1
10
Frequency (KHz)
100
1000
PSRR (dB)
FIGURE 2-24:
Power Supply Ripple
Rejection vs. Frequency.
0
VOUT=5.0V
-10
VIN=6.5V
VINAC = 1V p-p
-20
CIN=0 μF
-30
-40
-50
-60
-70
-80
-90
-100
0.01
0.1
FIGURE 2-28:
Startup From Shutdown.
IOUT = 40 mA
1
10
Frequency (KHz)
100
1000
2.00
VOUT=5.0V, VIN=6.0V
IOUT=50mA
Output Voltage (V)
10.000
Noise (μV/√Hz)
Power Up Timing.
IOUT = 160 mA
FIGURE 2-25:
Power Supply Ripple
Rejection vs. Frequency.
1.000
0.100
FIGURE 2-27:
VOUT=3.3V, VIN=4.3V
VOUT=1.8V, VIN=3.6V
0.010
0.001
0.01
1.75
1.50
VIN = 3.6V
VOUT = 1.8V
1.25
1.00
0.75
Increasing Load
0.50
Decreasing Load
0.25
0.1
1
10
Frequency (KHz)
100
1000
FIGURE 2-26:
Output Noise vs. Frequency
(3 lines, VR = 1.2V, 3.3V, 5.0V).
© 2011 Microchip Technology Inc.
0.00
0.00
0.05
FIGURE 2-29:
Foldback.
0.10 0.15 0.20
Output Current (A)
0.25
0.30
Short Circuit Current
DS22276A-page 13
MCP1754/MCP1754S
Note:
Unless otherwise indicated VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 1 mA, TA = +25 °C,
VIN = VR + 1V or VIN = 3.6V (whichever is greater), SHDN = VIN, package = SOT223.
Output Voltage (V)
3.5
3.0
2.5
VIN = 4.3V
VOUT = 3.3V
2.0
1.5
1.0
Increasing Load
Decreasing Load
0.5
0.0
0.00
0.05
Output Voltage (V)
FIGURE 2-30:
Foldback.
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0.00
0.10 0.15 0.20
Output Current (A)
0.25
0.30
Short Circuit Current
FIGURE 2-32:
Dynamic Load Response.
FIGURE 2-33:
Dynamic Load Response.
VIN = 6V
VOUT = 5V
Increasing Load
Decreasing Load
0.05
FIGURE 2-31:
Foldback.
DS22276A-page 14
0.10 0.15 0.20
Output Current (A)
0.25
Short Circuit Current
0.30
© 2011 Microchip Technology Inc.
MCP1754/MCP1754S
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1 and Table 3-2.
TABLE 3-1:
MCP1754 PIN FUNCTION TABLE
Pin No.
SOT223-5
Pin No.
SOT23-5
Pin No.
2X3 DFN
3
2
4
GND
Ground Terminal
4
5
1
VOUT
Regulated Voltage Output
Name
Function
2
1
8
VIN
Unregulated Supply Voltage
—
—
3,6,7
NC
No Connection
5
4
2
PWRGD
1
3
5
SHDN
EP
—
EP
GND
TABLE 3-2:
Open Drain Power Good Output
Shutdown Input
Exposed Pad, Connected to GND
MCP1754S PIN FUNCTION TABLE
Pin No.
SOT223-3
Pin No.
SOT23A
Pin No.
SOT89
2
1
2
4
GND
Ground Terminal
3
2
3
1
VOUT
Regulated Voltage Output
3.1
Pin No.
2X3 DFN
Function
1
3
1
8
VIN
Unregulated Supply Voltage
—
—
—
2,3,5,6,7
NC
No Connection
EP
—
EP
EP
GND
Ground Terminal (GND)
Regulator ground. Tie GND to the negative side of the
output and the negative side of the input capacitor.
Only the LDO bias current flows out of this pin; there is
no high current. The LDO output regulation is
referenced to this pin. Minimize voltage drops between
this pin and the negative side of the load.
3.2
Name
Regulated Output Voltage (VOUT)
Connect VOUT to the positive side of the load and the
positive terminal of the output capacitor. The positive
side of the output capacitor should be physically
located as close to the LDO VOUT pin as is practical.
The current flowing out of this pin is equal to the DC
load current.
© 2011 Microchip Technology Inc.
3.3
Exposed Pad, Connected to GND
Unregulated Input Voltage (VIN)
Connect VIN to the input unregulated source voltage.
Like all low dropout linear regulators, low source
impedance is necessary for the stable operation of the
LDO. The amount of capacitance required to ensure
low source impedance will depend on the proximity of
the input source capacitors or battery type. For most
applications, 1 µF of capacitance will ensure stable
operation of the LDO circuit. The input capacitor should
have a capacitance value equal to or larger than the
output capacitor for performance applications. The
input capacitor will supply the load current during
transients and improve performance. For applications
that have load currents below 10 mA, the input
capacitance requirement can be lowered. The type of
capacitor used may be ceramic, tantalum or aluminum
electrolytic. The low ESR characteristics of the ceramic
will yield better noise and PSRR performance at highfrequency.
DS22276A-page 15
MCP1754/MCP1754S
3.4
Shutdown Input (SHDN)
The SHDN input is used to turn the LDO output voltage
on and off. When the SHDN input is at a logic-high
level, the LDO output voltage is enabled. When the
SHDN input is pulled to a logic-low level, the LDO
output voltage is disabled. When the SHDN input is
pulled low, the PWRGD output also goes low and the
LDO enters a low quiescent current shutdown state.
3.5
3.6
Exposed Pad (EP)
Some of the packages have an exposed metal pad on
the bottom of the package. The exposed metal pad
gives the device better thermal characteristics by
providing a good thermal path to either the PCB or heat
sink to remove heat from the device. The exposed pad
of the package is internally connected to GND.
Power Good Output (PWRGD)
For fixed applications, the PWRGD output is an opendrain output used to indicate when the LDO output
voltage is within 92% (typically) of its nominal
regulation value. The PWRGD threshold has a typical
hysteresis value of 2%. The PWRGD output is delayed
by 100 µs (typical) from the time the LDO output is
within 92% + 2% (typical hysteresis) of the regulated
output value on power-up. This delay time is internally
fixed. The PWRGD pin may be pulled up to VIN or
VOUT. Pulling up to VOUT conserves power when the
device is in shutdown (/SHDN = 0V) mode.
DS22276A-page 16
© 2011 Microchip Technology Inc.
MCP1754/MCP1754S
4.0
DEVICE OVERVIEW
MCP1754S will supply higher load currents of up to
typically 250 mA. This allows for device usage in
applications that have pulsed load currents having an
average output current value of 150 mA or less.
The MCP1754/MCP1754S is a 150 mA output current,
Low Dropout (LDO) voltage regulator. The low dropout
voltage of 300 mV typical at 150 mA of current makes
it ideal for battery-powered applications. The input
voltage range is 3.6V to 16.0V. Unlike other high output
current LDOs, the MCP1754/MCP1754S typically
draws only 150 µA of quiescent current for a 150 mA
load. The MCP1754 adds a shutdown control input pin
and a power good output pin. The output voltage
options are fixed.
4.1
Output overload conditions may also result in an overtemperature shutdown of the device. If the junction
temperature rises above 150°C (typical), the LDO will
shut
down
the
output.
See
Section 4.8
“Overtemperature Protection” for more information
on overtemperature shutdown.
4.3
LDO Output Voltage
The MCP1754/MCP1754S requires a minimum output
capacitance of 1 µF for output voltage stability. Ceramic
capacitors are recommended because of their size,
cost and environmentally robust qualities.
The MCP1754/MCP1754S LDO has a fixed output
voltage. The output voltage range is 1.8V to 5.5V.
4.2
Output Capacitor
Aluminum-electrolytic and tantalum capacitors can be
used on the LDO output as well. The Equivalent Series
Resistance (ESR) of the electrolytic output capacitor
should be no greater than 2.0 Ω. The output capacitor
should be located as close to the LDO output as is
practical. Ceramic materials X7R and X5R have low
temperature coefficients and are well within the
acceptable ESR range required. A typical 1 µF X7R
0805 capacitor has an ESR of 50 milliohms.
Output Current and Current
Limiting
The MCP1754/MCP1754S LDO is tested and ensured
to supply a minimum of 150 mA of output current. The
MCP1754/MCP1754S has no minimum output load, so
the output load current can go to 0 mA and the LDO will
continue to regulate the output voltage to within
tolerance.
Larger LDO output capacitors can be used with the
MCP1754/MCP1754S
to
improve
dynamic
performance and power supply ripple rejection
performance.
A
maximum
of
1000 µF
is
recommended. Aluminum-electrolytic capacitors are
not recommended for low temperature applications of
< -25°C.
The MCP1754/MCP1754S also incorporates a true
output current foldback. If the output load presents an
excessive load due to a low impedance short circuit
condition, the output current and voltage will fold back
towards 30 mA and 0V respectively.
The output voltage and current will resume normal
levels when the excessive load is removed. If the
overload condition is a soft overload, the MCP1754/
Typical Current FoldBack - 5V Output
Increasing Load
Decreasing Load
6
VOUT (V)
5
4
3
2
1
0
0.000
0.050
0.100
0.150
0.200
0.250
IOUT (A)
FIGURE 4-1:
Typical Current Foldback.
© 2011 Microchip Technology Inc.
DS22276A-page 17
MCP1754/MCP1754S
4.4
Input Capacitor
Low input source impedance is necessary for the LDO
output to operate properly. When operating from
batteries, or in applications with long lead length
(> 10 inches) between the input source and the LDO,
some input capacitance is recommended. A minimum
of 1.0 µF to 4.7 µF is recommended for most
applications.
For applications that have output step load
requirements, the input capacitance of the LDO is very
important. The input capacitance provides the LDO
with a good local low-impedance source to pull the
transient currents from in order to respond quickly to
the output load step. For good step response
performance, the input capacitor should be of
equivalent or higher value than the output capacitor.
The capacitor should be placed as close to the input of
the LDO as is practical. Larger input capacitors will also
help reduce any high-frequency noise on the input and
output of the LDO and reduce the effects of any
inductance that exists between the input source
voltage and the input capacitance of the LDO.
4.5
Power Good Output (PWRGD)
The open drain PWRGD output is used to indicate
when the output voltage of the LDO is within 94%
(typical
value,
see
Section 1.0
“Electrical
Characteristics” for minimum and maximum
specifications) of its nominal regulation value.
As the output voltage of the LDO rises, the open drain
PWRGD output will actively be held low until the output
voltage has exceeded the power good threshold plus
the hysteresis value. Once this threshold has been
exceeded, the power good time delay is started (shown
as TPG in the Electrical Characteristics table). The
power good time delay is fixed at 100 µs (typical). After
the time delay period, the PWRGD open drain output
becomes inactive and may be pulled high by an
external pullup resistor, indicating that the output
voltage is stable and within regulation limits. The power
good output is typically pulled up to VIN or VOUT. Pulling
the signal up to VOUT conserves power during
shutdown mode.
If the output voltage of the LDO falls below the power
good threshold, the power good output will transition
low. The power good circuitry has a 200 µs delay when
detecting a falling output voltage, which helps to
increase noise immunity of the power good output and
avoid false triggering of the power good output during
fast output transients. See Figure 4-2 for power good
timing characteristics.
When the LDO is put into Shutdown mode using the
SHDN input, the power good output is pulled low
immediately, indicating that the output voltage will be
DS22276A-page 18
out of regulation. The timing diagram for the power
good output when using the shutdown input is shown in
Figure 4-3.
The power good output is an open-drain output that can
be pulled up to any voltage that is equal to or less than
the LDO input voltage. This output is capable of sinking
1.2 mA minimum (VPWRGD < 0.4V maximum).
VPWRGD_TH
VOUT
TPG
VOH
TVDET_PWRGD
PWRGD
VOL
FIGURE 4-2:
VIN
Power Good Timing.
TDELAY_SHDN
TPG
SHDN
VOUT
PWRGD
FIGURE 4-3:
Shutdown.
4.6
Power Good Timing from
Shutdown Input (SHDN)
The SHDN input is an active-low input signal that turns
the LDO on and off. The SHDN threshold is a fixed
voltage level. The minimum value of this shutdown
threshold required to turn the output ON is 2.4V. The
maximum value required to turn the output OFF is 0.8V.
© 2011 Microchip Technology Inc.
MCP1754/MCP1754S
The SHDN input will ignore low-going pulses (pulses
meant to shut down the LDO) that are up to 400 ns in
pulse width. If the shutdown input is pulled low for more
than 400 ns, the LDO will enter Shutdown mode. This
small bit of filtering helps to reject any system noise
spikes on the shutdown input signal.
On the rising edge of the SHDN input, the shutdown
circuitry has a 30 µs delay before allowing the LDO
output to turn on. This delay helps to reject any false
turn-on signals or noise on the SHDN input signal. After
the 30 µs delay, the LDO output enters its soft-start
period as it rises from 0V to its final regulation value. If
the SHDN input signal is pulled low during the 30 µs
delay period, the timer will be reset and the delay time
will start over again on the next rising edge of the
SHDN input. The total time from the SHDN input going
high (turn-on) to the LDO output being in regulation is
typically 100 µs. See Figure 4-4 for a timing diagram of
the SHDN input.
TDELAY_SHDN
400 ns (typ)
30 µs
70 µs
For high-current applications, voltage drops across the
PCB traces must be taken into account. The trace
resistances can cause significant voltage drops
between the input voltage source and the LDO. For
applications with input voltages near 3.0V, these PCB
trace voltage drops can sometimes lower the input
voltage enough to trigger a shutdown due to
undervoltage lockout.
4.8
Overtemperature Protection
The MCP1754/MCP1754S LDO has temperaturesensing circuitry to prevent the junction temperature
from exceeding approximately 150°C. If the LDO
junction temperature does reach 150°C, the LDO
output will be turned off until the junction temperature
cools to approximately 137°C, at which point the LDO
output will automatically resume normal operation. If
the internal power dissipation continues to be
excessive, the device will again shut off. The junction
temperature of the die is a function of power
dissipation, ambient temperature and package thermal
resistance. See Section 5.0 “Application Circuits &
Issues” for more information on LDO power
dissipation and junction temperature.
SHDN
VOUT
FIGURE 4-4:
Diagram.
4.7
Shutdown Input Timing
Dropout Voltage and Undervoltage
Lockout
Dropout voltage is defined as the input-to-output
voltage differential at which the output voltage drops
2% below the nominal value that was measured with a
VR + 1.0V differential applied. The MCP1754/
MCP1754S LDO has a very low dropout voltage
specification of 300 mV (typical) at 150 mA of output
current. See Section 1.0 “Electrical Characteristics”
for maximum dropout voltage specifications.
The MCP1754/MCP1754S LDO operates across an
input voltage range of 3.6V to 16.0V and incorporates
input Undervoltage Lockout (UVLO) circuitry that keeps
the LDO output voltage off until the input voltage
reaches a minimum of 2.95V (typical) on the rising
edge of the input voltage. As the input voltage falls, the
LDO output will remain on until the input voltage level
reaches 2.70V (typical).
© 2011 Microchip Technology Inc.
DS22276A-page 19
MCP1754/MCP1754S
NOTES:
DS22276A-page 20
© 2011 Microchip Technology Inc.
MCP1754/MCP1754S
5.0
APPLICATION CIRCUITS &
ISSUES
5.1
The MCP1754/MCP1754S is most commonly used as
a voltage regulator. It’s low quiescent current and low
dropout voltage make it ideal for many battery-powered
applications.
MCP1754S
VOUT
1.8V
VIN
3.6V to 4.8V
VIN
VOUT
IOUT
50 mA
T J ( MAX ) = P TOTAL × Rθ JA + T AMAX
TJ(MAX) = Maximum continuous junction
temperature
Typical Application
GND
EQUATION
COUT
1 µF Ceramic
CIN
1 µF Ceramic
PTOTAL = Total device power dissipation
RθJA = Thermal resistance from junction to ambient
TAMAX = Maximum ambient temperature
The maximum power dissipation capability for a
package can be calculated given the junction-toambient thermal resistance and the maximum ambient
temperature for the application. The following equation
can be used to determine the package maximum
internal power dissipation.
EQUATION
FIGURE 5-1:
5.1.1
Typical Application Circuit.
APPLICATION INPUT CONDITIONS
Package Type = SOT23
Input Voltage Range = 3.6V to 4.8V
VIN maximum = 4.8V
VOUT typical = 1.8V
IOUT = 50 mA maximum
5.2
Power Calculations
5.2.1
POWER DISSIPATION
The internal power dissipation of the MCP1754/
MCP1754S is a function of input voltage, output
voltage and output current. The power dissipation, as
a result of the quiescent current draw, is so low, it is
insignificant (56.0 µA x VIN). The following equation
can be used to calculate the internal power dissipation
of the LDO.
( T J ( MAX ) – T A ( MAX ) )
P D ( MAX ) = --------------------------------------------------Rθ JA
PD(MAX) = Maximum device power dissipation
TJ(MAX) = Maximum continuous junction
temperature
TA(MAX) = Maximum ambient temperature
RθJA = Thermal resistance from junction to ambient
EQUATION
T J ( RISE ) = P D ( MAX ) × Rθ JA
TJ(RISE) = Rise in device junction temperature over
the ambient temperature
PD(MAX) = Maximum device power dissipation
RθJA = Thermal resistance from junction to ambient
EQUATION
EQUATION
P LDO = ( VIN ( MAX ) ) – V OUT ( MIN ) ) × I OUT ( MAX ) )
T J = T J ( RISE ) + T A
TJ = Junction Temperature
PLDO = LDO Pass device internal power dissipation
TJ(RISE) = Rise in device junction temperature over
the ambient temperature
VIN(MAX) = Maximum input voltage
TA = Ambient temperature
VOUT(MIN) = LDO minimum output voltage
The maximum continuous operating junction
temperature specified for the MCP1754/MCP1754S is
+150°C. To estimate the internal junction temperature
of the MCP1754/MCP1754S, the total internal power
dissipation is multiplied by the thermal resistance from
junction to ambient (RθJA). The thermal resistance from
junction to ambient for the SOT23A pin package is
estimated at 336 °C/W.
© 2011 Microchip Technology Inc.
DS22276A-page 21
MCP1754/MCP1754S
5.3
Voltage Regulator
Internal power dissipation, junction temperature rise,
junction temperature and maximum power dissipation
are calculated in the following example. The power
dissipation, as a result of ground current, is small
enough to be neglected.
5.3.1
TJ = TJRISE + TA(MAX)
TJ = 91.3°C
Maximum Package Power Dissipation Examples at
+40°C Ambient Temperature
SOT23 (336.0°C/Watt = RθJA)
PD(MAX) = (125°C - 40°C) / 336°C/W
POWER DISSIPATION EXAMPLE
Package
Package Type = SOT23
PD(MAX) = 253 milliwatts
SOT89 (153.3°C/Watt = RθJA)
PD(MAX) = (125°C - 40°C) / 153.3°C/W
Input Voltage
PD(MAX) = 554 milliwatts
VIN = 3.6V to 4.8V
LDO Output Voltages and Currents
VOUT = 1.8V
IOUT = 50 mA
Maximum Ambient Temperature
TA(MAX) = +40°C
Internal Power Dissipation
Internal Power dissipation is the product of the LDO
output current times the voltage across the LDO
(VIN to VOUT).
PLDO(MAX) = (VIN(MAX) - VOUT(MIN)) x IOUT(MAX)
PLDO = (4.8V - (0.97 x 1.8V)) x 50 mA
PLDO = 152.7 milli-Watts
5.4
Voltage Reference
The MCP1754/MCP1754S can be used not only as a
regulator, but also as a low quiescent current voltage
reference. In many microcontroller applications, the
initial accuracy of the reference can be calibrated using
production test equipment or by using a ratio
measurement. When the initial accuracy is calibrated,
the thermal stability and line regulation tolerance are
the only errors introduced by the MCP1754/
MCP1754S LDO. The low cost, low quiescent current
and small ceramic output capacitor are all advantages
when using the MCP1754/MCP1754S as a voltage
reference.
Ratio Metric Reference
Device Junction Temperature Rise
The internal junction temperature rise is a function of
internal power dissipation and the thermal resistance
from junction to ambient for the application. The thermal
resistance from junction to ambient (RθJA) is derived
from an EIA/JEDEC standard for measuring thermal
resistance for small surface mount packages. The EIA/
JEDEC specification is JESD51-7, “High Effective
Thermal Conductivity Test Board for Leaded Surface
Mount Packages”. The standard describes the test
method and board specifications for measuring the
thermal resistance from junction to ambient. The actual
thermal resistance for a particular application can vary
depending on many factors, such as copper area and
thickness. Refer to AN792, “A Method to Determine
How Much Power a SOT23 Can Dissipate in an
Application”, (DS00792), for more information regarding
this subject.
TJ(RISE) = PTOTAL x RqJA
TJRISE = 152.7 milliwatts x 336.0°C/Watt
TJRISE = 51.3°C
Junction Temperature Estimate
To estimate the internal junction temperature, the
calculated temperature rise is added to the ambient or
offset temperature. For this example, the worst-case
junction temperature is estimated below.
DS22276A-page 22
MCP1754S
PICmicro®
microcontroller
56 µA Bias
CIN
1 µF
VIN
VOUT
GND
COUT
1 µF
VREF
ADO
AD1
Bridge Sensor
FIGURE 5-2: Using the MCP1754/MCP1754S
as a Voltage Reference.
5.5
Pulsed Load Applications
For some applications, there are pulsed load current
events that may exceed the specified 150 mA
maximum specification of the MCP1754/MCP1754S.
The internal current limit of the MCP1754/MCP1754S
will prevent high peak load demands from causing nonrecoverable damage. The 150 mA rating is a maximum
average continuous rating. As long as the average
current does not exceed 150 mA, pulsed higher load
currents can be applied to the MCP1754/MCP1754S.
The typical current limit for the MCP1754/MCP1754S is
250 mA (TA +25°C).
© 2011 Microchip Technology Inc.
MCP1754/MCP1754S
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
Example:
3-Lead SOT-223 (MCP1754S)
XXXXXXX
Part Number
XXXYYWW
NNN
Code
1754S18
MCP1754ST-3302E/DB
1754S33
MCP1754ST-5002E/DB
1754S50
EDB1130
256
3-Lead SOT-23A (MCP1754S)
XXNN
Example:
Part Number
Code
MCP1754ST-1802E/CB JCNN
JC25
MCP1754ST-3302E/CB JDNN
MCP1754ST-5002E/CB JENN
3-Lead SOT-89 (MCP1754S)
Example:
Part Number
Code
MT1130
MCP1754ST-1802E/MB MTYYWW
NNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
MCP1754ST-3302E/MB MUYYWW
256
MCP1754ST-5002E/MB MVYYWW
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3)
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available characters
for customer-specific information.
© 2011 Microchip Technology Inc.
DS22276A-page 23
MCP1754/MCP1754S
Package Marking Information (Continued)
Example:
5-Lead SOT-23 (2x3) (MCP1754)
Part Number
XXNN
Code
MCP1754T-1802E/OT
YQNN
MCP1754T-3302E/OT
YRNN
MCP1754T-5002E/OT
YSNN
YQ25
5-Lead SOT-223 (MCP1754)
Example:
XXXXXXX
Part Number
XXXYYWW
NNN
Code
MCP1754T-1802E/DC
175418
MCP1754T-3302E/DC
175433
MCP1754T-5002E/DC
175450
175418
EDC1130
256
Example:
8-Lead DFN (2x3) (MCP1754)
Part Number
Code
Part Number
Code
MCP1754-1802E/MC
AKG MCP1754S-1802E/MC
ALN
MCP1754-3302E/MC
AKH MCP1754S-3302E/MC
ALM
MCP1754-5002E/MC
AKJ MCP1754S-5002E/MC
ALL
MCP1754T-1802E/MC AKG MCP1754ST-1802E/MC ALN
AKJ
130
25
MCP1754T-3302E/MC AKH MCP1754ST-3302E/MC ALM
MCP1754T-5002E/MC AKJ MCP1754ST-5002E/MC ALL
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS22276A-page 24
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3)
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available characters
for customer-specific information.
© 2011 Microchip Technology Inc.
MCP1754/MCP1754S
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DS22276A-page 25
MCP1754/MCP1754S
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DS22276A-page 27
MCP1754/MCP1754S
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22276A-page 28
© 2011 Microchip Technology Inc.
MCP1754/MCP1754S
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DS22276A-page 29
MCP1754/MCP1754S
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22276A-page 30
© 2011 Microchip Technology Inc.
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DS22276A-page 31
MCP1754/MCP1754S
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22276A-page 32
© 2011 Microchip Technology Inc.
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DS22276A-page 35
MCP1754/MCP1754S
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22276A-page 36
© 2011 Microchip Technology Inc.
MCP1754/MCP1754S
APPENDIX A:
REVISION HISTORY
Revision A (August 2011)
• Original data sheet for the MCP1754/MCP1754S
family of devices.
© 2011 Microchip Technology Inc.
DS22276A-page 37
MCP1754/MCP1754S
NOTES:
DS22276A-page 38
© 2011 Microchip Technology Inc.
MCP1754/MCP1754S
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
X-
X
XX
X
X/
XX
Examples:
a) MCP1754T-1802E/DC:
Device
Tape
and Reel
Output Feature
Voltage Code
Tolerance Temp. Package
b) MCP1754T-3302E/DC:
c) MCP1754T-5002E/DC:
MCP1754:
MCP1754T:
MCP1754S:
MCP1754ST:
150 mA, 16V High Performance LDO
150 mA, 16V High Performance LDO
(Tape and Reel) (SOT)
150 mA, 16V High Performance LDO
150 mA, 16V High Performance LDO
(Tape and Reel) (SOT)
Tape and Reel:
T
= Tape and Reel
Output Voltage*:
18
= 1.8V “Standard”
33
= 3.3V “Standard”
50
= 5.0V “Standard”
*Contact factory for other voltage options
a) MCP1754T-1802E/CB:
1.8V, 3LD SOT-23A,
Tape and Reel
b) MCP1754T-3302E/CB: 3.3V, 3LD SOT-23A,
Tape and Reel
c) MCP1754T-5002E/CB: 5.0V, 3LD SOT-23A,
Tape and Reel
a) MCP1754T-1802E/MB:
1.8V, 3LD SOT-89,
Tape and Reel
b) MCP1754T-3302E/MB: 3.3V, 3LD SOT-89,
Tape and Reel
c) MCP1754T-5002E/MB: 5.0V, 3LD SOT-89,
Tape and Reel
a) MCP1754T-1802E/OT:
b) MCP1754T-3302E/OT:
Extra Feature Code:
0
= Fixed
Tolerance:
2
= 2% (Standard)
1.8V, 5LD SOT-223,
Tape and Reel
3.3V, 5LD SOT-223,
Tape and Reel
5.0V, 5LD SOT-223,
Tape and Reel
c) MCP1754T-5002E/OT:
1.8V, 5LD SOT-23,
Tape and Reel
3.3V, 5LD SOT-23,
Tape and Reel
5.0V, 5LD SOT-23,
Tape and Reel
a) MCP1754T-1802E/MC:
Temperature Range:
E
Package:
*DB
CB
MB
DC
OT
MC
= -40°C to +125°C
=
=
=
=
=
=
Plastic Small Outline, (SOT-223), 3-lead
Plastic Small Outline, (SOT-23A), 3-lead
Plastic Small Outline, (SOT-89), 3-lead
Plastic Small Outline, (SOT223), 5-lead
Plastic Small Outline, (SOT-23), 5-lead
Plastic Dual Flat, No Lead, (2x3 DFN), 8-lead
*Note: The 3-lead SOT-223 (DB) is not a standard package
for output voltages below 3.0V
© 2011 Microchip Technology Inc.
1.8V, 8LD DFN,
Tape and Reel
b) MCP1754T-3302E/MC: 3.3V, 8LD DFN,
Tape and Reel
c) MCP1754T-5002E/MC: 5.0V, 8LD DFN,
Tape and Reel
a) MCP1754ST-1802E/MC: 1.8V, 8LD DFN,
Tape and Reel
b) MCP1754ST-3302E/MC: 3.3V, 8LD DFN,
Tape and Reel
c) MCP1754ST-5002E/MC: 5.0V, 8LD DFN,
Tape and Reel
a) MCP1754ST-3302E/DB: 3.3V, 3LD SOT-223,
Tape and Reel
b) MCP1754ST-5002E/DB: 5.0V, 3LD SOT-223,
Tape and Reel
DS22276A-page 39
MCP1754/MCP1754S
NOTES:
DS22276A-page 40
© 2011 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
PIC32 logo, rfPIC and UNI/O are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, chipKIT,
chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net,
dsPICworks, dsSPEAK, ECAN, ECONOMONITOR,
FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP,
Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB,
MPLINK, mTouch, Omniscient Code Generation, PICC,
PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE,
rfLAB, Select Mode, Total Endurance, TSHARC,
UniWinDriver, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2011, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-61341-570-2
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2011 Microchip Technology Inc.
DS22276A-page 41
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
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DS22276A-page 42
Korea - Daegu
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08/02/11
© 2011 Microchip Technology Inc.