MCP73833/4 Stand-Alone Linear Li-Ion / Li-Polymer Charge Management Controller Features Description • Complete Linear Charge Management Controller - Integrated Pass Transistor - Integrated Current Sense - Integrated Reverse Discharge Protection • Constant Current / Constant Voltage Operation with Thermal Regulation • High Accuracy Preset Voltage Regulation: - 4.2V, 4.35V, 4.4V, or 4.5V, + 0.75% • Programmable Charge Current: 1A Maximum • Preconditioning of Deeply Depleted Cells - Selectable Current Ratio - Selectable Voltage Threshold • Automatic End-of-Charge Control - Selectable Current Threshold - Selectable Safety Time Period • Automatic Recharge The MCP73833/4 is a highly advanced linear charge management controller for use in space-limited, cost sensitive applications. The MCP73833/4 is available in a 10-Lead, 3mm x 3mm DFN package or a 10-Lead, MSOP package. Along with its small physical size, the low number of external components required makes the MCP73833/4 ideally suited for portable applications. For applications charging from a USB port, the MCP73833/4 can adhere to all the specifications governing the USB power bus. - Selectable Voltage Threshold • • • • Two Charge Status Outputs Cell Temperature Monitor Low-Dropout Linear Regulator Mode Automatic Power-Down when Input Power Removed • Under Voltage Lockout • Numerous Selectable Options Available for a Variety of Applications: - Refer to Section 1.0 “Electrical Characteristics” for Selectable Options - Refer to the ”Product Identification System” for Standard Options • Available Packages: - 3mm x 3mm DFN-10 - MSOP-10 The MCP73833/4 employs a constant current/constant voltage charge algorithm with selectable preconditioning and charge termination. The constant voltage regulation is fixed with four available options: 4.20V, 4.35V, 4.40V, or 4.50V, to accomodate new, emerging battery charging requirements. The constant current value is set with one external resistor. The MCP73833/4 limits the charge current based on die temperature during high power or high ambient conditions. This thermal regulation optimizes the charge cycle time while maintaining device reliability. Several options are available for the preconditioning threshold, preconditioning current value, charge termination value, and automatic recharge threshold. The preconditioning value and charge termination value are set as a ratio, or percentage, of the programmed constant current value. Preconditioning can be set to 100%. Refer to Section 1.0 “Electrical Characteristics” for available options and the “Product Indentification System” for standard options. The MCP73833/4 is fully specified over the ambient temperature range of -40°C to +85°C. Package Types DFN-10 Applications • • • • • • • Lithium-Ion / Lithium-Polymer Battery Chargers Personal Data Assistants Cellular Telephones Digital Cameras MP3 Players Bluetooth Headsets USB Chargers © 2006 Microchip Technology Inc. VDD 1 VDD 2 STAT1 3 STAT2 4 VSS 5 MSOP-10 10 VBAT 9 VBAT 8 THERM 7 PG(TE) 6 PROG VDD 1 10 VBAT VDD 2 9 VBAT STAT1 3 8 THERM STAT2 4 7 PG(TE) VSS 5 6 PROG DS22005A-page 1 MCP73833/4 Typical Application 1A Li-Ion Battery Charger 1,2 V DD VIN VBAT 9,10 1 µF 1 µF 3 470Ω 4 470Ω 470Ω STAT1 THERM STAT2 7 PG PROG VSS + Single - Li-Ion Cell 8 6 5 1 kΩ T 10 kΩ MCP73833 Functional Block Diagram VDD Direction Control 10 µA VBAT 6 µA CURRENT + LIMIT - G=0.001 1 kΩ G=0.001 PROG Reference Generator + - 111 kΩ VREF (1.21V) 310 kΩ 72.7 kΩ CA 10 kΩ + - PRECONDITION 470.6 kΩ 6 µA + - 6 kΩ + - 48 kΩ TERMINATIO N CHARG E + - 157.3 kΩ VA 50 µA + - 175 kΩ + - 54 kΩ VSS + - 121 kΩ 470.6kΩ THERM + + - 1 MΩ DS22005A-page 2 SHDN LDO UVLO Charge Control, Timer, and Status Logic STAT1 STAT2 PG (TE) HTVT LTVT 121 kΩ © 2006 Microchip Technology Inc. MCP73833/4 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings VDD........................................................................ 7.0V All Inputs and Outputs w.r.t. VSS .....-0.3 to (VDD+0.3)V *Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Maximum Junction Temperature, TJ . Internally Limited Storage temperature .......................... -65°C to +150°C ESD protection on all pins: Human Body Model (HBM) (1.5 kΩ in Series with 100 pF)............................... ≥ 4 kV Machine Model (MM) (200 pF, No Series Resistance) ........................... 300V DC CHARACTERISTICS Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typ)+0.3V] to 6V, TA=-40°C to 85°C. Typical values are at +25°C, VDD= [VREG(Typ)+1.0V] Parameters Sym Min Typ Max Units Conditions Supply Input Supply Voltage Supply Current VDD ISS 3.75 — 6 V Charging VREG(Typ) +0.3V — 6 V Charge Complete, Standby — 2000 3000 µA Charging — 150 300 µA Charge Complete — 100 300 µA Standby (No Battery or PROG Floating) — 50 100 µA Shutdown (VDD < VBAT, or VDD < VSTOP) UVLO Start Threshold VSTART 3.4 3.55 3.7 V VDD Low to High UVLO Stop Threshold VSTOP 3.3 3.45 3.6 V VDD High to Low UVLO Hysteresis VHYS — 100 — mV 4.168 4.20 4.232 V VDD=[VREG(Typ)+1V] 4.318 4.35 4.382 V IOUT=10 mA TA=-5°C to +55°C Voltage Regulation (Constant Voltage Mode, System Test Mode) Regulated Output Voltage VREG 4.367 4.40 4.433 V 4.467 4.50 4.533 V Line Regulation |(ΔVBAT/VBAT) /ΔVDD| — 0.10 0.30 %/V Load Regulation |ΔVBAT/ VBAT| — 0.10 0.30 % IOUT=10 mA to 100 mA VDD=[VREG(Typ)+1V] PSRR — 58 — dB IOUT=10 mA, 10Hz to 1 kHz — 47 — dB IOUT=10 mA, 10Hz to 10 kHz — 25 — dB IOUT=10 mA, 10Hz to 1 MHz PROG = 10 kΩ Supply Ripple Attenuation VDD=[VREG(Typ)+1V] to 6V IOUT=10 mA Current Regulation (Fast Charge Constant Current Mode) Fast Charge Current Regulation IREG 90 100 110 mA 900 1000 1100 mA PROG = 1.0 kΩ TA=-5°C to +55°C Maximum Output Current Limit © 2006 Microchip Technology Inc. IMAX — 1200 — mA PROG < 833Ω DS22005A-page 3 MCP73833/4 DC CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typ)+0.3V] to 6V, TA=-40°C to 85°C. Typical values are at +25°C, VDD= [VREG(Typ)+1.0V] Parameters Sym Min Typ Max Units Conditions Preconditioning Current Regulation (Trickle Charge Constant Current Mode) Precondition Current Ratio Precondition Voltage Threshold Ratio IPREG / IREG VPTH / VREG 7.5 10 12.5 % PROG = 1.0 kΩ to 10 kΩ 15 20 25 % TA=-5°C to +55°C 30 40 50 % — 100 — % 64 66.5 70 % VBAT Low to High 69 71.5 75 % VPHYS — 100 — mV ITERM / IREG 3.75 5 6.25 % PROG = 1.0 kΩ to 10 kΩ TA=-5°C to +55°C Precondition Hysteresis VBAT High to Low Charge Termination Charge Termination Current Ratio 5.6 7.5 9.4 % 7.5 10 12.5 % 15 20 25 % — 94.0 — % — 96.5 — % RDSON — 300 — mΩ VDD = 3.75V TJ = 105°C IDISCHARGE — 0.15 2 µA PROG Floating — 0.25 2 µA VDD < VBAT — 0.15 2 µA VDD < VSTOP — -5.5 -15 µA Charge Complete mA Automatic Recharge Recharge Voltage Threshold Ratio VRTH / VREG VBAT High to Low Pass Transistor ON-Resistance ON-Resistance Battery Discharge Current Output Reverse Leakage Current Status Indicators - STAT1, STAT2, PG Sink Current ISINK — 15 25 Low Output Voltage VOL — 0.4 1 V ISINK = 4 mA Input Leakage Current ILK — 0.01 1 µA High Impedance, 6V on pin PROG Input Charge Impedance Range RPROG 1 — 20 kΩ Standy Impedance RPROG 70 — 200 kΩ Minimum Impedance for Standby ITHERM 47 50 53 µA 2 kΩ < RTHERM < 50 kΩ VTHERM Low to High Thermistor Bias Thermistor Current Source Thermistor Comparator Upper Trip Threshold Upper Trip Point Hysteresis Lower Trip Threshold Lower Trip Point Hysteresis VT1 1.20 1.23 1.26 V VT1HYS — -50 — mV VT2 0.235 0.25 0.265 V VT2HYS — 50 — mV VTHERM High to Low System Test (LDO) Mode VIH (VDD-0.1) — — V THERM Input Sink Current ISINK 3 6 20 µA Stand-by or system test mode Bypass Capacitance CBAT 1 — — µF IOUT < 250 mA 4.7 — — µF IOUT > 250 mA Input High Voltage Level DS22005A-page 4 © 2006 Microchip Technology Inc. MCP73833/4 DC CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typ)+0.3V] to 6V, TA=-40°C to 85°C. Typical values are at +25°C, VDD= [VREG(Typ)+1.0V] Parameters Sym Min Typ Max Units Conditions VPD — VBAT + 50 mV — V 2.3V < VBAT < VREG VDD Falling VPDEXIT — VBAT + 150 mV — V 2.3V < VBAT < VREG VDD Rising Input High Voltage Level VIH 2.0 — — V Input Low Voltage Level VIL — — 0.6 V Input Leakage Current ILK — 0.01 1 µA TSD — 150 — °C TSDHYS — 10 — °C Automatic Power Down Automatic Power Down Entry Threshold Automatic Power Down Exit Threshold Timer Enable Input (TE) VTE = 6V Thermal Shutdown Die Temperature Die Temperature Hysteresis AC CHARACTERISTICS Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typ)+0.3V] to 6V, TA=-40°C to 85°C. Typical values are at +25°C, VDD= [VREG(Typ)+1.0V] Parameters Sym Min Typ Max Units tSTART — — 5 ms VDD Low to High tDELAY — — 1 ms VBAT<VPTH to VBAT>VPTH tRISE — — 1 ms IOUT Rising to 90% of IREG tPRECON 0.4 1.3 3.2 ms Average VBAT Rise/Fall tTERM 0.4 1.3 3.2 ms Average IOUT Falling Charge Comparator Filter Time tCHARGE 0.4 1.3 3.2 ms Average VBAT Falling Thermistor Comparator Filter Time tTHERM 0.4 1.3 3.2 ms Average THERM Rise/Fall UVLO Start Delay Conditions Current Regulation Transition Time Out of Preconditioning Current Rise Time Out of Preconditioning Preconditioning Comparator Filter Time Termination Comparator Filter Time Elapsed Timer Elapsed Timer Period tELAPSED 0 0 0 Hours 3.6 4.0 4.4 Hours 5.4 6.0 6.6 Hours 7.2 8.0 8.8 Hours Timer Disabled Status Indicators Status Output turn-off tOFF — — 200 µs ISINK = 1 mA to 0 mA Status Output turn-on tON — — 200 µs ISINK = 0 mA to 1 mA TEMPERATURE SPECIFICATIONS Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typ)+0.3V] to 6V. Typical values are at +25°C, VDD= [VREG(Typ)+1.0V] Parameters Symbol Min Typ Max Units Conditions Specified Temperature Range TA -40 — +85 °C Operating Temperature Range TA -40 — +125 °C Storage Temperature Range TA -65 — +150 °C Thermal Resistance, MSOP-10 θJA — 113 — °C/W 4-Layer JC51-7 Standard Board, Natural Convection Thermal Resistance, 3mm x 3mm DFN-10 θJA — 41 — °C/W 4-Layer JC51-7 Standard Board, Natural Convection Temperature Ranges Thermal Package Resistances © 2006 Microchip Technology Inc. DS22005A-page 5 MCP73833/4 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 4.210 1000 MCP73833 4.205 Charge Current (mA) Battery Regulation Voltage (V) Note: Unless otherwise indicated, VDD = 5.2V, VREG = 4.20V, IOUT = 10 mA and TA= +25°C, Constant-voltage mode. IOUT = 10 mA 4.200 4.195 IOUT = 100 mA 4.190 4.185 IOUT = 500 mA 4.180 IOUT = 900 mA 4.175 4.170 4.50 100 10 4.75 5.00 5.25 5.50 5.75 6.00 1 Supply Voltage (V) Charge Current (mA) 4.190 IOUT = 500 mA IOUT = 900 mA 17 19 21 102 101 100 99 98 97 4.75 5.00 5.25 5.50 5.75 6.00 FIGURE 2-5: Charge Current (IOUT) vs. Supply Voltage (VDD). 1004 0.40 Charge Current (mA) Output Leakage Current (PA) 15 Supply Voltage (V) FIGURE 2-2: Battery Regulation Voltage (VBAT) vs. Ambient Temperature (TA). +85°C 0.30 0.20 13 RPROG = 10 k: Ambient Temperature (°C) 0.25 11 103 96 4.50 80 70 60 50 40 30 20 0 10 -10 -20 -30 4.160 -40 Battery Regulation Voltage (V) IOUT = 100 mA 4.200 0.35 9 FIGURE 2-4: Charge Current (IOUT) vs. Programming Resistor (RPROG). IOUT = 10 mA 4.210 4.170 7 104 MCP73833 4.180 5 Programming Resistor (k:) FIGURE 2-1: Battery Regulation Voltage (VBAT) vs. Supply Voltage (VDD). 4.220 3 -40°C +25°C 0.15 0.10 0.05 0.00 3.00 1000 998 996 994 992 990 988 3.20 3.40 3.60 3.80 4.00 4.20 Battery Regulation Voltage (V) FIGURE 2-3: Output Leakage Current (IDISCHARGE) vs. Battery Regulation Voltage (VBAT). DS22005A-page 6 RPROG = 1 k: 1002 986 4.50 4.75 5.00 5.25 5.50 5.75 6.00 Supply Voltage (V) FIGURE 2-6: Charge Current (IOUT) vs. Supply Voltage (VDD). © 2006 Microchip Technology Inc. MCP73833/4 TYPICAL PERFORMANCE CURVES (Continued) 49.0 48.5 FIGURE 2-7: Charge Current (IOUT) vs. Junction Temperature (TJ). 80 70 60 50 FIGURE 2-10: Thermistor Bias Current (ITHRERM) vs. Ambient Temperature (TA). 0 1200 RPROG = 1 k: -10 1000 Attenuation (dB) Charge Current (mA) 40 Ambient Temperature (°C) Junction Temperature (°C) 800 600 400 200 -20 VAC = 100 mVp-p IOUT = 10 mA COUT = 4.7 µF, X7R Ceramic -30 -40 -50 -60 -70 0.01 155 145 135 125 115 105 95 85 75 65 55 45 35 25 0 0.1 FIGURE 2-8: Charge Current (IOUT) vs. Junction Temperature (TJ). -10 Attenuation (dB) 0 51.5 51.0 50.5 50.0 49.5 49.0 48.5 4.75 5.00 5.25 5.50 5.75 6.00 Supply Voltage (V) FIGURE 2-9: Thermistor Bias Current (ITHRERM) vs. Supply Voltage (VDD). © 2006 Microchip Technology Inc. 10 100 1000 FIGURE 2-11: Power Supply Ripple Rejection (PSRR). 52.0 48.0 4.50 1 Frequency (kHz) Junction Temperature (°C) Thermistor Bias Current (PA) 30 48.0 155 145 135 125 115 95 105 85 75 65 55 45 35 25 0 49.5 20 20 50.0 0 40 50.5 10 60 51.0 -10 80 51.5 -20 100 52.0 -30 RPROG = 10 k: -40 Charge Current (mA) 120 Thermistor Bias Current (µA) Note: Unless otherwise indicated, VDD = 5.2V, VREG = 4.20V, IOUT = 10 mA and TA= +25°C, Constant-voltage mode. -20 VAC = 100 mVp-p IOUT = 100 mA COUT = 4.7 µF, X7R Ceramic -30 -40 -50 -60 0.01 0.1 1 10 100 1000 Frequency (kHz) FIGURE 2-12: Power Supply Ripple Rejection (PSRR). DS22005A-page 7 MCP73833/4 TYPICAL PERFORMANCE CURVES (Continued) 0.10 1.20 0.05 10 0.00 1.00 0.00 8 -0.05 0.80 -0.05 6 -0.10 0.60 -0.10 4 -0.15 0.40 -0.15 -0.25 -0.30 -0.30 0 0.00 0.20 -0.02 0.15 -0.04 0.10 -0.06 0.05 -0.08 COUT = 4.7 µF, X7R Ceramic -0.10 200 180 160 140 120 100 80 60 40 20 -0.12 0 -0.05 Time (µs) Load Transient Response. 200 180 160 5.0 200 4.0 160 3.0 120 2.0 80 MCP73833-FCI/MF VDD = 5.2V RPROG = 10.0 k: 1.0 0.0 40 Charge Current (A) 0.25 FIGURE 2-17: Complete Charge Cycle (180 mA Li-Ion Battery). Battery Voltage (V) 0.02 Output Ripple (V) Output Current (A) 0.04 0.30 DS22005A-page 8 140 0 Time (Minutes) 0.35 FIGURE 2-15: 40 0.0 Line Transient Response. 0.00 120 MCP73833-FCI/MF VDD = 5.2V RPROG = 10.0 k: 1.0 Time (µs) FIGURE 2-14: 80 80 200 180 160 140 100 80 60 40 0 20 -2 -0.25 2.0 Charge Current (A) -0.20 IOUT = 100 mA COUT = 4.7 µF, X7R Ceramic 120 210 -0.15 3.0 180 4 160 150 -0.10 4.0 120 -0.05 6 200 90 8 5.0 60 0.00 Load Transient Response. 30 10 FIGURE 2-16: Battery Voltage (V) 0.05 Output Ripple (V) 0.10 12 120 Source Voltage (V) 14 0 100 60 0 -0.30 Time (µs) Line Transient Response. 2 -0.25 -0.20 Time (µs) FIGURE 2-13: -0.20 COUT = 4.7 µF, X7R Ceramic 0.00 200 180 160 100 80 60 40 0 20 -2 140 0 0.20 40 -0.20 IOUT = 10 mA COUT = 4.7 µF, X7R Ceramic 20 2 Output Ripple (V) 1.40 0.05 Output Current (A) 0.10 12 Output Ripple (V) 14 120 Source Voltage (V) Note: Unless otherwise indicated, VDD = 5.2V, VREG = 4.20V, IOUT = 10 mA and TA= +25°C, Constant-voltage mode. 0 0 2 4 6 8 10 Time (Minutes) FIGURE 2-18: Charge Cycle Start Preconditioning (180 mAh Li-Ion Battery). © 2006 Microchip Technology Inc. MCP73833/4 3.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE Pin No. DFN 3.1 MSOP Symbol Function Battery Management Input Supply 1 1 VDD 2 2 VDD 3 3 STAT1 Charge Status Output 4 4 STAT2 Charge Status Output 5 5 VSS 6 6 PROG Current Regulation Set and Charge Control Enable 7 7 PG, TE MCP73833: Power Good output, MCP73834: Timer Enable input 8 8 THERM Thermistor input 9 9 VBAT Battery Charge Control Output 10 10 VBAT Battery Charge Control Output Battery Management Input Supply Battery Management 0V Reference Battery Management Input Supply (VDD) A supply voltage of [VREG (typ.) + 0.3V] to 6V is recommended. Bypass to VSS with a minimum of 1 µF. 3.2 Charge Status Outputs (STAT1, STAT2) STAT1 and STAT2 are open-drain logic outputs for connection to a LED for charge status indication. Alternatively, a pull-up resistor can be applied for interfacing to a host microcontroller. 3.3 Battery Management 0V Reference (VSS) Connect to negative terminal of battery and input supply. 3.4 Current Regulation Set (PROG) Preconditioning, fast charge, and termination currents are scaled by placing a resistor from PROG to VSS. The charge management controller can be disabled by allowing the PROG input to float. 3.5 3.6 Timer Enable Input (TE) MCP73834 Only The timer enable (TE) input option is used to enable or disable the internal timer. A low signal on this pin enables the internal timer and a high signal disables the internal timer. The TE input can be used to disable the timer when the charger is supplying current to charge the battery and power the system load. The TE input is compatible with 1.8V logic. 3.7 Thermistor Input (THERM) An internal 50 µA current source provides the bias for most common 10 kΩ negative-temperature coefficient thermistors (NTC). The MCP73833/4 compares the voltage at the THERM pin to factory set thersholds of 1.20V and 0.25V, typically. 3.8 Battery Charge Control Output (VBAT) Connect to positive terminal of battery. Drain terminal of internal P-channel MOSFET pass transistor. Bypass to VSS with a minimum of 1 µF to ensure loop stability when the battery is disconnected. Power Good Indication (PG) MCP73833 Only The power good (PG) option is a pseudo open-drain output. The PG output can sink current, but not source current. However, there is a diode path back to the input, and, as such, the PG output should only be pulled up to the input. The PG output is low whenever the input to the MCP73833 is above the UVLO threshold and greater than the battery voltage. © 2006 Microchip Technology Inc. DS22005A-page 9 MCP73833/4 4.0 FUNCTIONAL DESCRIPTION The MCP73833/4 is a highly advanced linear charge management controller. Refer to the functional block diagram and Figure 4-1 that depicts the operational flow algorithm from charge initiation to completion and automatic recharge. SHUTDOWN MODE * VDD < VUVLO VDD < VBAT STAT1 = HI-Z STAT2 = HI-Z PG = HI-Z SYSTEM TEST (LDO) MODE VTHERM > (VDD - 100 mv) PROG > 20 kΩ STAT1 = LOW STAT2 = LOW PG = LOW Timer Suspended * Continuously Monitored STANDBY MODE * VBAT (VREG + 100 mv) PROG > 200 kΩ STAT1 = HI-Z STAT2 = HI-Z PG = LOW VBAT < VPTH PRECONDITIONING MODE Charge Current (IPREG STAT1 = LOW STAT2 = Hi-Z PG = LOW Timer Reset VBAT > VPTH VBAT > VPTH TEMPERATURE FAULT No Charge Current STAT1 = Hi-Z STAT2 = Hi-Z PG = LOW Timer Suspended FAST CHARGE MODE Charge Current (IREG STAT1 = LOW STAT2 = Hi-Z PG = LOW Timer Enabled Timer Expired VBAT < VRTH TIMER FAULT No Charge Current STAT1 = Hi-Z STAT2 = Hi-Z PG = LOW Timer Suspended VBAT = VREG CONSTANT VOLTAGE MODE Charge Voltage (VREG STAT1 = LOW STAT2 = Hi-Z PG = LOW VBAT < ITERM Timer Expired CHARGE COMPLETE MODE No Charge Current STAT1 = HI-Z STAT2 = LOW PG = LOW Timer Reset FIGURE 4-1: DS22005A-page 10 Flow Chart. © 2006 Microchip Technology Inc. MCP73833/4 4.1 Under Voltage Lockout (UVLO) An internal under voltage lockout (UVLO) circuit monitors the input voltage and keeps the charger in shutdown mode until the input supply rises above the UVLO threshold. The UVLO circuitry has a built in hysteresis of 100 mV. In the event a battery is present when the input power is applied, the input supply must rise +150 mV above the battery voltage before the MCP73833/4 becomes operational. The UVLO circuit places the device in shutdown mode if the input supply falls to within +50 mV of the battery voltage. The UVLO circuit is always active. At any time the input supply is below the UVLO threshold or within +50 mV of the voltage at the VBAT pin, the MCP73833/4 is placed in a shutdown mode. During any UVLO condition, the battery reverse discharge current shall be less than 2 µA. 4.4 Constant Current - Fast Charge Mode During the constant current mode, the programmed charge current is supplied to the battery or load. The charge current is established using a single resistor from PROG to VSS. The program resistor and the charge current are calculated using Equation 4-1: EQUATION 4-1: RPROG = kilo-ohms IREG = milliampere Constant current mode is maintained until the voltage at the VBAT pin reaches the regulation voltage, VREG. When constant current mode is invoked, the internal timer is reset. 4.4.1 4.2 Charge Qualification For a charge cycle to begin, all UVLO conditions must be met and a battery or output load must be present. A charge current programming resistor must be connected from PROG to VSS. If the PROG pin is open or floating, the MCP73833/4 is disabled and the battery reverse discharge current is less than 2 µA. In this manner, the PROG pin acts as a charge enable and can be used as a manual shutdown. If the input supply voltage is above the UVLO the threshold, but below VREG(Typ)+0.3V, MCP73833/4 will pulse the STAT1 and PG outputs as the device determines if a battery is present. 4.3 Preconditioning If the voltage at the VBAT pin is less than the preconditioning threshold, the MCP73833/4 enters a preconditioning or trickle charge mode. The preconditioning threshold is factory set. Refer to Section 1.0 “Electrical Characteristics” for preconditioning threshold options. In this mode, the MCP73833/4 supplies a percentage of the charge current (established with the value of the resistor connected to the PROG pin) to the battery. The percentage or ratio of the current is factory set. Refer to Section 1.0 “Electrical Characteristics” for preconditioning current options. When the voltage at the VBAT pin rises above the preconditioning threshold, the MCP73833/4 enters the constant current or fast charge mode. 1000V I REG = ----------------R PROG Where: TIMER EXPIRED DURING CONSTANT CURRENT - FAST CHARGE MODE If the internal timer expires before the recharge voltage threshold is reached, a timer fault is indicated and the charge cycle terminates. The MCP73833/4 remains in this condition until the battery is removed, the input power is removed, or the PROG pin is opened. If the battery is removed or the PROG pin is opened, the MCP73833/4 enters the Standby mode where it remains until a battery is reinserted or the PROG pin is reconnected. If the input power is removed, the MCP73833/4 is in Shutdown. When the input power is reapplied, a normal start-up sequence ensues. 4.5 Constant Voltage Mode When the voltage at the VBAT pin reaches the regulation voltage, VREG, constant voltage regulation begins. The regulation voltage is factory set to 4.20V, 4.35V, 4.40V, or 4.50V with a tolerance of ± 0.75%. 4.6 Charge Termination The charge cycle is terminated when, during constant voltage mode, the average charge current diminishes below a percentage of the programmed charge current (established with the value of the resistor connected to the PROG pin) or the internal timer has expired. A 1 ms filter time on the termination comparator ensures that transient load conditions do not result in premature charge cycle termination. The percentage or ratio of the current is factory set. The timer period is factory set and can be disabled. Refer to Section 1.0 “Electrical Characteristics” for charge termination current ratio and timer period options. The charge current is latched off and the MCP73833/4 enters a charge complete mode. © 2006 Microchip Technology Inc. DS22005A-page 11 MCP73833/4 4.7 Automatic Recharge 4.9 The MCP73833/4 continuously monitors the voltage at the VBAT pin in the charge complete mode. If the voltage drops below the recharge threshold, another charge cycle begins and current is once again supplied to the battery or load. The recharge threshold is factory set. Refer to Section 1.0 “Electrical Characteristics” for recharge threshold options. 4.8 Thermal Shutdown The MCP73833/4 suspends charge if the die temperature exceeds +150°C. Charging will resume when the die temperature has cooled by approximately +10°C. The thermal shutdown is a secondary safety feature in the event that there is a failure within the thermal regulation circuitry. Thermal Regulation The MCP73833/4 limits the charge current based on the die temperature. The thermal regulation optimizes the charge cycle time while maintaining device reliability. Figure 4-2 depicts the thermal regulation for the MCP73833/4. Charge Current (mA) 1200 RPROG = 1 kΩ 1000 800 600 400 200 155 145 135 125 115 95 105 85 75 65 55 45 35 25 0 Junction Temperature (°C) FIGURE 4-2: DS22005A-page 12 Thermal Regulation. © 2006 Microchip Technology Inc. MCP73833/4 5.0 DETAILED DESCRIPTION 5.1 Analog Circuitry 5.1.1 BATTERY MANAGEMENT INPUT SUPPLY (VDD) The VDD input is the input supply to the MCP73833/4. The MCP73833/4 automatically enters a Power-down mode if the voltage on the VDD input falls below the UVLO voltage (VSTOP). This feature prevents draining the battery pack when the VDD supply is not present. 5.1.2 CURRENT REGULATION SET (PROG) Fast charge current regulation can be scaled by placing a programming resistor (RPROG) from the PROG input to VSS. The program resistor and the charge current are calculated using the Equation 5-1: EQUATION 5-1: 1000VI REG = ---------------R PROG Where: RPROG = kilo-ohms IREG = milliampere pass transistor and holding the timer value. The charge cycle resumes when the voltage at the THERM pin returns to the normal range. If temperature monitoring is not required, place a standard 10 kΩ resistor from THERM to VSS 220.127.116.11 The MCP73833/4 can be placed in a system test mode. In this mode, the MCP73833/4 operates as a low dropout linear regulator (LDO). The output voltage is regulated to the factory set voltage regulation option. The available output current is limitted to the programmed fast charge current. For stability, the VBAT output must be bypassed to VSS with a minimum capacitance of 1 µF for output currents up to 250 mA. A minimum capacitance of 4.7 µF is required for output currents above 250 mA. The system test mode is entered by driving the THERM input greater than (VDD-100 mV) with no battery connected to the output. In this mode, the MCP73833/4 can be used to power the system without a battery present. Note 1: ITHERM is disabled during shutdown, stand-by, and system test modes. 2: A pull-down current source on the THERM input is active only in stand-by and system test modes. The preconditioning trickle-charge current and the charge termination current are ratiometric to the fast charge current based on the selected device options. 5.1.3 5.1.4 3: During system test mode, the PROG input sets the available output current limit. BATTERY CHARGE CONTROL OUTPUT (VBAT) The battery charge control output is the drain terminal of an internal P-channel MOSFET. The MCP73833/4 provides constant current and voltage regulation to the battery pack by controlling this MOSFET in the linear region. The battery charge control output should be connected to the positive terminal of the battery pack. TEMPERATURE QUALIFICATION (THERM) The MCP73833/4 continuously monitors battery temperature during a charge cycle by measuring the voltage between the THERM and VSS pins. An internal 50 µA current source provides the bias for most common 10 kΩ negative-temperature coefficient (NTC) or positive-temperature coefficient (PTC) thermistors.The current source is controlled, avoiding measurement sensitivity to fluctuations in the supply voltage (VDD). The MCP73833/4 compares the voltage at the THERM pin to factory set thersholds of 1.20V and 0.25V, typically. Once a volage outside the thresholds is detected during a charge cycle, the MCP73833/4 immediately suspends the charge cycle. The MCP73833/4 suspends charge by turning off the System Test (LDO) Mode 4: System test mode shall be exited by releasing the THERM input or cycling input power. 5.2 Digital Circuitry 5.2.1 STATUS INDICATORS AND POWER GOOD (PG - OPTION) The charge status outputs have two different states: Low (L), and High Impedance (Hi-Z). The charge status outputs can be used to illuminate LEDs. Optionally, the charge status outputs can be used as an interface to a host microcontroller. Table 5-1 summarize the state of the status outputs during a charge cycle. TABLE 5-1: CHARGE CYCLE STATE STAT1 STAT2 PG Shutdown Hi-Z Hi-Z Hi-Z Standby Hi-Z Hi-Z L L Hi-Z L Hi-Z L L Charge in Progress Charge Complete (EOC) Temperature Fault Hi-Z Hi-Z L Timer Fault Hi-Z Hi-Z L L L L System Test Mode © 2006 Microchip Technology Inc. STATUS OUTPUTS DS22005A-page 13 MCP73833/4 5.2.2 POWER GOOD (PG) OPTION The power good (PG) option is a pseudo open-drain output. The PG output can sink current, but not source current. However, there is a diode path back to the input, and as such, the PG output should only be pulled up to the input. The PG output is low whenever the input to the MCP73833 is above the UVLO threshold and greater than the battery voltage. If the supply voltage is above the UVLO, but below VREG(Typ)+0.3V, the MCP73833 will pulse the PG output as the device determines if a battery is present. 5.2.3 5.2.4 DEVICE DISABLE (PROG) The current regulation set input pin (PROG) can be used to terminate a charge at any time during the charge cycle, as well as to initiate a charge cycle or initiate a recharge cycle. Placing a programming resistor from the PROG input to VSS enables the device. Allowing the PROG input to float or by applying a logic-high input signal, disables the device and terminates a charge cycle. When disabled, the device’s supply current is reduced to 100 µA, typically. TIMER ENABLE (TE) OPTION The timer enable (TE) input option is used to enable or disable the internal timer. A low signal on this pin enables the internal timer and a high signal disables the internal timer. The TE input can be used to disable the timer when the charger is supplying current to charge the battery and power the system load. The TE input is compatible with 1.8V logic. DS22005A-page 14 © 2006 Microchip Technology Inc. MCP73833/4 6.0 APPLICATIONS The MCP73833/4 is designed to operate in conjunction with a host microcontroller or in stand-alone applications. The MCP73833/4 provides the preferred charge algorithm for Lithium-Ion and Lithium-Polymer cells Constant-current followed by Constant-voltage. Figure 6-1 depicts a typical stand-alone application circuit, while Figures 6-2 and 6-3 depict the accompanying charge profile. Li-Ion Battery Charger 1,2 CIN LED LED 3 RLED 4 RLED 7 RLED STAT1 THERM STAT2 2.00 4.0 1.60 3.0 1.20 2.0 0.80 MCP73833-FCI/MF VDD = 5.2V RPROG = 1.00 k: 0.40 160 140 120 100 80 60 40 20 0.00 0 0.0 Charge Current (A) Battery Voltage (V) PROG VSS PG 8 RT1 6 5 RPROG RT2 T 10 kΩ MCP73833 6.1 Time (Minutes) FIGURE 6-2: Typical Charge Profile with Thermal Regulation (1700 mAh Li-Ion Battery). Application Circuit Design Due to the low efficiency of linear charging, the most important factors are thermal design and cost, which are a direct function of the input voltage, output current and thermal impedance between the battery charger and the ambient cooling air. The worst-case situation is when the device has transitioned from the Preconditioning mode to the Constant-current mode. In this situation, the battery charger has to dissipate the maximum power. A trade-off must be made between the charge current, cost and thermal requirements of the charger. 6.1.1 COMPONENT SELECTION 5.0 2.00 Selection of the external components in Figure 6-1 is crucial to the integrity and reliability of the charging system. The following discussion is intended as a guide for the component selection process. 4.0 1.60 18.104.22.168 3.0 1.20 2.0 0.80 MCP73833-FCI/MF VDD = 5.2V RPROG = 1.00 k: 1.0 0.40 10 8 6 4 2 0.00 0 0.0 Charge Current (A) Battery Voltage (V) + Single Li-Ion - Cell COUT Typical Application Circuit. 5.0 1.0 VBAT 9,10 LED Regulated Wall Cube FIGURE 6-1: VDD Time (Minutes) Current Programming Resistor (RPROG) The preferred fast charge current for Lithium-Ion cells is at the 1C rate, with an absolute maximum current at the 2C rate. For example, a 500 mAh battery pack has a preferred fast charge current of 500 mA. Charging at this rate provides the shortest charge cycle times without degradation to the battery pack performance or life. FIGURE 6-3: Typical Charge Cycle Start with Thermal Regulation (1700 mAh Li-Ion Battery). © 2006 Microchip Technology Inc. DS22005A-page 15 MCP73833/4 22.214.171.124 Thermal Considerations The worst-case power dissipation in the battery charger occurs when the input voltage is at the maximum and the device has transitioned from the Preconditioning mode to the Constant-current mode. In this case, the power dissipation is: PowerDissipation = ( V DDMAX – V PTHMIN ) × I REGMAX Where: VDDMAX = the maximum input voltage IREGMAX = the maximum fast charge current VPTHMIN = the minimum transition threshold voltage Power dissipation with a 5V, ±10% input voltage source is: PowerDissipation = ( 5.5V – 2.7V ) × 550mA = 1.54W This power dissipation with the battery charger in the MSOP-10 package will cause thermal regulation to be entered as depicted in Figure 6-3. Alternatively, the 3 mm x 3 mm DFN package could be utilized to reduce charge cycle times. 126.96.36.199 External Capacitors The MCP73833/4 is stable with or without a battery load. In order to maintain good AC stability in the Constant-voltage mode, a minimum capacitance of 4.7 µF is recommended to bypass the VBAT pin to VSS. This capacitance provides compensation when there is no battery load. In addition, the battery and interconnections appear inductive at high frequencies. These elements are in the control feedback loop during Constant-voltage mode. Therefore, the bypass capacitance may be necessary to compensate for the inductive nature of the battery pack. Virtually any good quality output filter capacitor can be used, independent of the capacitor’s minimum Effective Series Resistance (ESR) value. The actual value of the capacitor (and its associated ESR) depends on the output load current. A 4.7 µF ceramic, tantalum or aluminum electrolytic capacitor at the output is usually sufficient to ensure stability for output currents up to a 500 mA. 188.8.131.52 184.108.40.206 Charge Inhibit The current regulation set input pin (PROG) can be used to terminate a charge at any time during the charge cycle, as well as to initiate a charge cycle or initiate a recharge cycle. Placing a programming resistor from the PROG input to VSS enables the device. Allowing the PROG input to float or by applying a logic-high input signal, disables the device and terminates a charge cycle. When disabled, the device’s supply current is reduced to 100 µA, typically. 220.127.116.11 Temperature Monitoring The charge temperature window can be set by placing fixed value resistors in series-parallel with a thermistor. The resistance values of RT1 and RT2 can be calculated with the following equations in order to set the temperature window of interest. For NTC thermistors: R T2 × R COLD 24k Ω = R T1 + -------------------------------R T2 + R COLD R T2 × R HOT 5kΩ = R T1 + ---------------------------R T2 + R HOT Where: RT1 is the fixed series resistance RT2 is the fixed parallel resistance RCOLD is the thermistor resistance at the lower temperature of interest RHOT is the thermistor resistance at the upper temperature of interest. For example, by utilizing a 10 kΩ at 25C NTC thermistor with a sensitivity index, β, of 3892, the charge temperature range can be set to 0C - 50C by placing a 1.54 kΩ resistor in series (RT1), and a 69.8 kΩ resistor in parallel (RT2) with the thermistor as depicted in Figure 6-1. 18.104.22.168 Charge Status Interface A status output provides information on the state of charge. The output can be used to illuminate external LEDs or interface to a host microcontroller. Refer to Table 5-1 for a summary of the state of the status output during a charge cycle. Reverse-Blocking Protection The MCP73833/4 provides protection from a faulted or shorted input. Without the protection, a faulted or shorted input would discharge the battery pack through the body diode of the internal pass transistor. DS22005A-page 16 © 2006 Microchip Technology Inc. MCP73833/4 6.2 PCB Layout Issues For optimum voltage regulation, place the battery pack as close as possible to the device’s VBAT and VSS pins, recommended to minimize voltage drops along the high current-carrying PCB traces. If the PCB layout is used as a heatsink, adding many vias in the heatsink pad can help conduct more heat to the backplane of the PCB, thus reducing the maximum junction temperature. Figures 6-4 and 6-5 depict a typical layout with PCB heatsinking. MCP73833 VSS CIN COUT VDD VBAT STAT1 THERM STAT2 PG RPROG FIGURE 6-4: Typical Layout (Top). VSS VDD FIGURE 6-5: VBAT Typical Layout (Bottom). © 2006 Microchip Technology Inc. DS22005A-page 17 MCP73833/4 7.0 PACKAGING INFORMATION 7.1 Package Marking Information 10-Lead DFN 1 2 3 4 Part Number * 10 XXXX XYWW NNN 5 9 8 7 6 Marking Code Part Number * MCP73833-AMI/MF AAAA MCP73833-BZI/MF AAAB MCP73833-FCI/MF AAAC MCP73834-FCI/MF MCP73833-GPI/MF AAAD MCP73834-GPI/MF MCP73833-NVI/MF AAAF MCP73834-NVI/MF MCP73833-CNI/MF AAAK MCP73834-CNI/MF * Consult Factory for Alternative Device Options. Marking Code 3 Marking Code Part Number * MCP73833-AMI/UN 833AMI MCP73833-BZI/UN 833BZI MCP73833-FCI/UN 833FCI MCP73834-FCI/UN MCP73833-GPI/UN 833GPI MCP73834-GPI/UN MCP73833-NVI/UN 833NVI MCP73834-NVI/UN MCP73833-CNI/UN 833CNI MCP73834-CNI/UN * Consult Factory for Alternative Device Options. Legend: XX...X Y YY WW NNN e3 * DS22005A-page 18 4 BAAC BAAD BAAF BAAK 10 AAAA 0633 256 5 9 8 7 6 Example: Part Number * Note: 1 2 10-Lead MSOP XXXXXX YWWNNN Example: Marking Code 834FCI 834GPI 834NVI 834CNI 8336SI 633256 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2006 Microchip Technology Inc. MCP73833/4 10-Lead Plastic Dual-Flat No-Lead Package (MF) 3x3x0.9 mm Body (DFN) – Saw Singulated Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging b E p n L K D PIN 1 ID INDEX AREA (NOTE 1) D2 EXPOSED METAL PAD (NOTE 2) 2 1 E2 TOP VIEW BOTTOM VIEW A EXPOSED TIE BAR (NOTE 3) A3 A1 MILLIMETERS* INCHES Units Dimension Limits MIN NOM MIN MAX MAX NOM Number of Pins n Pitch e Overall Height A .031 .035 .039 0.80 0.90 1.00 Standoff A1 .000 .001 .002 0.00 0.02 0.05 Lead Thickness A3 10 10 0.50 BSC .020 BSC .008 REF. 0.20 REF. E .112 .118 .124 2.85 3.00 3.15 E2 .082 .094 .096 2.08 2.39 2.45 D .112 .118 .124 2.85 3.00 3.15 D2 .051 .065 .067 1.30 1.65 1.70 Lead Width b .008 .010 .015 0.18 0.25 0.30 Contact Length § L .012 .016 .020 0.30 0.40 0.50 Contact-to-Exposed Pad § K .008 — — 0.20 — — Overall Length (Note 3) Exposed Pad Length Overall Width Exposed Pad Width (Note 3) * Controlling Parameter § Significant Characteristic Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Exposed pad varies according to die attach paddle size. 3. Package may have one or more exposed tie bars at ends. BSC: Basic Dimension. Theoretically exact value shown without tolerances. See ASME Y14.5M REF: Reference Dimension, usually without tolerance, for information purposes only. See ASME Y14.5M JEDEC equivalent: Not Registered Drawing No. C04-063 © 2006 Microchip Technology Inc. Revised 09-12-05 DS22005A-page 19 MCP73833/4 10-Lead Plastic Micro Small Outline Package (UN) (MSOP) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E E1 p D 2 B 1 n α c φ A1 L β Number of Pins Pitch A2 A (F) Units Dimension Limits n p Overall Height Molded Package Thickness INCHES NOM MIN MAX MIN MILLIMETERS* NOM 10 MAX 10 0.50 BSC .020 BSC A .043 – – 1.10 .037 .006 0.75 0.00 0.85 0.95 Standoff A2 A1 Overall Width Molded Package Width E E1 Overall Length D Foot Length Footprint .016 Foot Angle L F φ 0° – 8° 0° – 8° Lead Thickness c .003 – .009 0.08 – 0.23 Lead Width B α .006 .009 .012 0.15 0.23 0.30 Mold Draft Angle Top 5° – 15° 5° – 15° Mold Draft Angle Bott om β 5° – 15° 5° – 15° .030 .000 .033 0.15 4.90 BSC 3.00 BSC .193 BSC .118 BSC 3.00 BSC .118 BSC .024 .037 REF .031 0.40 0.60 0.95 REF 0.80 * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254 mm) per side. BSC: Basic Dimension. Theoretically exact value shown without tolerances. See ASME Y14.5M REF: Reference Dime nsion, usually witho ut tolerance, for information purposes only. See ASME Y14.5M JEDEC Equivalent: MO-187 BA Revised 09-16-05 Drawing No. C04-021 DS22005A-page 20 © 2006 Microchip Technology Inc. MCP73833/4 APPENDIX A: REVISION HISTORY Revision A (September 2006) • Original Release of this Document. © 2006 Microchip Technology Inc. DS22005A-page 23 MCP73833/4 NOTES: DS22005A-page 24 © 2006 Microchip Technology Inc. MCP73833/4 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device XX Examples: * * XX X/ Output Temp. Package Options* Device: Output Options * * MCP73833: 1A Fully Integrated Charger, PG function on pin 7 MCP73833T: 1A Fully Integrated Charger, PG function on pin 7 (Tape and Reel) MCP73834: 1A Fully Integrated Charger, TE function on pin 7 MCP73834T: 1A Fully Integrated Charger, TE function on pin 7 (Tape and Reel) a) b) c) d) e) f) MCP73833-AMI/UN: MCP73833-BZI/UN: MCP73833-CNI/MF: MCP73833-FCI/UN: MCP73833-GPI/UN: MCP73833-NVI/MF: 10-lead MSOP pkg. 10-lead MSOP pkg. 10-lead DFN pkg. 10-lead MSOP pkg. 10-lead MSOP pkg. 10-lead DFN pkg. a) b) c) d) MCP73834-CNI/MF: MCP73834-FCI/UN: MCP73834-GPI/UN: MCP73834-NVI/MF: 10-lead DFN pkg. 10-lead MSOP pkg. 10-lead MSOP pkg. 10-lead DFN pkg. * * Consult Factory for Alternative Device Options * Refer to table below for different operational options. * * Consult Factory for Alternative Device Options. Temperature: I Package Type: MF = Plastic Dual Flat No Lead (DFN) (3x3x0.9 mm Body), 10-lead UN = Plastic Micro Small Outline Package (MSOP), 10-lead Part Number = -40°C to +85°C VREG IPREG/IREG VPTH/VREG ITERM/IREG VRTH/VREG Timer Period MCP73833-AMI/MF 4.20V 10% 71.5% 7.5% 96.5% 0 hours MCP73833-BZI/MF 4.20V 100% N/A 7.5% 96.5% 0 hours MCP73833-CNI/MF 4.20V 10% 71.5% 20% 94% 4 hours MCP73833-FCI/MF 4.20V 10% 71.5% 7.5% 96.5% 6 hours MCP73833-GPI/MF 4.20V 100% N/A 7.5% 96.5% 6 hours MCP73833-NVI/MF 4.35V 10% 71.5% 7.5% 96.5% 6 hours MCP73833-AMI/UN 4.20V 10% 71.5% 7.5% 96.5% 0 hours MCP73833-FCI/UN 4.20V 10% 71.5% 7.5% 96.5% 6 hours MCP73834-BZI/MF 4.20V 100% N/A 7.5% 96.5% 0 hours MCP73834-CNI/MF 4.20V 10% 71.5% 20% 94% 4 hours MCP73834-FCI/MF 4.20V 10% 71.5% 7.5% 96.5% 6 hours MCP73834-NVI/MF 4.35V 10% 71.5% 7.5% 96.5% 6 hours MCP73834-FCI/UN 4.20V 10% 71.5% 7.5% 96.5% 6 hours © 2006 Microchip Technology Inc. DS22005A-page 25 MCP73833/4 NOTES: DS22005A-page 26 © 2006 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active Thermistor, Mindi, MiWi, MPASM, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2006, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company’s quality system processes and procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2006 Microchip Technology Inc. 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