SN54AHCT138, SN74AHCT138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS266M – DECEMBER 1995 – REVISED JULY 2003 15 3 14 4 13 5 12 6 11 7 10 8 9 B C G2A G2B G1 Y7 16 B A NC VCC Y0 1 SN54AHCT138 . . . FK PACKAGE (TOP VIEW) C G2A NC G2B G1 15 Y0 14 Y1 2 3 13 Y2 12 Y3 4 5 11 Y4 10 Y5 6 7 8 9 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 Y1 Y2 NC Y3 Y4 Y7 GND NC Y6 Y5 2 VCC Y0 Y1 Y2 Y3 Y4 Y5 Y6 VCC 16 Y6 1 D SN74AHCT138 . . . RGY PACKAGE (TOP VIEW) SN54AHCT138 . . . J OR W PACKAGE SN74AHCT138 . . . D, DB, DGV, N, NS, OR PW PACKAGE (TOP VIEW) A B C G2A G2B G1 Y7 GND Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) A D D Inputs Are TTL-Voltage Compatible Designed Specifically for High-Speed Memory Decoders and Data-Transmission Systems Incorporate Three Enable Inputs to Simplify Cascading and/or Data Reception GND D D NC – No internal connection description/ordering information The ’AHCT138 3-line to 8-line decoders/demultiplexers are designed to be used in high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of this decoder and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. ORDERING INFORMATION Tape and reel SN74AHCT138RGYR HB138 PDIP – N Tube SN74AHCT138N SN74AHCT138N Tube SN74AHCT138D Tape and reel SN74AHCT138DR SOP – NS Tape and reel SN74AHCT138NSR AHCT138 SSOP – DB Tape and reel SN74AHCT138DBR HB138 Tube SN74AHCT138PW Tape and reel SN74AHCT138PWR TVSOP – DGV Tape and reel SN74AHCT138DGVR HB138 CDIP – J Tube SNJ54AHCT138J SNJ54AHCT138J CFP – W Tube SNJ54AHCT138W SNJ54AHCT138W LCCC – FK Tube SNJ54AHCT138FK SNJ54AHCT138FK TSSOP – PW –55°C to 125°C TOP-SIDE MARKING QFN – RGY SOIC – D –40°C to 85°C ORDERABLE PART NUMBER PACKAGE† TA AHCT138 HB138 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54AHCT138, SN74AHCT138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS266M – DECEMBER 1995 – REVISED JULY 2003 description/ordering information (continued) The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. FUNCTION TABLE SELECT INPUTS ENABLE INPUTS OUTPUTS G1 G2A G2B C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 X H X X X X H H H H H H H Y7 H X X H X X X H H H H H H H H L X X X X X H H H H H H H H H L L L L L L H H H H H H H H L L L L H H L H H H H H H H L L L H L H H L H H H H H H L L L H H H H H L H H H H H L L H L L H H H H L H H H H L L H L H H H H H H L H H H L L H H L H H H H H H L H H L L H H H H H H H H H H L logic diagram (positive logic) 15 Y0 A 1 14 Y1 13 Select Inputs B Y2 2 12 Y3 11 3 Data Outputs Y4 C 10 Y5 9 Y6 4 G2A Enable Inputs G2B 7 5 6 G1 Pin numbers shown are for the D, DB, DGV, J, N, NS, PW, RGY, and W packages. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Y7 SN54AHCT138, SN74AHCT138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS266M – DECEMBER 1995 – REVISED JULY 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±75 mA Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W (see Note 2): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W (see Note 2): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W (see Note 2): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W (see Note 2): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W (see Note 3): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 3. The package thermal impedance is calculated in accordance with JESD 51-5. recommended operating conditions (see Note 4) SN54AHCT138 MAX MIN MAX 4.5 5.5 4.5 5.5 VCC VIH Supply voltage VIL VI Low-level input voltage Input voltage 0 5.5 VO IOH Output voltage 0 VCC –8 IOL ∆t/∆v Low-level output current High-level input voltage SN74AHCT138 MIN 2 2 0.8 High-level output current Input transition rise or fall rate UNIT V V 0.8 V 0 5.5 V 0 VCC –8 V mA 8 8 mA 20 20 ns/V TA Operating free-air temperature –55 125 –40 85 °C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54AHCT138, SN74AHCT138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS266M – DECEMBER 1995 – REVISED JULY 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC VOH IOH = –50 mA IOH = –8 mA 45V 4.5 VOL IOL = 50 mA IOL = 8 mA 45V 4.5 II ICC VI = 5.5 V or GND VI = VCC or GND, IO = 0 5.5 V ∆ICC† One input at 3.4 V, Other inputs at VCC or GND 5.5 V MIN TA = 25°C TYP MAX 4.4 4.5 3.94 0 V to 5.5 V SN54AHCT138 MIN MAX SN74AHCT138 MIN 4.4 4.4 3.8 3.8 MAX UNIT V 0.1 0.1 0.1 0.36 0.5 0.44 ±0.1 ±1* ±1 mA 4 40 40 mA 1.35 1.5 1.5 mA 10 pF Ci VI = VCC or GND 5V 2 10 * On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V. † This is the increase in supply current for each input at one of the specified TTL voltage levels rather than 0 V or VCC. V switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE tPLH tPHL A B A, B, C Any Y CL = 15 pF tPLH tPHL G1 Any Y CL = 15 pF tPLH tPHL G2A G2B G2A, Any Y CL = 15 pF tPLH tPHL A B A, B, C Any Y CL = 50 pF tPLH tPHL G1 Any Y CL = 50 pF tPLH tPHL G2A G2B G2A, Any Y CL = 50 pF MIN TA = 25°C TYP MAX SN54AHCT138 SN74AHCT138 MIN MAX MIN MAX 7.6* 10.4* 1* 12* 1 12 7.6* 10.4* 1* 12* 1 12 6.6* 9.1* 1* 10.5* 1 10.5 6.6* 9.1* 1* 10.5* 1 10.5 7* 9.6* 1* 11* 1 11 7* 9.6* 1* 11* 1 11 8.1 11.4 1 13 1 13 8.1 11.4 1 13 1 13 7.1 10.1 1 11.5 1 11.5 7.1 10.1 1 11.5 1 11.5 7.5 10.6 1 12 1 12 7.5 10.6 1 12 1 12 TEST CONDITIONS TYP UNIT ns ns ns ns ns ns * On products compliant to MIL-PRF-38535, this parameter is not production tested. operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd 4 Power dissipation capacitance No load, POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 f = 1 MHz 14 UNIT pF SN54AHCT138, SN74AHCT138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS266M – DECEMBER 1995 – REVISED JULY 2003 PARAMETER MEASUREMENT INFORMATION From Output Under Test Test Point RL = 1 kΩ From Output Under Test VCC Open S1 TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3V 1.5 V Timing Input 0V tw 3V 1.5 V Input 1.5 V th tsu 3V 1.5 V Data Input 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 1.5 V Input 1.5 V 0V tPLH In-Phase Output tPHL 50% VCC tPHL Out-of-Phase Output VOH 50% VCC VOL Output Waveform 1 S1 at VCC (see Note B) VOH 50% VCC VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 1.5 V 1.5 V 0V tPZL tPLZ ≈VCC 50% VCC tPZH tPLH 50% VCC 3V Output Control Output Waveform 2 S1 at GND (see Note B) VOL + 0.3 V VOL tPHZ 50% VCC VOH – 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time with one input transition per measurement. E. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN54AHCT138, SN74AHCT138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS266M – DECEMBER 1995 – REVISED JULY 2003 APPLICATION INFORMATION SN74AHCT138 BIN/OCT 1 2 3 VCC 0 1 1 2 2 4 6 3 & 4 4 EN 5 5 6 7 15 14 13 12 11 10 9 7 0 1 2 3 4 5 6 7 SN74AHCT138 BIN/OCT 1 A0 2 A1 3 A2 1 2 2 4 6 A3 0 1 3 & 4 4 A4 EN 5 5 6 7 15 14 13 12 11 10 9 7 8 9 10 11 12 13 14 15 SN74AHCT138 BIN/OCT 1 2 3 6 0 1 1 2 2 4 3 & 4 4 5 EN 5 6 7 Figure 2. 24-Bit Decoding Scheme 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 14 13 12 11 10 9 7 16 17 18 19 20 21 22 23 SN54AHCT138, SN74AHCT138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SCLS266M – DECEMBER 1995 – REVISED JULY 2003 APPLICATION INFORMATION SN74AHCT138 BIN/OCT 1 A0 2 A1 3 A2 1 1 2 2 4 6 VCC 0 3 & 4 4 A3 EN 5 A4 5 6 7 15 14 13 12 11 10 9 7 0 1 2 3 4 5 6 7 SN74AHCT138 BIN/OCT 1 2 3 0 1 1 2 2 4 6 3 & 4 4 EN 5 5 6 7 15 14 13 12 11 10 9 7 8 9 10 11 12 13 14 15 SN74AHCT138 BIN/OCT 1 2 3 0 1 1 2 2 4 6 3 & 4 4 EN 5 5 6 7 15 14 13 12 11 10 9 7 16 17 18 19 20 21 22 23 SN74AHCT138 BIN/OCT 1 2 3 6 0 1 1 2 2 4 3 & 4 4 5 EN 5 6 7 15 14 13 12 11 10 9 7 24 25 26 27 28 29 30 31 Figure 3. 32-Bit Decoding Scheme POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security Low Power Wireless www.ti.com/lpw Telephony www.ti.com/telephony Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2007, Texas Instruments Incorporated PACKAGE OPTION ADDENDUM www.ti.com 4-Jun-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) 5962-9851701Q2A ACTIVE LCCC FK 20 1 TBD 5962-9851701QEA ACTIVE CDIP J 16 1 TBD 5962-9851701QFA ACTIVE CFP W 16 1 SN74AHCT138D ACTIVE SOIC D 16 40 SN74AHCT138DBLE OBSOLETE SSOP DB 16 SN74AHCT138DBR ACTIVE SSOP DB 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138DBRE4 ACTIVE SSOP DB 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138DBRG4 ACTIVE SSOP DB 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138DE4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138DG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138DGVR ACTIVE TVSOP DGV 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138DGVRE4 ACTIVE TVSOP DGV 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138DGVRG4 ACTIVE TVSOP DGV 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138DR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138DRE4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138DRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138N ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74AHCT138NE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74AHCT138NSR ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138NSRE4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138NSRG4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138PW ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138PWE4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138PWG4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138PWLE OBSOLETE TSSOP PW 16 SN74AHCT138PWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138PWRE4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM A42 SNPB N / A for Pkg Type TBD A42 N / A for Pkg Type Green (RoHS & no Sb/Br) CU NIPDAU TBD TBD Addendum-Page 1 POST-PLATE N / A for Pkg Type Call TI Call TI Level-1-260C-UNLIM Call TI Call TI PACKAGE OPTION ADDENDUM www.ti.com 4-Jun-2007 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74AHCT138PWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AHCT138RGYR ACTIVE QFN RGY 16 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN74AHCT138RGYRG4 ACTIVE QFN RGY 16 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SNJ54AHCT138FK ACTIVE LCCC FK 20 1 TBD SNJ54AHCT138J ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type SNJ54AHCT138W ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type Lead/Ball Finish MSL Peak Temp (3) POST-PLATE N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 22-Sep-2007 TAPE AND REEL BOX INFORMATION Device Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74AHCT138DBR DB 16 SITE 41 330 16 8.2 6.6 2.5 12 16 Q1 SN74AHCT138DGVR DGV 16 SITE 41 330 12 6.8 4.0 1.6 8 16 Q1 SN74AHCT138DR D 16 SITE 27 330 16 6.5 10.3 2.1 8 16 Q1 SN74AHCT138NSR NS 16 SITE 41 330 16 8.2 10.5 2.5 12 16 Q1 SN74AHCT138PWR PW 16 SITE 41 330 12 7.0 5.6 1.6 8 12 Q1 SN74AHCT138RGYR RGY 16 SITE 41 180 12 3.8 4.3 1.5 8 12 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com Device 22-Sep-2007 Package Pins Site Length (mm) Width (mm) Height (mm) SN74AHCT138DBR DB 16 SITE 41 346.0 346.0 0.0 SN74AHCT138DGVR DGV 16 SITE 41 346.0 346.0 0.0 SN74AHCT138DR D 16 SITE 27 342.9 336.6 0.0 SN74AHCT138NSR NS 16 SITE 41 346.0 346.0 0.0 SN74AHCT138PWR PW 16 SITE 41 346.0 346.0 0.0 SN74AHCT138RGYR RGY 16 SITE 41 190.0 212.7 0.0 Pack Materials-Page 2 MECHANICAL DATA MLCC006B – OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°–8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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