EPCOS X8R

Multilayer ceramic capacitors
Chip capacitors, X8R
Date:
October 2006
Data Sheet
ã EPCOS AG 2006. Reproduction, publication and dissemination of this data sheet and the
information contained therein without EPCOS’ prior express consent is prohibited.
Multilayer ceramic capacitors
Chip
X8R
Ordering code system
B37541
K
5
102
K
0
60
Packaging
60
62
70
72
^
^
^
^
cardboard tape, 180-mm reel
blister tape, 180-mm reel
cardboard tape, 330-mm reel
blister tape, 330-mm reel
Internal coding
Capacitance tolerance
J ^ ± 5%
K ^ ± 10% (standard)
M ^ ± 20%
Capacitance, coded
(example)
Rated voltage
Termination
102 ^ 10 · 102 pF = 1 nF
103 ^ 10 · 103 pF = 10 nF
Rated voltage [VDC]
Code
Standard:
On request:
50
5
K ^ nickel barrier for all case sizes
J ^ silver-palladium for conductive adhesion for all case sizes
Type and size
Chip size
(inch / mm)
Temperature characteristic
X8R
0603 / 1608
0805 / 2012
1206 / 3216
1210 / 3225
B37540
B37541
B37472
B37550
Please read Cautions and warnings and
Important notes at the end of this document.
2
10/06
Chip
Multilayer ceramic capacitors
X8R
Features
■
■
■
■
■
Max. relative capacitance change up to 150 °C is ±15%
Non-linear capacitance change
High insulation resistance
High pulse strength
To AEC-Q200
Applications
■
■
■
■
■
Automotive
Blocking
Coupling
Decoupling
Interference suppression
Termination
■ For soldering: Nickel barrier terminations (Ni)
Options
■ Alternative capacitance tolerances available on request
Delivery mode
■ Cardboard and blister tape (blister tape for chip thickness ³1.2 ± 0.1 mm and case size 1210)
180-mm and 330-mm reel available
Electrical data
Temperature characteristic
Max. relative capacitance change
within –55 °C to +150 °C
Climatic category (IEC 60068-1)
Standard
Dielectric
Rated voltage1)
Test voltage
Capacitance range / E series
Dissipation factor (limit value)
Insulation resistance 2) at + 25 °C
Insulation resistance 2) at +125 °C
Time constant 2) at + 25 °C
Time constant 2) at +125 °C
Operating temperature range
Ageing 3)
X8R
DC/C
VR
Vtest
CR
tan d
Rins
Rins
t
t
Top
1) Note: No operation on AC line.
2) For CR >10 nF the time constant t = C · Rins is given.
3) Refer to chapter “General technical information”, “Ageing”.
Please read Cautions and warnings and
Important notes at the end of this document.
3
10/06
±15
55/150/56
EIA
Class 2
50
2.5 · VR/5 s
100 pF … 150 nF (E6)
<25 · 10 –3
>105
>104
>1000
>100
–55 … +150
yes
%
VDC
VDC
MW
MW
s
s
°C
Multilayer ceramic capacitors
X8R
X8R
Capacitance tolerances
Code letter
J
K
M
(standard)
Tolerance
± 5%
±10%
± 20%
Dimensional drawing
s
b
k
k
KKE0329-N
Dimensions (mm)
Case size
(inch)
(mm)
0603
1608
0805
2012
1206
3216
1210
3225
l
1.6 ± 0.15
2.00 ± 0.20
3.2 ± 0.20
3.2 ± 0.30
b
0.8 ± 0.10
1.25 ± 0.15
1.6 ± 0.15
2.5 ± 0.30
s
0.8 ± 0.10
1.30 max.
1.30 max.
1.30 max.
k
0.1 –0.40
0.13 –0.75
0.25 –0.75
0.25 –0.75
Tolerances to CECC 32101-801
Please read Cautions and warnings and
Important notes at the end of this document.
4
10/06
Multilayer ceramic capacitors
X8R
X8R
Recommended solder pad
C
A
D
KKE0308-1
Recommended dimensions (mm) for reflow soldering
Case size
(inch/mm)
Type
A
C
D
0603/1608
single chip
0.6 … 0.7
1.8 … 2.20
0.6 … 0.8
0805/2012
single chip
0.6 … 0.7
2.2 … 2.60
0.8 … 1.1
1206/3216
single chip
0.8 … 0.9
3.8 … 4.32
1.0 … 1.4
1210/3225
single chip
1.0 … 1.2
4.0 … 4.80
1.8 … 2.3
Recommended dimensions (mm) for wave soldering
Case size
(inch/mm)
Type
A
C
D
0603/1608
single chip
0.8 … 0.9
2.2 … 2.8
0.6 … 0.8
0805/2012
single chip
0.9 … 1.0
2.8 … 3.2
0.8 … 1.1
1206/3216
single chip
1.0 … 1.1
4.2 … 4.8
1.0 … 1.4
Termination
Termination
(nickel barrier)
Ceramic body
Inner electrode
Substrate electrode
Intermediate electrode
External electrode
AgPd
Ag
Ni
Sn
KKE0484-W
Please read Cautions and warnings and
Important notes at the end of this document.
5
10/06
X8R
Multilayer ceramic capacitors
X8R
Product range chip capacitors, X8R
Size1)
inch
mm
Type
VR (VDC)
CR
100
pF
150
pF
220
pF
330
pF
470
pF
680
pF
0603
1608
0805
2012
1206
3216
1210
3225
B37540
B37541
B37472
B37550
50
50
50
1.0 nF
1.5 nF
2.2 nF
3.3 nF
4.7 nF
6.8 nF
10
nF
15
nF
22
nF
33
nF
47
nF
68
nF
100
nF
150
nF
1) l ´ b (inch) / l ´ b (mm)
Please read Cautions and warnings and
Important notes at the end of this document.
6
10/06
50
Multilayer ceramic capacitors
X8R
X8R; 0603 and 0805
Ordering codes and packing for X8R, 50 VDC, nickel barrier terminations
mm
Cardboard tape,
Æ 180-mm reel
** ^ 60
pcs/reel
Cardboard tape,
Æ 330-mm reel
** ^ 70
pcs/reel
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
4000
4000
4000
4000
4000
4000
4000
4000
4000
4000
4000
16000
16000
16000
16000
16000
16000
16000
16000
16000
16000
16000
0.6 ± 0.1
0.6 ± 0.1
0.6 ± 0.1
0.6 ± 0.1
0.6 ± 0.1
0.6 ± 0.1
0.6 ± 0.1
0.6 ± 0.1
0.6 ± 0.1
0.6 ± 0.1
0.6 ± 0.1
5000
5000
5000
5000
5000
5000
5000
5000
5000
5000
5000
20000
20000
20000
20000
20000
20000
20000
20000
20000
20000
20000
Chip thickness
CR1)
Ordering code 2)
Case size 0603, 50 VDC
100. pF
150. pF
220. pF
330. pF
470. pF
680. pF
1.0 nF
1.5 nF
2.2 nF
3.3 nF
4.7 nF
B37540K5101K0**
B37540K5151K0**
B37540K5221K0**
B37540K5331K0**
B37540K5471K0**
B37540K5681K0**
B37540K5102K0**
B37540K5152K0**
B37540K5222K0**
B37540K5332K0**
B37540K5472K0**
Case size 0805, 50 VDC
470. pF
680. pF
1.0 nF
1.5 nF
2.2 nF
3.3 nF
4.7 nF
6.8 nF
10. nF
15. nF
22. nF
B37541K5471K0**
B37541K5681K0**
B37541K5102K0**
B37541K5152K0**
B37541K5222K0**
B37541K5332K0**
B37541K5472K0**
B37541K5682K0**
B37541K5103K0**
B37541K5153K0**
B37541K5223K0**
1) Other capacitance values on request.
2) The table contains the ordering codes for the standard capacitance tolerance.
For other available capacitance tolerances see page 4.
Please read Cautions and warnings and
Important notes at the end of this document.
7
10/06
X8R
Multilayer ceramic capacitors
X8R; 1206 and 1210
Ordering codes and packing for X8R, 50 VDC, nickel barrier terminations
Cardboard tape,
Æ 180-mm reel
** ^ 60
pcs/reel
Cardboard tape,
Æ 330-mm reel
** ^ 70
pcs/reel
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
1.2 ± 0.1
1.2 ± 0.1
4000
4000
4000
4000
4000
4000
4000
4000
4000
4000
4000
30003)
30003)
Blister tape,
Æ 180-mm reel
** ^ 62
pcs/reel
16000
16000
16000
16000
16000
16000
16000
16000
16000
16000
16000
120004)
120004)
Blister tape,
Æ 330-mm reel
** ^ 72
pcs/reel
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
0.8 ± 0.1
1.2 ± 0.1
4000
4000
4000
4000
4000
4000
4000
3000
16000
16000
16000
16000
16000
16000
16000
12000
Chip thickness
CR1)
Ordering code 2)
mm
Case size 1206, 50 VDC
1.0 nF
1.5 nF
2.2 nF
3.3 nF
4.7 nF
6.8 nF
10. nF
15. nF
22. nF
33. nF
47. nF
68. nF
100. nF
B37472K5102K0**
B37472K5152K0**
B37472K5222K0**
B37472K5332K0**
B37472K5472K0**
B37472K5682K0**
B37472K5103K0**
B37472K5153K0**
B37472K5223K0**
B37472K5333K0**
B37472K5473K0**
B37472K5683K0**
B37472K5104K0**
Case size 1210, 50 VDC
10.
15.
22.
33.
47.
68.
100.
150.
nF
nF
nF
nF
nF
nF
nF
nF
B37550K5103K0**
B37550K5153K0**
B37550K5223K0**
B37550K5333K0**
B37550K5473K0**
B37550K5683K0**
B37550K5104K0**
B37550K5154K0**
1) Other capacitance values on request.
2) The table contains the ordering codes for the standard capacitance tolerance.
For other available capacitance tolerances see page 4.
3) Blister tape, 180-mm reel, ordering code ** ^ 62
4) Blister tape, 330-mm reel, ordering code ** ^ 72
Please read Cautions and warnings and
Important notes at the end of this document.
8
10/06
Multilayer ceramic capacitors
X8R
X8R
Typical characteristics 1)
Capacitance change DC/C25 versus
temperature T
KKE0417-6
15
%
∆C
C 25
Capacitance change DC/C0 versus
superimposed DC voltage V
∆C
C0
5
KKE0489-3
5
%
100 nF/50 V/size 1206
0
_5
0
_5
_ 10
_ 10
_ 15
_ 20
_ 25
_ 30
_ 35
_ 40
_ 45
_ 50
_ 60 _ 40 _ 20 0 20 40 60 80 100 120 C 160
˚
_ 15
_ 20
_ 25
_ 30
_ 35
0
T
Dissipation factor tan d versus
temperature T
Impedance |Z| versus
frequency f
KKE0264-6
10 4
Ω
5 10 15 20 25 30 35 40 45 50 V
V
10
_1
KKE0265-D
Case size 1206
tan δ
Z
10 2
1 nF
10 1
10 nF
10 0
100 nF
10
10
10
_2
_1
_2
10
_
0
10
1
10
2
MHz 10
f
10 _3 _ _
60 40 20 0 20 40 60 80 100 120 ˚C 160
T
3
1) For more detailed information on frequency behavior and characteristics see www.epcos.com/mlcc_impedance.
Please read Cautions and warnings and
Important notes at the end of this document.
9
10/06
Multilayer ceramic capacitors
X8R
X8R
Typical characteristics 1)
Capacitance change DC/C1 versus
time t
Insulation resistance Rins versus
temperature T
KKE0266-L
10 7
∆C
C1
MΩ
R ins
10 6
KKE0394-X
10
%
5
0
10
5
_5
10 4
_ 10
10 3
10 2
_ 60
_ 15
_ 20
20
60
100
˚C
_ 20
10 0
160
T
10 1
10 2
10 3
10 4
h 10 5
t
1) For more detailed information on frequency behavior and characteristics see www.epcos.com/mlcc_impedance.
Please read Cautions and warnings and
Important notes at the end of this document.
10
10/06
Multilayer ceramic capacitors
Cautions and warnings
Notes on the selection of ceramic capacitors
In the selection of ceramic capacitors, the following criteria must be considered:
1. Depending on the application, ceramic capacitors used to meet high quality requirements should
at least satisfy the specifications to AEC-Q200. They must meet quality requirements going
beyond this level in terms of ruggedness (e.g. mechanical, thermal or electrical) in the case of
critical circuit configurations and applications (e.g. in safety-relevant applications such as ABS
and airbag equipment or durable industrial goods).
2. At the connection to the battery or power supply (e.g. clamp 15 or 30 in the automobile) and at
positions with stranding potential, to reduce the probability of short circuits following a fracture,
two ceramic capacitors must be connected in series and/or a ceramic capacitor with integrated
series circuit should be used. The MLSC from EPCOS contains such a series circuit in a single
component.
3. Ceramic capacitors with the temperature characteristics Z5U and Y5V do not satisfy the requirements to AEC-Q200 and are mechanically and electrically less rugged than C0G or X7R/X8R
ceramic capacitors. In applications that must satisfy high quality requirements, therefore, these
capacitors should not be used as discrete components (see the chapter “Effects on mechanical,
thermal and electrical stress”, point 1.4).
4. For ESD protection, preference should be given to the use of multilayer varistors (MLV) (see the
chapter “Effects on mechanical, thermal and electrical stress”, point 1.4).
5. An application-specific derating or continuous operating voltage must be considered in order to
cushion (unexpected) additional stresses (see the chapter “Reliability”).
The following should be considered in circuit board design
1. If technically feasible in the application, preference should be given to components having an
optimal geometrical design.
2. At least FR4 circuit board material should be used.
3. Geometrically optimal circuit boards should be used, ideally those that cannot be deformed.
4. Ceramic capacitors must always be placed a sufficient minimum distance from the edge of the
circuit board. High bending forces may be exerted there when the panels are separated and during further processing of the board (such as when incorporating it into a housing).
5. Ceramic capacitors should always be placed parallel to the possible bending axis of the circuit
board.
6. No screw connections should be used to fix the board or to connect several boards. Components should not be placed near screw holes. If screw connections are unavoidable, they must
be cushioned (for instance by rubber pads).
11
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Multilayer ceramic capacitors
Cautions and warnings
The following should be considered in the placement process
1. Ensure correct positioning of the ceramic capacitor on the solder pad.
2. Caution when using casting, injection-molded and molding compounds and cleaning agents,
as these may damage the capacitor.
3. Support the circuit board and reduce the placement forces.
4. A board should not be straightened (manually) if it has been distorted by soldering.
5. Separate panels with a peripheral saw, or better with a milling head (no dicing or breaking).
6. Caution in the subsequent placement of heavy or leaded components (e.g. transformers or
snap-in components): danger of bending and fracture.
7. When testing, transporting, packing or incorporating the board, avoid any deformation of the
board not to damage the components.
8. Avoid the use of excessive force when plugging a connector into a device soldered onto the
board.
9. Ceramic capacitors must be soldered only by the mode (reflow or wave soldering) permissible
for them (see the chapter “Soldering directions”).
10. When soldering the most gentle solder profile feasible should be selected (heating time, peak
temperature, cooling time) in order to avoid thermal stresses and damage.
11. Ensure the correct solder meniscus height and solder quantity.
12. Ensure correct dosing of the cement quantity.
13. Ceramic capacitors with an AgPd external termination are not suited for the lead-free solder
process: they were developed only for conductive adhesion technology.
This listing does not claim to be complete, but merely reflects the experience of EPCOS AG.
12
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Multilayer ceramic capacitors
Important notes
The following applies to all products named in this publication:
1. Some parts of this publication contain statements about the suitability of our products for
certain areas of application. These statements are based on our knowledge of typical
requirements that are often placed on our products in the areas of application concerned. We
nevertheless expressly point out that such statements cannot be regarded as binding
statements about the suitability of our products for a particular customer application. As
a rule, EPCOS is either unfamiliar with individual customer applications or less familiar with them
than the customers themselves. For these reasons, it is always ultimately incumbent on the
customer to check and decide whether an EPCOS product with the properties described in the
product specification is suitable for use in a particular customer application.
2. We also point out that in individual cases, a malfunction of passive electronic components
or failure before the end of their usual service life cannot be completely ruled out in the
current state of the art, even if they are operated as specified. In customer applications
requiring a very high level of operational safety and especially in customer applications in which
the malfunction or failure of a passive electronic component could endanger human life or health
(e.g. in accident prevention or life-saving systems), it must therefore be ensured by means of
suitable design of the customer application or other action taken by the customer (e.g.
installation of protective circuitry or redundancy) that no injury or damage is sustained by third
parties in the event of malfunction or failure of a passive electronic component.
3. The warnings, cautions and product-specific notes must be observed.
4. In order to satisfy certain technical requirements, some of the products described in this
publication may contain substances subject to restrictions in certain jurisdictions (e.g.
because they are classed as “hazardous”). Useful information on this will be found in our
Material Data Sheets on the Internet (www.epcos.com/material). Should you have any more
detailed questions, please contact our sales offices.
5. We constantly strive to improve our products. Consequently, the products described in this
publication may change from time to time. The same is true of the corresponding product
specifications. Please check therefore to what extent product descriptions and specifications
contained in this publication are still applicable before or when you place an order.
We also reserve the right to discontinue production and delivery of products.
Consequently, we cannot guarantee that all products named in this publication will always be
available.
6. Unless otherwise agreed in individual contracts, all orders are subject to the current version
of the “General Terms of Delivery for Products and Services in the Electrical Industry”
published by the German Electrical and Electronics Industry Association (ZVEI).
7. The trade names EPCOS, EPCOS-JONES, Baoke, CeraDiode, CSSP, MLSC, PhaseCap,
PhaseMod, SIFERRIT, SIFI, SIKOREL, SilverCap, SIMID, SIOV, SIP5D, SIP5K, UltraCap,
WindCap are trademarks registered or pending in Europe and in other countries. Further
information will be found on the Internet at www.epcos.com/trademarks.
13
10/06