MIC705/6/7/8 µP Supervisory Circuits MIC705/6/7/8 µP Supervisory Circuits Description Pin Configuration Top View The MIC705/MIC706/MIC707/MIC708 are inexpensive microprocessor supervisory circuits that monitor power supplies in microprocessor based systems. The circuit functions include a watchdog timer, microprocessor reset, power failure warning and a debounced manual reset input. MR 1 VCC 2 GND 3 PFI 4 MIC705 MIC706 8 WDO 7 RESET 6 WDI 5 PFO The MIC705 and MIC706 offer a watchdog timer function while the MIC707 and MIC708 have an active high reset output in addition to the active low reset output. N Package - 8 Lead Plastic DIP Package M Package - 8 Lead Plastic SOIC Package MR 1 VCC 2 Supply voltage monitor levels of 4.65V and 4.4V are available. The MIC705/MIC707 have a nominal reset threshold level of 4.65V while the MIC706 and MIC708 have a 4.4V nominal reset threshold level. When the supply voltage drops below the respective reset threshold level, RESET is asserted. GND 3 PFI 4 MIC707 MIC708 8 RESET 7 RESET 6 NC 5 PFO Features · Debounced Manual Reset Input is TTL/CMOS Compatible Typical Applications · Automotive Systems · Intelligent Instruments · Critical Microprocessor Power Monitoring · Printers · Computers · Controllers · Reset Pulse Width, 200ms · Watchdog Timer, 1.6s (MIC705/MIC706) · 4.4V or 4.65V Precision Voltage Monitor · Early Power Fail Warning or Low Battery Detect Typical Operating Circuit Ordering Information Part MIC70_N MIC70_M Package 8-Lead PDIP 8-Lead SOIC Temp. Range -40°C to +85°C -40°C to +85°C +5V (Regulated) Manual Reset DC Voltage VCC VCC MR RESET RESET WDI I/O Line MIC705 MIC706 (Unregulated) WDO PFI PFO µP NMI Interrupt 1 MIC705/6/7/8 µP Supervisory Circuits Absolute Maximum Ratings Terminal Voltage VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.0V All Other Inputs . . . . . . . . . . . . -0.3V to (VCC + 0.3V) Input Current VCC, Gnd. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA Output Current (all outputs) . . . . . . . . . . . . . . . . . 20mA Operating Temperature Range MIC70_N, MIC70_M . . . . . . . . . . . . . . . . . -40°C to 85°C Storage Temperature Range . . . . . . . . . . . . .-65°C to 150°C Lead Temperature (Soldering - 10 sec.) . . . . . . . . . . . 300°C Power Dissipation (PDIP) . . . . . . . . . . . . . . . . . . . . 475mW Power Dissipation (SOIC) . . . . . . . . . . . . . . . . . . . . 400mW Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability. Operating ranges define those limits between which the functionality of the device is guaranteed. Electrical Characteristics VCC = 4.75V to 5.5V for MIC705/MIC707, VCC = 4.5V to 5.5V for MIC706/MIC708, TA = -40°C to 85°C unless otherwise noted. Parameter Conditions Min Operating Voltage Range, VCC MIC70-- 1.4 Supply Current MIC70-- Reset Voltage Threshold MIC705, MIC707 MIC706, MIC708 4.50 4.25 Reset Threshold Hysteresis RESET Output Voltage 140 ISource = 800µA ISink = 3.2mA MIC70--C, ISink = 50µA, VCC = 1.4V VCC - 1.5V ISource = 800µA ISink = 1.2mA VCC - 1.5V Watchdog Timeout Period, tWD 1.0 WDI Minimum Input Pulse, tWP VIL = 0.4V, VIH = 80% of VCC 50 WDI Threshold Voltage VIH, VCC = 5V VIL, VCC = 5V 3.5 WDI Input Current WDO Output Voltage 2 4.65 4.4 Max Units 5.5 V 60 µA 4.75 4.5 V 40 Reset Pulse Width, tRS RESET Output Voltage Typ WDI = 0V WDI = VCC ISource = 800µA ISink = 1.2mA 200 mV 280 ms V 0.4 0.3 V 0.4 1.6 2.25 sec ns V 0.8 -150 VCC - 1.5V -50 50 µA 150 V 0.4 MIC705/6/7/8 µP Supervisory Circuits Electrical Characteristics VCC = 4.75V to 5.5V for MIC705/MIC707, VCC = 4.5V to 5.5V for MIC706/MIC708, TA = -40°C to 85°C unless otherwise noted. Parameter Conditions Min Typ Max Units MR Pull-Up Current MR = 0V 100 250 600 µA MR Pulse Width, tMR MR Input Threshold 150 VIL VIH nS MR to Reset Output Delay, tMD PFI Input Threshold VCC = 5V PFI Input Current PFO Output Voltage ISink = 3.2mA VCC = 5V, ISource = 800µA 0.8 V 250 nS 2.0 1.2 1.25 1.3 V -25 0.01 +25 nA 0.4 V VCC - 1.5V 3 MIC705/6/7/8 µP Supervisory Circuits Pin Functions Pin No. MIC705 MIC706 MIC707 MIC708 MR 1 1 Manual Reset Input forces RESET to assert when pulled below 0.8V. An internal pull-up current of 250µA on this input forces it high when left floating. This input can also be driven from TTL or CMOS logic. VCC 2 2 Primary supply input, +5V. GND 3 3 IC ground pin, 0V reference. PFI 4 4 Power fail input. Internally connected to the power fail comparator which is referenced to 1.25V. The power fail output (PFO) remains high if PFI is above 1.25V. PFI should be connected to GND or VOUT if the power fail comparator is not used. PFO 5 5 Power fail output. The power fail comparator is independent of all other functions on this device. WDI 6 N/A Watchdog input. The WDI input monitors microprocessor activity, an internal watchdog timer resets itself with each transition on the watchdog input. If the WDI pin is held high or low for longer than the watchdog timeout period, WDO is forced to active low. The watchdog function can be disabled by floating the WDI pin. N/C N/A 6 No Connect RESET 7 7 RESET is asserted if either VCC goes below the reset threshold or by a low signal on the manual reset input (MR). RESET remains asserted for one reset timeout period (200ms) after VCC exceeds the reset threshold or after the manual reset pin transitions from low to high. The watchdog timer will not assert RESET unless WDO is connected to MR. WDO 8 N/A Output for the watchdog timer. The watchdog timer resets itself with each transition on the watchdog input. If the WDI pin is held high or low for longer than the watchdog timeout period, WDO is forced low. WDO will also be forced low if VCC is below the reset threshold and will remain low until VCC returns to a valid level. N/A 8 RESET is the compliment of RESET and is asserted if either VCC goes below the reset threshold or by a low signal on the manual reset input (MR). RESET is suitable for microprocessors systems that use an active high reset. Pin Name RESET 4 MIC705/6/7/8 µP Supervisory Circuits Block Diagram VCC 250¥A MR (1) RESET + VCC (2) GENERATOR RESET (7) - 4.65V* WDO (8) WATCHDOG WDI (6) TIMER + PFI (4) PFO (5) - 1.25V * 4.4V for MIC706 Figure 1. MIC705/MIC706 Block Diagram VCC 250µA RESET (8) MR (1) RESET + VCC (2) 4.65V* GENERATOR RESET (7) - + PFI (4) PFO (5) 1.25V - * 4.4V for MIC708 Figure 2. MIC707/MIC708 Block Diagram 5 MIC705/6/7/8 µP Supervisory Circuits Circuit Description Power Fail Warning An additional comparator which is independent of other functions on the MIC705/706/707/708 is provided for early warning of power failure. An external voltage Unregulated DC R1 PFI + R2 1.25V - PFO Figure 3. Power Fail Comparator divider can be used to compare unregulated DC to an internal 1.25V reference. The voltage divider ratio on the input of the power fail comparator (PFI) can be chosen so as to trip the power fail comparator a few milliseconds before VCC falls below the maximum reset threshold voltage. The output of the power fail comparator (PFO) can be used to interrupt the microprocessor when used in this mode and execute shut-down procedures prior to power loss. Watchdog Timer The microprocessor can be monitored by connecting the WDI pin (watchdog input) to a bus line or I/O line. If a transition doesn’t occur on the WDI pin within the watchdog timeout period, then WDO will go low. A minimum pulse of 50ns or any transition low-to-high or high-to-low on the WDI pin will reset the watchdog timer. 6 The output of the watchdog timer (WDO) will remain high if WDI sees a valid transition within the watchdog timeout period or if WDI is left floating. If VCC falls below the reset threshold voltage then WDO goes low immediately regardless of WDI. Thus, if WDI is left floating, then WDO can be used as a low line indicator. Microprocessor Reset The RESET pin is asserted whenever VCC falls below the reset threshold voltage or when MR goes low. The reset pin remains asserted for a period of 200ms after VCC has risen above the reset threshold voltage and MR goes high. The reset function ensures the VCC VRT tMR MR tMD tRS tRS RESET WDO Figure 4. Reset Timing Diagram microprocessor is properly reset and powers up into a known condition after a power failure. RESET will remain valid with VCC as low as 1.4V. MIC705/6/7/8 µP Supervisory Circuits Alternate Source Cross Reference Guide Industry P/N MAX705CPA MAX705CSA MAX705EPA MAX705ESA ADM705AN DS1705EPA DS1705ESA MAX706CPA MAX706CSA MAX706EPA ADM706AN DS1706EPA DS1706ESA MAX707CPA MAX707CSA MAX707EPA MAX707ESA ADM707AN DS1707EPA DS1707ESA MAX708CPA MAX708CSA MAX708EPA MAX708ESA ADM708AN DS1708EPA DS1708ESA MIC Direct Replacement MIC705N MIC705M MIC705N MIC705M MIC705N MIC705N MIC705M MIC706N MIC706M MIC706N MIC706N MIC706N MIC706M MIC707N MIC707M MIC707N MIC707M MIC707N MIC707N MIC707M MIC708N MIC708M MIC708N MIC708M MIC708N MIC708N MIC708M 7 MIC705/6/7/8 µP Supervisory Circuits Packaging Information M Package, 8-Pin Small Outline 0.197 0.190 Pin 1 Identifier 0.155 0.244 0.150 0.228 0.012 0.069 0.009 0.053 0-8¼ 0.060 0.019 0.040 0.050 0.011 0.016 0.004 0.013 N Package, 8-Pin Plastic Dual-In-Line 0.400 0.370 0.260 0.240 0.310 0.290 0.150 0.120 0.035 0.015 0.150 0.125 0.023 0.015 8 0.110 0.090 0.370 0.300