Micrel, Inc. 3.3V 1:9 HIGH-PERFORMANCE, LOW-VOLTAGE BUS CLOCK DRIVER Precision Edge® ® SY89809L Precision Edge SY89809L FEATURES ■ 3.3V core supply, 1.8V output supply for reduced ■ ■ ■ ■ ■ ■ ■ Precision Edge® power LVPECL and HSTL inputs 9 differential HSTL (low-voltage swing) output pairs HSTL outputs drive 50Ω to ground with no offset voltage 500MHz maximum clock frequency Low part-to-part skew (200ps max.) Low pin-to-pin skew (50ps max.) Available in 32-pin TQFP package DESCRIPTION The SY89809L is a High-Performance Bus Clock Driver with 9 differential HSTL (High-Speed Transceiver Logic) output pairs. The part is designed for use in low-voltage (3.3V/1.8V) applications which require a large number of outputs to drive precisely aligned, ultralow skew signals to their destination. The input is multiplexed from either HSTL or LVPECL (Low-Voltage Positive-Emitter-Coupled Logic) by the CLK_SEL pin. The Output Enable (OE) is synchronous so that the outputs will only be enabled/ disabled when they are already in the LOW state. This avoids any chance of generating a runt clock pulse when the device is enabled/disabled as can happen with an asynchronous control. The SY89809L features low pin-to-pin skew (50ps max.) and low part-to-part skew (200ps max.)—performance previously unachievable in a standard product having such a high number of outputs. The SY89809L is available in a single space saving package, enabling a lower overall cost solution. LOGIC SYMBOL CLK_SEL HSTL_CLK 0 /HSTL_CLK 9 9 Q0 – Q8 /Q0 – /Q8 LVPECL_CLK 1 LEN /LVPECL_CLK Q APPLICATIONS D OE ■ High-performance PCs ■ Workstations ■ Parallel processor-based systems ■ Other high-performance computing ■ Communications TRUTH TABLE SIGNAL GROUPS OE(1) CLK_SEL Q0 – Q8 /Q0 – /Q8 0 0 LOW HIGH HSTL Input 0 1 LOW HIGH HSTL Output 1 0 HSTL_CLK /HSTL_CLK 1 1 LVPECL_CLK /LVPECL_CLK Level Direction Signal HSTL_CLK, /HSTL_CLK Q0 – Q8, /Q0 – /Q8 LVPECL Input LVPECL_CLK, /LVPECL_CLK LVCMOS/LVTTL Input CLK_SEL, OE Note: 1. The OE (output enable) signal is synchronized with the low level of the HSTL_CLK and LVPECL_CLK signal. Precision Edge is a registered trademark of Micrel, Inc. M9999-092005 [email protected] or (408) 955-1690 Rev.: E 1 Amendment: /0 Issue Date: September 2005 Precision Edge® SY89809L Micrel, Inc. VCCI HSTL_CLK /Q2 Ordering Information(1) VCCO /Q1 Q2 /Q0 Q1 Q0 VCCO PACKAGE/ORDERING INFORMATION 32 31 30 29 28 27 26 25 24 1 23 2 SY89809LTC Sn-Pb Industrial SY89809LTC Sn-Pb T32-1 Industrial /Q4 SY89809LTH with NiPdAu Pb-Free bar line indicator Pb-Free 19 Q5 SY89809LTHTR(2, 3) T32-1 Industrial 18 /Q5 SY89809LTH with NiPdAu Pb-Free bar line indicator Pb-Free 7 OE 8 17 9 10 11 12 13 14 15 16 VCCO VCCO 6 Q6 Industrial T32-1 20 GND Q7 T32-1 SY89809LTH(3) /LVPECL_CLK /Q6 SY89809LTC /Q3 5 Q8 Lead Finish Q4 LVPECL_CLK /Q7 Package Marking 21 4 /Q8 Operating Range 22 3 CLK_SEL VCCO Q3 Package Type SY89809LTCTR(2) /HSTL_CLK Top View TQFP T32-1 VCCO Part Number Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only. 2. Tape and Reel. 3. Pb-Free package is recommended for new designs. 32-Pin TQFP (T32-1) PIN DESCRIPTION Pin Number Pin Name Type Pin Function 2, 3 HSTL_CLK, /HSTL_CLK HSTL Input Differential clock input selected by CLK_SEL. Can be left floating if not selected. Floating input, if selected produces an indeterminate output. HSTL input signal requires external termination 50Ω to GND. 5, 6 LVPECL_CLK, /LVPECL_CLK LVPECL Input 4 CLK_SEL LVTTL Input Selects HSTL_CLK input when LOW and LVPECL_CLK output when HIGH. 11kΩ pull-up. 8 OE LVTTL Input Enable input synchronized internally to prevent glitching of the Q0-Q8 and /Q0-/Q8 outputs. Must be a minimum of three clock periods wide if synchronous with the CLK inputs and must meet the tS and tH requirements (refer to AC Electrical Characteristics). If asynchronous, must be a minimum of four clock periods wide. 11kΩ pull-up. 31, 29, 27, 23, 21, 19, 15, 13, 11 Q0–Q8 HSTL Output Differential clock outputs from HSTL_CLK when CLK_SEL = LOW and LVPECL outputs when CLK_SEL = HIGH. HSTL outputs must be terminated with 50Ω to GND. Q0–Q8 outputs are static LOW when OE = LOW. Unused output pairs may be left floating. 30, 28, 26, 22, 20, 18, 14, 12, 10 /Q0–/Q8 HSTL Output Differential clock outputs from HSTL_CLK when CLK_SEL = LOW and LVPECL outputs when CLK_SEL = HIGH. HSTL outputs must be terminated with 50Ω to GND. /Q0–/Q8 outputs are static HIGH when OE = LOW. Unused output pairs may be left floating. 1 VCCI VCC Core Power 9, 16, 17, 24, 25, 32 VCCO VCC Output Power 7 GND Ground M9999-092005 [email protected] or (408) 955-1690 Differential clock input selected by CLK_SEL. Can be left floating. Floating input, if selected produces a LOW at the output (internal 75Ω pull-downs). Requires external termination. 75kΩ pull-up. Core VCC connected to 3.3V supply. Bypass with 0.1µF in parallel with 0.01µF low ESR capacitors as close to VCCI pin as possible. Output Buffer VCC connected to 1.8V supply. Bypass with 0.1µF in parallel with 0.01µF low ESR capacitors as close to VCCO pins as possible. All VCCO pins should be connected together on the PCB. Ground. 2 Precision Edge® SY89809L Micrel, Inc. Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VIN) ..................................... –0.5V to VCCI VCC Pin Potential to Ground Pin (VCCI, VCCO) ............................................ –0.5V to +4.0V DC Output Current, Output HIGH (IOUT) .................. –50mA Lead Temperature (soldering, 20 sec.) ..................... 260°C Storage Temperature (TS) ....................... –65°C to +150°C Supply Voltage (VCCI) ............................................... +3.15V to +3.45V (VCCO) ................................................. +1.6V to +2.0V Ambient Temperature (TA) ......................... –40°C to +85°C Package Thermal Resistance TQFP (θJA) –Still-Air ........................................................... 50°C/W –500lfpm .......................................................... 42°C/W TQFP (θJC) .......................................................... 20°C/W DC ELECTRICAL CHARACTERISTICS Power Supply TA = 0°C Symbol Parameter TA = +25°C TA = +85°C Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit VCCI VCC Core 3.0 3.3 3.6 3.0 3.3 3.6 3.0 3.3 3.6 V VCCO VCC Output 1.6 1.8 2.0 1.6 1.8 2.0 1.6 1.8 2.0 V ICCI ICC Core — 115 140 — 115 140 — 115 140 mA HSTL TA = 0°C Symbol Parameter TA = +25°C TA = +85°C Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit VOH Output HIGH Voltage(3) 1.0 — 1.2 1.0 — 1.2 1.0 — 1.2 V VOL Output LOW Voltage(3) 0.2 — 0.4 0.2 — 0.4 0.2 — 0.4 V VIH Input HIGH Voltage VX +0.1 — 1.6 VX +0.1 — 1.6 VX +0.1 — 1.6 V VIL Input LOW Voltage –0.3 — VX –0.1 –0.3 — VX –0.1 –0.3 — VX –0.1 V VX Input Crossover Voltage 0.68 — 0.9 0.68 — 0.9 0.68 — 0.9 V IIH Input HIGH Current +20 — –350 +20 — –350 +20 — –350 µA IIL Input LOW Current — — –500 — — –500 — — –500 µA Notes: 1. Permanent device damage may occur if “Absolute Maximum Ratings” are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratlng conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Outputs loaded with 50Ω to ground. M9999-092005 [email protected] or (408) 955-1690 3 Precision Edge® SY89809L Micrel, Inc. DC ELECTRICAL CHARACTERISTICS (continued) LVPECL TA = 0°C Symbol Parameter Min. TA = +25°C Max. Min. TA = +85°C Max. Min. Max. Unit VIH Input HIGH Voltage VCCI – 1.165 VCCI – 0.880 VCCI – 1.165 VCCI – 0.880 VCCI – 1.165 VCCI – 0.880 V VIL Input LOW Voltage VCCI – 1.810 VCCI – 1.475 VCCI – 1.810 VCCI – 1.475 VCCI – 1.810 VCCI – 1.475 V IIH Input HIGH Current — +150 — +150 — +150 µA IIL Input LOW Current 0.5 — 0.5 — 0.5 — µA LVCMOS/LVTTL TA = 0°C Symbol Parameter TA = +25°C TA = +85°C Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit VIH Input HIGH Voltage 2.0 — — 2.0 — — 2.0 — — V VIL Input LOW Voltage — — 0.8 — — 0.8 — — 0.8 V IIH Input HIGH Current +20 — –250 +20 — –250 +20 — –250 µA IIL Input LOW Current — — –600 — — –600 — — –600 µA M9999-092005 [email protected] or (408) 955-1690 4 Precision Edge® SY89809L Micrel, Inc. AC ELECTRICAL CHARACTERISTICS(4) TA = 0°C Symbol TA = +85°C Parameter Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Delay(5) — 1.0 — — 1.0 — — 1.0 — ns 500 — — 500 — — 500 — — MHz — — 50 — — 50 — — 50 ps — — 200 — — 200 — — 200 ps 600 — — 600 — — 600 — — mV tPHL tPLH Propagation fMAX Maximum Operating Freq.(6) tSKEW Within-Device Skew(7) tSKPP TA = +25°C Part-to-Part Skew(8) Swing(9) VPP Minimum Input LVPECL_CLK VCMR Common Mode Range(10) LVPECL_CLK –1.5 — –0.4 –1.5 — –0.4 –1.5 — –0.4 V tS OE Set-Up Time(11) 1.0 — — 1.0 — — 1.0 — — ns tH OE Hold Time 0.5 — — 0.5 — — 0.5 — — ns tr tf Output Rise/Fall Time (20% – 80%) 300 — 650 300 — 650 300 — 650 ps Notes: 4. Outputs loaded with 50Ω to ground. Airflow ≥ 300lfpm. 5. Differential propagation delay is defined as the delay from the crossing point of the differential input signals to the crossing point of the differential output signals. 6. Output swing greater than 450mV. 7. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device operating at the same voltage and temperature. 8. The part-to-part skew is defined as the absolute worst case difference between any two delay paths on any two devices operating at the same voltage and temperature. 9. The VPP(min.) is defined as the minimum input differential voltage which will cause no increase in the propagation delay. 10. VCMR is defined as the range within which the VIH level may vary, with the device still meeting the propagation delay specification. The numbers in the table are referenced to VCCI. The VIL level must be such that the peak-to-peak voltage is less than 1.0V and greater than or equal to VPP(min.). The lower end of the CMR range varies 1:1 with VCCI. The VCMR(min) will be fixed at 3.3V – |VCMR(min)|. 11. OE set-up time is defined with respect to the rising edge of the clock. OE HIGH-to-LOW transition ensures outputs remain disabled during the next clock cycle. OE LOW-to-HIGH transition enables normal operation of the next input clock. M9999-092005 [email protected] or (408) 955-1690 5 Precision Edge® SY89809L Micrel, Inc. VCCI = 3.0V VCCO = 1.6V TA = 25¡C /Q (180mV/div) Q (100mV/div) OUTPUT WAVEFORMS TIME (2ns/div) VCCI = 3.0V VCCO = 1.6V TA = 25¡C /Q (180mV/div) Q (100mV/div) Figure 1. 100MHz Output Waveform TIME (2ns/div) Figure 2. 300MHz Output Waveform M9999-092005 [email protected] or (408) 955-1690 6 Precision Edge® SY89809L Micrel, Inc. 32 LEAD TQFP (T32-1) MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB USA http://www.micrel.com The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2005 Micrel, Incorporated. M9999-092005 [email protected] or (408) 955-1690 7