M74HC670 4 WORD x 4 BIT REGISTER FILE (3 STATE) ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 22 ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 670 DESCRIPTION The M74HC670 is an high speed CMOS 4WORD x 4 BIT REGISTER FILE (3 STATE) fabricated with silicon gate C2MOS technology. The M74HC670 is 4 x 4 Register File organized as four words by four bits. Separate read and write inputs, both address and enable, allow simultaneous read and write operation. The DIP SOP TSSOP ORDER CODES PACKAGE TUBE DIP SOP TSSOP M74HC670B1R M74HC670M1R T&R M74HC670RM13TR M74HC670TTR 3-state outputs make it possible to connect up to 128 outputs to increase the word capacity up to 512 words. Any number of these devices can be operated in parallel to generate an n-bit length. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/11 M74HC670 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 5, 4 10, 9, 7, 6 RA, RB Q1 to Q4 11 RE 12 WE 14, 13 15, 1, 2, 3 8 16 WA, WB D1 to D4 GND Vcc Read Address Inputs Data Outputs 3 - State Output Read Enable Input Write Enable Input (Active LOW) Write Address Inputs Data Inputs Ground (0V) Positive Supply Voltage WRITE FUNCTION TABLE WRITE INPUTS WORDS WB WA WE 0 1 2 3 L L H H X L H L H X L L L L H Q=D Q0 Q0 Q0 Q0 Q0 Q=D Q0 Q0 Q0 Q0 Q0 Q=D Q0 Q0 Q0 Q0 Q0 Q=D Q0 READ FUNCTION TABLE READ INPUTS OUTPUTS RB RA RE Q0 Q1 Q2 Q3 L L H H X L H L H X L L L L H W0B1 W1B1 W2B1 W3B1 Z W0B2 W1B2 W2B2 W3B2 Z W0B3 W1B3 W2B3 W3B3 Z W0B4 W1B4 W2B4 W3B4 Z X : Don’t Care Z : High Impedance (Q = D) = The four select internal flip-flop outputs will assume the states applied to the four external data inputs. Q0 = The level of Q before the indicated input conditions were established. W0B1 = The firs bit of word 0, etc. 2/11 M74HC670 LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Supply Voltage Value Unit -0.5 to +7 V -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 V DC Input Diode Current ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ± 50 mA VI DC Input Voltage VO DC Output Voltage IIK ICC or IGND DC VCC or Ground Current PD Power Dissipation Tstg Storage Temperature TL Lead Temperature (10 sec) V 500(*) mW -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C 3/11 M74HC670 RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Value Supply Voltage VI Input Voltage VO Output Voltage Top Operating Temperature Input Rise and Fall Time tr, tf Unit 2 to 6 V 0 to VCC V 0 to VCC V -55 to 125 °C VCC = 2.0V 0 to 1000 ns VCC = 4.5V 0 to 500 ns VCC = 6.0V 0 to 400 ns DC SPECIFICATIONS Test Condition Symbol VIH VIL VOH VOL II IOZ ICC 4/11 Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current High Impedance Output Leakage Current Quiescent Supply Current Value TA = 25°C VCC (V) Min. 2.0 4.5 6.0 2.0 4.5 6.0 Typ. Max. 1.5 3.15 4.2 -40 to 85°C -55 to 125°C Min. Min. Max. 1.5 3.15 4.2 0.5 1.35 1.8 Max. 1.5 3.15 4.2 0.5 1.35 1.8 Unit V 0.5 1.35 1.8 2.0 IO=-20 µA 1.9 2.0 1.9 1.9 4.5 IO=-20 µA 4.4 4.5 4.4 4.4 6.0 IO=-20 µA 5.9 6.0 5.9 5.9 4.5 IO=-4.0 mA 4.18 4.31 4.13 4.10 6.0 IO=-5.2 mA 5.68 5.8 5.63 5.60 2.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=20 µA 0.0 0.1 0.1 0.1 V V 6.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=4.0 mA 0.17 0.26 0.33 0.40 6.0 IO=5.2 mA 0.18 0.26 0.33 0.40 6.0 VI = VCC or GND ± 0.1 ±1 ±1 µA 6.0 VI = VIH or VIL VO = VCC or GND ± 0.5 ±5 ±5 µA 6.0 VI = VCC or GND 4 40 80 µA V M74HC670 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time (RA, RB - Qn) tPLH tPHL Propagation Delay Time (WE - Qn) tPLH tPHL Propagation Delay Time (Dn - Qn) tPZL tPZH High Impedance Output Enable Time tPLZ tPHZ High Impedance Output Disable Time tW(L) ts th th tlatch Minimum Pulse Width (WE) Minimum Set-up Time (Dn -WE) (WA, WB - WE) Minimum Hold Time (Dn - WE) Minimum Hold Time (WA, WB - WE) Minimum Latch Time (WE - RA, RB) Value TA = 25°C VCC (V) Min. 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 RL = 1 KΩ RL = 1 KΩ Typ. Max. 30 8 7 96 24 20 108 27 23 104 26 22 42 13 11 25 13 11 16 4 3 12 3 3 75 15 13 185 37 31 220 44 37 185 37 31 110 22 19 95 19 16 75 15 13 50 10 9 0 0 0 5 5 5 5 5 5 -40 to 85°C -55 to 125°C Min. Min. Max. 95 19 16 230 46 39 275 55 47 230 46 39 140 28 24 120 24 20 95 19 16 65 13 11 0 0 0 5 5 5 5 5 5 Unit Max. 110 22 19 280 56 48 330 66 56 280 56 48 165 33 28 145 29 25 110 22 19 75 15 13 0 0 0 5 5 5 5 5 5 ns ns ns ns ns ns ns ns ns ns ns CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter VCC (V) Value TA = 25°C Min. Typ. Max. 10 CIN Input Capacitance 5.0 5 CPD Power Dissipation Capacitance (note 1) 5.0 96 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC 5/11 M74HC670 TEST CIRCUIT TEST tPLH, tPHL SWITCH Open tPZL, tPLZ VCC tPZH, tPHZ GND CL = 50pF/150pF or equivalent (includes jig and probe capacitance) R1 = 1KΩ or equivalent RT = ZOUT of pulse generator (typically 50Ω) WAVEFORM 1 : PROPAGATION DELAY, MINIMUM PULSE WIDTH, SETUP AND HOLD TIME, MINIMUM LATCH TIME (f=1MHz; 50% duty cycle) 6/11 M74HC670 WAVEFORM 2 : PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle) WAVEFORM 3 : OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) 7/11 M74HC670 Plastic DIP-16 (0.25) MECHANICAL DATA mm. inch DIM. MIN. a1 0.51 B 0.77 TYP MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L Z 3.3 0.130 1.27 0.050 P001C 8/11 M74HC670 SO-16 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45° (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8° (max.) PO13H 9/11 M74HC670 TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0° L 0.45 A 0.60 0.0256 BSC 8° 0° 0.75 0.018 8° 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 10/11 M74HC670 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom © http://www.st.com 11/11