ST2S06A33 ST2S06B - ST2S06D33 Dual synchronous rectification with reset or inhibit, 0.5 A, 1.5 MHz adjustable step-down switching regulator Features ■ Step-down current mode PWM (1.5 MHz) DC-DC converter ■ Fixed or adjustable output voltage from 0.8 V ■ 2% DC output voltage tolerance ■ Synchronous rectification ■ Reset function for A and D versions ■ Inhibit function for B version ■ Internal soft start for start-up current limitation and power ON delay of 50-100 µs ■ Typical efficiency: > 90% ■ 0.5 A output current capability ■ Non-switching quiescent current: max 1 mA over temperature range ■ RDS(ON) 150 mΩ (typ.) ■ Uses tiny capacitors and inductors ■ Available in QFN12L (4x4 mm) QFN12L (4x4 mm) the power dissipation may cause a high heating of the application environment. It provides up to 0.5 A over an input voltage range of 2.5 V to 5.5 V. Description The ST2S06 is a dual step-down DC-DC converter optimized for powering low-voltage digital cores in ODD applications and, generally, to replace the high current linear solution when Table 1. A high switching frequency of 1.5 MHz allows the use of tiny surface-mount components as well as a resistor divider to set the output voltage value. Only an inductor and two capacitors are required. A low output ripple is guaranteed by the current mode PWM topology and the utilization of low ESR SMD ceramic capacitors. The device is thermally protected and current limited to prevent damage due to accidental short circuit. The ST2S06 series is available in the QFN12L (4x4 mm) package. Device summary Order code Package Packaging ST2S06APQR(1) QFN12L (4x4 mm) Tape and reel ST2S06A33PQR QFN12L (4x4 mm) Tape and reel ST2S06D33PQR QFN12L (4x4 mm) Tape and reel ST2S06BPQR QFN12L (4x4 mm) Tape and reel 1. Available on request. March 2008 Rev 3 1/21 www.st.com 21 Contents ST2S06A33 - ST2S06B - ST2S06D33 Contents 1 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2/21 ST2S06A33 - ST2S06B - ST2S06D33 1 Diagram Figure 1. Schematic diagram Diagram RESET_OUT * VI_SW VI_A Delay Ref SW HV Trimming FB1 VI_SW SW2 FB2 CONTROL LOGIC Ref Soft Start GND INH** GND * ST2S06A/D ** ST2S06B 3/21 Pin configuration ST2S06A33 - ST2S06B - ST2S06D33 2 Pin configuration Figure 2. Pin connections (top view) Table 2. Pin description Pin n° ST2S06A/D ST2S06B 1 HV HV Programing pin. It must be floating or connected to GND. 2 FB2 FB2 Feedback voltage 3 GND2 GND2 Power ground 4 SW2 SW2 Switching pin 5 VIN_SW VIN_SW 6 SW1 SW1 Switching pin 7 GND1 GND1 Power ground 8 FB1/OUT1 FB1 Feedback voltage / output voltage 9 Reset_out NC Reset out pin 10 NC INH Inhibit pin 11 VIN_A VIN_A Supply for analog circuit 12 GND_A GND_A System ground 4/21 Name and function Power input voltage pin ST2S06A33 - ST2S06B - ST2S06D33 Maximum ratings 3 Maximum ratings Table 3. Absolute maximum ratings Symbol Parameter Value Unit VIN_SW Positive power supply voltage -0.3 to 7 V VIN_A Positive power supply voltage -0.3 to 7 V VINH Inhibit voltage -0.3 to 7 V Max. voltage of output pin -0.3 to 7 V -0.3 to 2.5 V Output voltage (for VO > 1.6 V) -0.3 to 5 V Common mode input voltage +1 to -1 mA 150 °C -65 to +150 °C 300 °C SWITCH voltage VFB1,2/VO1 Feedback voltage/output voltage VO1 Current into VFB pin TJ Max junction temperature TSTG Storage temperature range TLEAD Lead temperature (soldering) 10 sec. Note: Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Table 4. Thermal data Symbol Parameter Value Unit RthJC Thermal resistance junction-case 10 °C/W RthJA Thermal resistance junction-ambient 60 °C/W Table 5. Symbol ESD ESD performance Parameter ESD protection voltage Test conditions HBM-DH11C Value Unit 4 kV 5/21 Electrical characteristics ST2S06A33 - ST2S06B - ST2S06D33 4 Electrical characteristics Table 6. Electrical characteristics for ST2S06A (VIN_SW = VIN_A = 5 V, VO1,2 = 1.2 V, C1 = 4.7 µF, C2 = C3 = 22 µF, L1 = L2 = 3.3 µH, TJ = -30 to 125 °C unless otherwise specified. Typical values are referred to 25 °C Symbol Parameter Test conditions FB1,2 Feedback voltage IFB1,2 VFB pin bias current VFB = 1 V Quiescent current VFB = 1 V IQ Min. Typ. Max. Unit 784 800 816 mV 600 nA 1.2 mA (1) IO1,2 Output current IMIN Minimum output current %VO1,2/ ΔVIN Reference line regulation 2.5 V < VIN < 5.5 V 0.032 ΔVO1,2 Reference load regulation 10 mA < IO < 0.5 A 5.5 15 mV PWM fS PWM switching frequency VFB = 0.7 V, TA = 25°C 1.2 1.5 1.8 MHz DMAX Maximum duty cycle VFB = 0.7 V, TA = 25°C 85 94 % ISWL Switching current limitation 1 1.2 A ILKN NMOS leakage current VFB = 0.9 V, TA = 25°C 0.1 µA ILKP PMOS leakage current VFB = 0.9 V, TA = 25°C 0.1 µA VIN = 2.5 to 5.5 V 0.8 A 1 mA %VO/ VIN RDSon-N NMOS switch on resistance ISW = 250 mA 0.15 0.3 Ω RDSon-P PMOS switch on resistance ISW = 250 mA 0.2 0.4 Ω η Efficiency TSHDN Thermal shut down THYS Thermal shut down hysteresis (2) IO = 20 mA to 100 mA 75 % IO = 100 mA to 0.5 A 90 % 150 °C 15 °C (2) ΔVO1,2/ΔIO Load transient response (2) 130 100 mA < IO < 500 mA, tR = tF => 100 ns, TA = 25°C -5 +5 %VO Reset section tDEL Delay time TA = 25°C 80 85 Reset in threshold measured on input pin VIN_A Rising 4.5 4.6 4.75 VRES VIN_A Falling 4.12 4.2 4.28 1. VO = 90% of nominal value. 2. Guaranteed by design, but not tested in production. 6/21 ms V ST2S06A33 - ST2S06B - ST2S06D33 Table 7. Electrical characteristics Electrical characteristics for ST2S06A33 (VIN_SW = VIN_A = 5 V, V01 = 3.3 V, VO2 = 1.2 V, C1 = 4.7 µF, C2 = C3 = 22 µF, L1 = L2 = 3.3 µH, TJ = -30 to 125 °C unless otherwise specified. Typical values are referred to 25 °C Symbol Min. Typ. Max. Unit Output feedback pin 3.23 3.3 3.37 V FB2 Feedback voltage 784 800 816 mV IO1 IO1 pin bias current VO = 3.5 V 15 20 µA IFB2 VFB pin bias current VFB = 1 V 600 nA Quiescent current VFB = 1 V 1.2 mA OUT1 IQ Parameter Test conditions (1) IO1,2 Output current IMIN Minimum output current %VO1,2/ΔVI Reference line regulation 4V < VIN < 5.5 V Reference load regulation 10mA < IO < 0.5 A PWM switching frequency(1) VFB = 0.7 V, TA = 25°C DMAX Maximum duty cycle VFB = 0.7 V, TA = 25°C ISWL Switching current limitation ILKN NMOS leakage current ILKP PMOS leakage current VIN = 4 to 5.5 V N ΔVO1,2 PWM fS 0.8 A 1 mA %VO/ VIN 0.032 5.5 15 mV 1.2 1.5 1.8 MHz 85 94 % 1 1.2 A VFB = 0.9 V, TA = 25°C 0.1 µA VFB = 0.9 V, TA = 25°C 0.1 µA RDSon-N NMOS switch on resistance ISW = 250 mA 0.15 0.3 Ω RDSon-P PMOS switch on resistance ISW = 250 mA 0.2 0.4 Ω η Efficiency TSHDN Thermal shut down THYS Thermal shut down hysteresis (2) IO = 20 mA to 100 mA 75 % IO = 100 mA to 0.5 A 90 % 150 °C 15 °C (2) ΔVO1,2/ΔIO Load transient response (2) 130 100 mA < IO < 500 mA tR = tF => 100 ns, TA = 25°C -5 +5 %VO Reset section tDEL Delay time TA = 25°C 80 85 Reset in threshold measured on input pin VIN_A Rising 4.5 4.6 4.75 VRES VIN_A Falling 4.12 4.2 4.28 ms V 1. VO= 90% of nominal value. 2. Guaranteed by design, but not tested in production. 7/21 Electrical characteristics Table 8. ST2S06A33 - ST2S06B - ST2S06D33 Electrical characteristics for ST2S06D33 (VIN_SW = VIN_A = 5 V, V01 = 3.3 V, VO2 = 1.2 V, C1 = 4.7 µF, C2 = C3 = 22 µF, L1 = L2 = 3.3 µH, TJ = -30 to 125 °C unless otherwise specified. Typical values are referred to 25 °C Symbol Min. Typ. Max. Unit Output feedback pin 3.23 3.3 3.37 V FB2 Feedback voltage 784 800 816 mV IO1 IO1 pin bias current VO = 3.5 V 15 20 µA IFB2 VFB pin bias current VFB = 1 V 600 nA Quiescent current VFB = 1 V 1.2 mA OUT1 IQ Parameter Test conditions IO1,2 Output current IMIN Minimum output current %VO1,2/ΔVI Reference line regulation 4V < VIN < 5.5 V Reference load regulation 10mA < IO < 0.5 A PWM switching frequency(1) VFB = 0.7 V, TA = 25°C DMAX Maximum duty cycle VFB = 0.7 V, TA = 25°C ISWL Switching current limitation ILKN NMOS leakage current ILKP PMOS leakage current N ΔVO1,2 PWM fS VIN = 4 to 5.5 V (1) 0.8 A 1 mA %VO/ VIN 0.032 5.5 15 mV 1.2 1.5 1.8 MHz 85 94 % 1 1.2 A VFB = 0.9 V, TA = 25°C 0.1 µA VFB = 0.9 V, TA = 25°C 0.1 µA RDSon-N NMOS switch on resistance ISW = 250 mA 0.15 0.3 Ω RDSon-P PMOS switch on resistance ISW = 250 mA 0.2 0.4 Ω η TSHDN THYS Efficiency IO = 20 mA to 100 mA 75 % IO = 100 mA to 0.5 A 90 % 150 °C 15 °C Thermal shut down (2) 130 Thermal shut down hysteresis (2) ΔVO1,2/ΔIO Load transient response (2) 100 mA < IO < 500 mA tR = tF => 100 ns, TA = 25°C -5 52 +5 %VO 78 ms Reset section tDEL Delay time TA = 25°C VRES Reset in threshold measured on input pin VIN_A Rising VIN_A Falling 1. VO= 90% of nominal value. 2. Guaranteed by design, but not tested in production. 8/21 65 4.55 V 3.625 3.7 3.775 ST2S06A33 - ST2S06B - ST2S06D33 Table 9. Symbol Electrical characteristics for ST2S06B (VIN_SW = VIN_A = 5 V, VO1,2 =1.2 V, C1= 4.7 µF, C2 = C3 = 22 µF, L1 = L2 = 3.3 µH, TJ = -30 to 125 °C unless otherwise specified. Typical values are referred to 25 °C Parameter Test conditions FB1,2 Feedback voltage IFB1,2 VFB pin bias current IQ Quiescent current IO1,2 Output current IMIN Minimum output current VINH Electrical characteristics Min. Typ. Max. Unit 784 800 816 mV 600 nA VINH > 1.2 V, VFB = 1 V 1 mA VINH < 0.4 V 1 µA VFB = 1 V VIN = 2.5 to 5.5 V Inhibit threshold (1) 0.8 1 2.5V < VIN < 5 V 1.2 2.5V < VIN < 5.5 V 1.3 mA V Device OFF IINH1,2 A 0.4 Inhibit pin current 2 µA %VO1,2/ ΔVIN Reference line regulation 2.5V < VIN < 5.5 V 0.032 ΔVO1,2 Reference load regulation 10 mA < IO < 0.5 A 5.5 15 mV PWM switching frequency(1) VFB = 0.7 V, TA = 25°C 1.2 1.5 1.8 MHz DMAX Maximum duty cycle VFB = 0.7 V, TA = 25°C 85 94 % ISWL Switching current limitation 1 1.2 A ILKN NMOS leakage current VFB = 0.9 V, TA = 25°C 0.1 µA ILKP PMOS leakage current VFB = 0.9 V, TA = 25°C 0.1 µA PWM fS %VO/ VIN RDSon-N NMOS switch on resistance ISW = 250 mA 0.15 0.3 Ω RDSon-P PMOS switch on resistance ISW = 250 mA 0.2 0.4 Ω η Efficiency TSHDN Thermal shut down THYS Thermal shut down hysteresis (1) IO = 20 mA to 100 mA 75 % IO = 100 mA to 0.5 A 90 % 150 °C 15 °C (2) ΔVO1,2/ΔIO Load transient response (1) 130 100 mA < IO < 500 mA, tR = tF1 => 100 ns, TA = 25°C -5 +5 %VO 1. VO= 90% of nominal value. 2. Guaranteed by design, but not tested in production. 9/21 Typical performance characteristics ST2S06A33 - ST2S06B - ST2S06D33 5 Typical performance characteristics Figure 3. Feedback voltage 1 vs. temperature Figure 4. (ST2S06B) 0.82 0.82 VI=5V, VFB1 connected to VO1 IO1=IO2=NO LOAD VI=5V, VFB2 connected to VO2 IO1=IO2 =NO LOAD 0.81 0.81 VFB2 [V] VFB1 [V] Feedback voltage 2 vs. temperature (ST2S06B) 0.8 0.79 0.8 0.79 0.78 0.78 -50 -25 0 25 50 75 100 125 -50 -25 0 TEMPERATURE [°C] Efficiency vs. output current 1 100 95 90 85 80 75 70 65 60 Figure 6. EFFICIENCY [%] EFFICIENCY [%] Figure 5. VI=5V, VO1=3.3V, IO2 NO LOAD 0 0.1 0.2 0.3 0.4 0.5 100 95 90 85 80 75 70 65 60 55 50 45 40 0.6 Switching frequency vs. temperature (ST2S06A) -25 0 25 50 Temperature [°C] 10/21 75 100 125 0.1 0.2 0.3 0.4 0.5 0.6 Output Current 2 [A] Figure 8. VI=5V, VFB1=3.2V, VFB2=0.7V -50 75 VI=5V, VO2=1.2V, IO1 NO LOAD 0 Duty Cycle [%] Frequency [MHz] 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 50 Efficiency vs. output current 2 Output Current 1 [A] Figure 7. 25 TEMPERATURE [°C] 100 125 100 99 98 97 96 95 94 93 92 91 90 Duty cycle vs. temperature (ST2S06A) VI=5V, VFB1=3.2V, VFB2=0.7V -50 -25 0 25 50 Temperature [°C] 75 100 125 ST2S06A33 - ST2S06B - ST2S06D33 Switching frequency vs. temperature (ST2S06B) Figure 10. Inhibit threshold vs. temperature (ST2S06B) 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.4 VI=5V, IO1= IO2=100mA 1.2 ON 1 VINH (V) Frequency [MHz] Figure 9. Typical performance characteristics 0.8 OFF 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 -50 125 -25 0 25 Figure 11. Switching current limitation vs. input voltage (ST2S06A) 75 100 125 Figure 12. PMOS switch on resistance vs. temperature 2 240 VI from 2.5V to 5.5V, Output2 Maximum load Current RDSON -P[mOhm] 1.8 ISW2 [A] 50 T [C°] Temperature [°C] 1.6 1.4 1.2 VCC=5V, ISW=250mA 220 200 180 160 140 120 1 100 2.5 3 3.5 4 4.5 5 5.5 -50 -25 0 25 50 75 100 125 T [°C] VI [V] Figure 13. NMOS switch on resistance vs. temperature Figure 14. Delay time vs. temperature (ST2S06A) RDSON -N[mOhm] 170 150 130 VI 110 VCC=5V, ISW=250mA 90 VRES 70 50 -50 -25 0 25 50 75 100 125 T [°C] VI Rising from 0V to 5V, Delay from VRES threshold and reset pin below 0V. 11/21 Typical performance characteristics ST2S06A33 - ST2S06B - ST2S06D33 100 95 90 85 80 75 70 65 60 55 50 Figure 16. Reset in threshold vs. temperature (ST2S06A) VRES (V) T DEL (ms) Figure 15. Delay time vs. temperature (ST2S06A) VI Rising from 0V to 5V -50 -25 0 25 50 75 100 5 4.9 4.8 4.7 4.6 4.5 4.4 4.3 4.2 4.1 4 Rising Falling -50 125 -25 0 25 50 75 100 125 100 125 T [C°] T [C°] 75 4.4 4.3 4.2 4.1 4 3.9 3.8 3.7 3.6 3.5 Rising 70 TDEL (ms) VRES (V) Figure 17. Reset in threshold vs. temperature Figure 18. Delay time vs. temperature (ST2S06D) (ST2S06D) -25 0 25 60 VIN Rising from 0V to 5V 55 Falling -50 65 50 75 100 125 50 -50 -25 0 25 T [°C] 50 75 T [°C] Figure 19. Load transient response (ST2S06A) Figure 20. Start-up transient (ST2S06A) VO1 VI VO1 IO1 VI= 5V, IO1 from 100mA to 500mA 12/21 VI= from 0V to 5V, IO1=500mA, Output Voltage=3.3V ST2S06A33 - ST2S06B - ST2S06D33 Figure 21. Start-up transient (ST2S06B) Typical performance characteristics Figure 22. Inhibit transient (ST2S06B) VINH IO1 VI VO1 VO1 VO2 VI= from 0V to 5V, IO1 =1A, Output Voltage=1.2V VINH= from 0V to 2V, VI=5V, IO1=IO2=1A 13/21 Typical application 6 ST2S06A33 - ST2S06B - ST2S06D33 Typical application Figure 23. Application circuit for ST2S06A/D VIN L2 VIN_A SW2 VIN_SW VFB2 3.3µH R3 V O2 L1 3.3µH ST2S06A/D SW1 NC R1 Reset_Out GND1 GND2 HV VO1 VFB1 GND_A C1 4.7µF C2 22µF R2 R4 C3 22µF Figure 24. Application circuit for ST2S06B L2 VIN VIN_A SW2 VIN_SW VFB2 R3 C1 4.7µF NC GND1 GND2 HV SW1 R1 VFB1 VO1 GND_A R2 14/21 VO2 L1 3.3µH ST2S06B INH 3.3µH C2 22µF R4 C3 22µF ST2S06A33 - ST2S06B - ST2S06D33 7 Application information Application information The ST2S06 represents a series of dual adjustable current mode PWM step-down DC-DC converters with an internal 0.5 A power switch, packaged in a QFN12L (4x4 mm). It is a complete 0.5 A switching regulator with internal compensation that eliminates the need for additional components. The constant frequency, current mode, PWM architecture and stable operation with ceramic capacitors results in low, predictable output ripple. To clamp the error amplifier reference voltage a Soft Start control block generating a voltage ramp has been implemented. Other circuits fitted to the device protection are the Thermal Shut-down block, which turns off the regulator when the junction temperature exceeds 150 °C (typ.), and the cycle-by-cycle current limiting that provides protection against shorted outputs. Because the ST2S06 is an adjustable regulator, the output voltage is determined by an external resistor divider. The desired value is given by the following equation: VO = VFB [1+R1/R2] Operation of the device requires few components: 2 inductors, 3 capacitors and a resistor divider. The chosen inductor must be capable of not saturating at the peak current level. Its value should be selected keeping in mind that a large inductor value increases the efficiency at low output current and reduces output voltage ripple, while a smaller inductor can be chosen when it is important to reduce package size and total application cost. Finally, the ST2S06 has been designed to work properly with X5R or X7R SMD ceramic capacitors both at the input and at the output. These types of capacitors, due to their very low series resistance (ESR), minimize the output voltage ripple. Other low ESR capacitors can be used according to the need of the application without compromising the correct functionality of the device. Due to the high switching frequency and peak current, it is important to optimize the application environment by reducing the length of the PCB traces and placing all the external components near the device. Figure 25. Reset function VIN VTH VTL tDEL Reset 15/21 Package mechanical data 8 ST2S06A33 - ST2S06B - ST2S06D33 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 16/21 ST2S06A33 - ST2S06B - ST2S06D33 Package mechanical data QFN12L (4x4) mechanical data mm. inch. Dim. Min. Typ. Max. Min. Typ. Max. 0.80 0.90 1.00 0.031 0.035 0.039 A1 0.02 0.05 0.001 0.002 A3 0.20 A 0.008 b 0.25 0.30 0.35 0.010 0.012 0.014 D 3.90 4.00 4.10 0.154 0.157 0.161 D2 2.00 2.15 2.25 0.079 0.085 0.089 E 3.90 4.00 4.10 0.154 0.157 0.161 E2 2.00 2.15 2.25 0.079 0.085 0.089 e L 0.80 0.45 0.55 0.031 0.65 0.018 0.022 0.026 7936361B 17/21 Package mechanical data ST2S06A33 - ST2S06B - ST2S06D33 Tape & reel QFNxx/DFNxx (4x4) mechanical data mm. inch. Dim. Min. Typ. A Min. Typ. 330 C 12.8 D 20.2 N 99 13.2 Max. 12.992 0.504 0.519 0.795 101 T 18/21 Max. 3.898 3.976 14.4 0.567 Ao 4.35 0.171 Bo 4.35 0.171 Ko 1.1 0.043 Po 4 0.157 P 8 0.315 ST2S06A33 - ST2S06B - ST2S06D33 Package mechanical data Figure 26. QFN12L (4x4 mm) footprint recommended data 19/21 Revision history ST2S06A33 - ST2S06B - ST2S06D33 9 Revision history Table 10. Document revision history Date Revision 3-Sep-2007 1 Initial release. 21-Jan-2008 2 Added root part number ST2S06D33. 18-Mar-2008 3 Modified: Table 2 on page 4. 20/21 Changes ST2S06A33 - ST2S06B - ST2S06D33 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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