PCA9306 DUAL BIDIRECTIONAL I2C BUS AND SMBus VOLTAGE-LEVEL TRANSLATOR www.ti.com SCPS113 – OCTOBER 2004 – REVISED APRIL 2005 • FEATURES • • • • • • • • • 2-Bit Bidirectional Translator for SDA and SCL Lines in Mixed-Mode I2C Applications I2C and SMBus Compatible Less Than 1.5-ns Maximum Propagation Delay to Accommodate Standard-Mode and Fast-Mode I2C Devices and Multiple Masters Allows Voltage-Level Translator Between – 1.2-V VREF1 and 2.5-V, 3.3-V, or 5-V VREF2 – 1.8-V VREF1 and 3.3-V or 5-V VREF2 – 2.5-V VREF1 and 5-V VREF2 – 3.3-V VREF1 and 5-V VREF2 Provides Bidirectional Voltage Translation With No Direction Pin Low 3.5-Ω ON-State Connection Between Input and Output Ports Provides Less Signal Distortion Open-Drain I2C I/O Ports (SCL1, SDA1, SCL2, and SDA2) 5-V Tolerant I2C I/O Ports to Support Mixed-Mode Signal Operation High-Impedance SCL1, SDA1, SCL2, and SDA2 Pins for EN = Low • • • Lock-Up-Free Operation for Isolation When EN = Low Flow-Through Pinout for Ease of Printed Circuit Board Trace Routing Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) DCT OR DCU PACKAGE (TOP VIEW) GND VREF1 SCL1 SDA1 1 8 2 7 3 6 4 5 EN VREF2 SCL2 SDA2 PIN SYMBOL 1 GND Ground, 0 V FUNCTION 2 VREF1 Low-voltage-side reference supply voltage for SCL1 and SDA1 3 SCL1 Serial clock, low-voltage side. Connect to VREF1 through a pullup resistor. 4 SDA1 Serial data, low-voltage side. Connect to VREF1 through a pullup resistor. 5 SDA2 Serial data, high-voltage side. Connect to VREF2 through a pullup resistor. 6 SCL2 Serial clock, high-voltage side. Connect to VREF2 through a pullup resistor. 7 VREF2 High-voltage-side reference supply voltage for SCL2 and SDA2 8 EN Switch enable input. Connected to VREF2 and pulled up through a high resistor. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2005, Texas Instruments Incorporated PCA9306 DUAL BIDIRECTIONAL I2C BUS AND SMBus VOLTAGE-LEVEL TRANSLATOR www.ti.com SCPS113 – OCTOBER 2004 – REVISED APRIL 2005 DESCRIPTION/ORDERING INFORMATION This dual bidirectional I2C and SMBus voltage-level translator, with an enable (EN) input, is operational from 1.2-V to 3.3-V VREF1 and 2.5-V to 5.5-V VREF2. The PCA9306 allows bidirectional voltage translations between 1.2 V and 5 V, without the use of a direction pin. The low ON-state resistance (ron) of the switch allows connections to be made with minimal propagation delay. When EN is high, the translator switch is ON, and the SCL1 and SDA1 I/O are connected to the SCL2 and SDA2 I/O, respectively, allowing bidirectional data flow between ports. When EN is low, the translator switch is off, and a high-impedance state exists between ports. In I2C applications, the bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9306 enables the system designer to isolate two halves of a bus; thus, more I2C devices or longer trace length can be accommodated. The PCA9306 also can be used to run two buses, one at 400-kHz operating frequency and the other at 100-kHz operating frequency. If the two buses are operating at different frequencies, the 100-kHz bus must be isolated when the 400-kHz operation of the other bus is required. If the master is running at 400 kHz, the maximum system operating frequency may be less than 400 kHz because of the delays added by the repeater. As with the standard I2C system, pullup resistors are required to provide the logic high levels on the translator's bus. The PCA9306 has a standard open-collector configuration of the I2C bus. The size of these pullup resistors depends on the system, but each side of the repeater must have a pullup resistor. The device is designed to work with standard-mode and fast-mode I2C devices, in addition to SMBus devices. Standard-mode I2C devices only specify 3 mA in a generic I2C system where standard-mode devices and multiple masters are possible. Under certain conditions, high termination currents can be used. When the SDA1 or SDA2 port is low, the clamp is in the ON state, and a low resistance connection exists between the SDA1 and SDA2 ports. Assuming the higher voltage is on the SDA2 port when the SDA2 port is high, the voltage on the SDA1 port is limited to the voltage set by VREF1. When the SDA1 port is high, the SDA2 port is pulled to the drain pullup supply voltage (VDPU) by the pullup resistors. This functionality allows a seamless translation between higher and lower voltages selected by the user, without the need for directional control. The SCL1/SCL2 channel also functions as the SDA1/SDA2 channel. All channels have the same electrical characteristics, and there is minimal deviation from one output to another in voltage or propagation delay. This is a benefit over discrete transistor voltage translation solutions, since the fabrication of the switch is symmetrical. The translator provides excellent ESD protection to lower-voltage devices and at the same time protects less ESD-resistant devices. ORDERING INFORMATION PACKAGE (1) TA SSOP – DCT –40°C to 85°C VSSOP – DCU (1) (2) 2 ORDERABLE PART NUMBER Reel of 3000 PCA9306DCTR Reel of 250 PCA9306DCTT Reel of 3000 PCA9306DCUR Reel of 250 PCA9306DCUT TOP-SIDE MARKING (2) 7BD_ _ _ 7BD_ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site. DCU: The actual top-side marking has one additional character that designates the assembly/test site. PCA9306 DUAL BIDIRECTIONAL I2C BUS AND SMBus VOLTAGE-LEVEL TRANSLATOR www.ti.com SCPS113 – OCTOBER 2004 – REVISED APRIL 2005 FUNCTION TABLE (1) INPUT EN (1) TRANSLATOR FUNCTION H SCL1 = SCL2, SDA1 = SDA2 L Disconnect EN is controlled by the VREF2 logic levels and should be at least 1 V higher than VREF1 for best translator operation. LOGIC DIAGRAM (POSITIVE LOGIC) VREF1 VREF2 2 7 8 SCL1 SDA1 3 4 SW SW 6 5 EN SCL2 SDA2 1 GND 3 PCA9306 DUAL BIDIRECTIONAL I2C BUS AND SMBus VOLTAGE-LEVEL TRANSLATOR www.ti.com SCPS113 – OCTOBER 2004 – REVISED APRIL 2005 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VREF1 DC reference voltage range –0.5 7 V VREF2 DC reference bias voltage range –0.5 7 V –0.5 7 V –0.5 7 range (2) VI Input voltage VI/O Input/output voltage range (2) Continuous channel current IIK Input clamp current θJA Package thermal impedance (3) Tstg Storage temperature range (1) (2) (3) UNIT V 128 mA VI < 0 –50 mA DCT package 220 DCU package 227 –65 °C/W 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and input/output negative voltage ratings may be exceeded if the input and output current ratings are observed. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions MAX UNIT VI/O Input/output voltage 0 5 V VREF1 (1) Reference voltage 0 5 V VREF2 (1) Reference voltage 0 5 V EN Enable input voltage 0 IPASS Pass switch current TA Operating free-air temperature (1) SCL1, SDA1, SCL2, SDA2 MIN 5 V 64 mA –40 85 °C MIN TYP (1) MAX VREF1 ≤ VREF2 – 1 V for best results in level-shifting applications Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS UNIT VIK Input clamp voltage II = –18 mA, EN = 0 V –1.2 V IIH Input leakage current VI = 5 V, EN = 0 V 5 µA Ci(EN) Input capacitance Cio(off) Off capacitance SCLn, SDAn VO = 3 V or 0, EN = 0 V Cio(on) On capacitance SCLn, SDAn VO = 3 V or 0, EN = 3 V VI = 3 V or 0 VI = 0, ron (2) On resistance VI = 1.7 V 4 IO = 64 mA SCLn, SDAn VI = 2.4 V (1) (2) 11 IO = 15 mA pF 4 6 pF pF 10.5 12.5 EN = 4.5 V 3.5 5.5 EN = 3 V 4.7 7 EN = 2.3 V 6.3 9.5 EN = 1.5 V 25.5 32 EN = 4.5 V 4.8 7.5 EN = 3 V 14.7 23 EN = 2.3 V 11.3 16.5 Ω All typical values are at TA = 25°C. Measured by the voltage drop between the SCL1 and SCL2, or SDA1 and SDA2 terminals, at the indicated current through the switch. On-state resistance is determined by the lowest voltage of the two terminals. www.ti.com PCA9306 DUAL BIDIRECTIONAL I2C BUS AND SMBus VOLTAGE-LEVEL TRANSLATOR SCPS113 – OCTOBER 2004 – REVISED APRIL 2005 AC PERFORMANCE (TRANSLATING DOWN) Switching Characteristics over recommended operating free-air temperature range, EN = 3.3 V, VIH = 3.3 V, VIL = 0, and VM = 1.15 V (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL FROM (INPUT) TO (OUTPUT) SCL2 or SDA2 SCL1 or SDA1 CL = 50 pF CL = 30 pF CL = 15 pF MIN MAX MIN MAX MIN MAX 0 0.8 0 0.6 0 0.3 0 1.2 0 1 0 0.5 UNIT ns Switching Characteristics over recommended operating free-air temperature range, EN = 2.5 V, VIH = 2.5 V, VIL = 0, and VM = 0.75 V (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL FROM (INPUT) TO (OUTPUT) SCL2 or SDA2 SCL1 or SDA1 CL = 50 pF CL = 30 pF CL = 15 pF MIN MAX MIN MAX MIN MAX 0 1 0 0.7 0 0.4 0 1.3 0 1 0 0.6 UNIT ns AC PERFORMANCE (TRANSLATING UP) Switching Characteristics over recommended operating free-air temperature range, EN = 3.3 V, VIH = 2.3 V, VIL = 0, VT = 3.3 V, VM = 1.15 V, and RL = 300 Ω (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL FROM (INPUT) TO (OUTPUT) SCL1 or SDA1 SCL2 or SDA2 CL = 50 pF CL = 30 pF CL = 15 pF MIN MAX MIN MAX MIN MAX 0 0.9 0 0.6 0 0.4 0 1.4 0 1.1 0 0.7 UNIT ns Switching Characteristics over recommended operating free-air temperature range, EN = 2.5 V, VIH = 1.5 V, VIL = 0, VT = 2.5 V, VM = 0.75 V, and RL = 300 Ω (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL FROM (INPUT) TO (OUTPUT) SCL1 or SDA1 SCL2 or SDA2 CL = 50 pF CL = 30 pF CL = 15 pF MIN MAX MIN MAX MIN MAX 0 1 0 0.6 0 0.4 0 1.3 0 1.3 0 0.8 UNIT ns 5 PCA9306 DUAL BIDIRECTIONAL I2C BUS AND SMBus VOLTAGE-LEVEL TRANSLATOR www.ti.com SCPS113 – OCTOBER 2004 – REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION VT USAGE Translating up Translating down RL SWITCH S1 S2 S1 Open From Output Under Test S2 VIH Input VM VM CL (see Note A) VIL VOH Output VM LOAD CIRCUIT VM VOL NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns. C. The outputs are measured one at a time, with one transition per measurement. Figure 1. Load Circuit for Outputs 6 PCA9306 DUAL BIDIRECTIONAL I2C BUS AND SMBus VOLTAGE-LEVEL TRANSLATOR www.ti.com SCPS113 – OCTOBER 2004 – REVISED APRIL 2005 APPLICATION INFORMATION VDPU = 3.3 V(1) 200K Ω PCA9306 VREF1 = 1.8 EN V(1) RPU 2 RPU 8 VREF1 VREF2 SCL1 SCL2 RPU 7 RPU VCC SCL 3 VCC SW 6 I2C Bus Device I2C Bus Master SDA GND SCL 4 SDA1 SW SDA2 5 GND SDA GND 1 (1) The applied voltages at VREF1 and VDPU should be such that VREF2 is at least 1 V higher than VREF1 for best translator operation. Figure 2. Typical Application Circuit (Switch Always Enabled) 7 PCA9306 DUAL BIDIRECTIONAL I2C BUS AND SMBus VOLTAGE-LEVEL TRANSLATOR www.ti.com SCPS113 – OCTOBER 2004 – REVISED APRIL 2005 APPLICATION INFORMATION VDPU = 3.3 V 3.3-V Enable Signal(1) On Off 200K Ω PCA9306 EN VREF1 = 1.8 V(1) RPU 2 RPU 8 VREF1 VREF2 SCL1 SCL2 RPU 7 RPU VCC SCL 3 VCC SW 6 I2C Bus Device I2C Bus Master SDA GND SCL 4 SDA1 SW SDA2 5 GND SDA GND 1 (1) In the enabled mode, the applied enable voltage and the applied voltage at VREF1 should be such that VREF2 is at least 1 V higher than VREF1 for best translator operation. Figure 3. Typical Application Circuit (Switch Enable Control) Bidirectional Translation For the bidirectional clamping configuration (higher voltage to lower voltage or lower voltage to higher voltage), the EN input must be connected to VREF2 and both pins pulled to high-side VDPU through a pullup resistor (typically 200 kΩ). This allows VREF2 to regulate the EN input. A filter capacitor on VREF2 is recommended. The I2C bus master output can be totem pole or open drain (pullup resistors may be required) and the I2C bus device output can be totem pole or open drain (pullup resistors are required to pull the SCL2 and SDA2 outputs to VDPU). However, if either output is totem pole, data must be unidirectional or the outputs must be 3-stateable and be controlled by some direction-control mechanism to prevent high-to-low contentions in either direction. If both outputs are open drain, no direction control is needed. The reference supply voltage (VREF1) is connected to the processor core power-supply voltage. When VREF2 is connected through a 200-kΩ resistor to a 3.3-V to 5.5-V VDPU power supply, and VREF1 is set between 1.0 V and VDPU – 1 V, the output of each SCL1 and SDA1 has a maximum output voltage equal to VREF1, and the output of each SCL2 and SDA2 has a maximum output voltage equal to VDPU. 8 PCA9306 DUAL BIDIRECTIONAL I2C BUS AND SMBus VOLTAGE-LEVEL TRANSLATOR www.ti.com SCPS113 – OCTOBER 2004 – REVISED APRIL 2005 APPLICATION INFORMATION Application Operating Conditions see Figure 2 MIN TYP (1) MAX UNIT VREF2 Reference voltage VREF1 + 0.6 2.1 5 V EN Enable input voltage VREF1 + 0.6 2.1 5 V VREF1 Reference voltage 0 1.5 4.4 IPASS Pass switch current IREF Reference-transistor current TA Operating free-air temperature (1) V 14 mA 5 µA –40 85 °C All typical values are at TA = 25°C. Sizing Pullup Resistor The pullup resistor value needs to limit the current through the pass transistor, when it is in the on state, to about 15 mA. This ensures a pass voltage of 260 mV to 350 mV. If the current through the pass transistor is higher than 15 mA, the pass voltage also is higher in the on state. To set the current through each pass transistor at 15 mA, the pullup resistor value is calculated as: R PU VDPU 0.35 V 0.015 A The following table summarizes resistor values, reference voltages, and currents at 15 mA, 10 mA, and 3 mA. The resistor value shown in the +10% column (or a larger value) should be used to ensure that the pass voltage of the transistor is 350 mV or less. The external driver must be able to sink the total current from the resistors on both sides of the PCA9306 device at 0.175 V, although the 15 mA applies only to current flowing through the PCA9306 device. PULLUP RESISTOR VALUES (1) (2) PULLUP RESISTOR VALUE (Ω) VDPU (1) (2) (3) 15 mA 10 mA 3 mA NOMINAL +10% (3) NOMINAL +10% (3) NOMINAL +10% (3) 5V 310 341 465 512 1550 1705 3.3 V 197 217 295 325 983 1082 2.5 V 143 158 215 237 717 788 1.8 V 97 106 145 160 483 532 1.5 V 77 85 115 127 383 422 1.2 V 57 63 85 94 283 312 Calculated for VOL = 0.35 V Assumes output driver VOL = 0.175 V at stated current +10% to compensate for VDD range and resistor tolerance 9 PACKAGE OPTION ADDENDUM www.ti.com 6-Jun-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty PCA9306DCTR ACTIVE SM8 DCT 8 3000 Pb-Free (RoHS) CU NIPDAU Level-1-260C-UNLIM PCA9306DCTT ACTIVE SM8 DCT 8 250 Pb-Free (RoHS) CU NIPDAU Level-1-260C-UNLIM PCA9306DCUR ACTIVE US8 DCU 8 3000 Pb-Free (RoHS) CU NIPDAU Level-1-260C-UNLIM PCA9306DCURE4 ACTIVE US8 DCU 8 3000 Pb-Free (RoHS) CU NIPDAU Level-1-260C-UNLIM PCA9306DCUT ACTIVE US8 DCU 8 250 Pb-Free (RoHS) CU NIPDAU Level-1-260C-UNLIM PCA9306DCUTE4 ACTIVE US8 DCU 8 250 Pb-Free (RoHS) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 MECHANICAL DATA MPDS049B – MAY 1999 – REVISED OCTOBER 2002 DCT (R-PDSO-G8) PLASTIC SMALL-OUTLINE PACKAGE 0,30 0,15 0,65 8 0,13 M 5 0,15 NOM ÇÇÇÇÇ ÇÇÇÇÇ ÇÇÇÇÇ ÇÇÇÇÇ 2,90 2,70 4,25 3,75 Gage Plane PIN 1 INDEX AREA 1 0,25 4 0° – 8° 3,15 2,75 0,60 0,20 1,30 MAX Seating Plane 0,10 0,10 0,00 NOTES: A. B. C. D. 4188781/C 09/02 All linear dimensions are in millimeters. This drawing is subject to change without notice. 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