TI SN74ABT162245DLR

SCBS239F − MARCH 1993 − REVISED JUNE 2004
D Members of the Texas Instruments
D
D
D
D
D
D
D
SN54ABT162245 . . . WD PACKAGE
SN74ABT162245 . . . DGG OR DL PACKAGE
(TOP VIEW)
Widebus  Family
A-Port Outputs Have Equivalent 25-Ω
Series Resistors, So No External Resistors
Are Required
Typical VOLP (Output Ground Bounce)
<1 V at VCC = 5 V, TA = 25°C
Distributed VCC and GND Pins Minimize
High-Speed Switching Noise
Ioff Supports Partial-Power-Down Mode
Operation
Flow-Through Architecture Optimizes PCB
Layout
Latch-Up Performance Exceeds 500 mA Per
JESD 17
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
1DIR
1B1
1B2
GND
1B3
1B4
VCC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCC
2B5
2B6
GND
2B7
2B8
2DIR
description/ordering information
The ’ABT162245 devices are 16-bit noninverting
3-state transceivers designed for synchronous
two-way communication between data buses.
The control-function implementation minimizes
external timing requirements.
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
1OE
1A1
1A2
GND
1A3
1A4
VCC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCC
2A5
2A6
GND
2A7
2A8
2OE
These devices can be used as two 8-bit
transceivers or one 16-bit transceiver. They allow
data transmission from the A bus to the B bus or
from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable
(OE) input can be used to disable the device so that the buses effectively are isolated.
The A-port outputs, which are designed to source or sink up to 12 mA, include equivalent 25-Ω series resistors
to reduce overshoot and undershoot.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
ORDERING INFORMATION
TA
−40°C
85°C
−40
C to 85
C
−55°C to 125°C
ORDERABLE
PART NUMBER
PACKAGE†
Tube
SN74ABT162245DL
Tape and reel
SN74ABT162245DLR
TSSOP − DGG
Tape and reel
SN74ABT162245DGGR
CFP − WD
Tube
SNJ54ABT162245WD
SSOP − DL
TOP-SIDE
MARKING
ABT162245
ABT162245
SNJ54ABT162245WD
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
Copyright  2004, Texas Instruments Incorporated
!" # $%&" !# '%()$!" *!"&+
*%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"#
#"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*&
"&#"0 !)) '!!&"&#+
'*%$"# $')!" " 1234 !)) '!!&"&# !& "&#"&*
%)&## ",&.#& "&*+ !)) ",& '*%$"# '*%$"
'$&##0 *&# " &$&##!)/ $)%*& "&#"0 !)) '!!&"&#+
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCBS239F − MARCH 1993 − REVISED JUNE 2004
description/ordering information (continued)
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE
(each 8-bit section)
INPUTS
OE
DIR
OPERATION
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
logic diagram (positive logic)
1DIR
1
2DIR
48
1A1
25
1OE
47
2A1
2
24
2OE
36
13
1B1
2B1
To Seven Other Channels
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . −0.5 V to 5.5 V
Current into any output in the low state, IO: SN54ABT162245 (B port) . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74ABT162245 (B port) . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
SN54/74ABT162245 (A port) . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −18 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Package thermal impedance, θJA (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51−7.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCBS239F − MARCH 1993 − REVISED JUNE 2004
recommended operating conditions (see Note 3)
SN54ABT162245
VCC
VIH
Supply voltage
VIL
VI
Low-level input voltage
High-level input voltage
High-level output current
IOL
Low-level output current
∆t/∆v
Input transition rise or fall rate
MIN
MAX
MIN
MAX
4.5
5.5
4.5
5.5
2
2
0.8
Input voltage
IOH
SN74ABT162245
0
0
UNIT
V
V
0.8
V
VCC
−32
V
B port
VCC
−24
A port
−3
−12
B port
48
64
A port
12
12
Outputs enabled
10
10
mA
mA
ns/V
TA
Operating free-air temperature
−55
125
−40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SCBS239F − MARCH 1993 − REVISED JUNE 2004
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
A port
VOH
B port
TEST CONDITIONS
VCC = 4.5 V,
VCC = 5 V,
II = −18 mA
IOH = −1 mA
B port
SN54ABT162245
MIN
−1.2
MAX
SN74ABT162245
MIN
−1.2
2.5
3.3
3
3
VCC = 4.5 V
IOH = −1 mA
IOH = −3 mA
3.1
3
3.1
2.6*
VCC = 5 V,
IOH = −12 mA
IOH = −3 mA
3
3
3
IOH = −3 mA
IOH = −24 mA
2.5
2.5
2.5
VCC = 4.5 V
IOH = −32 mA
IOL = 12 mA
2*
VCC = 4.5 V
2
2
IOL = 48 mA
IOL = 64 mA
0.8
0.8
0.8
0.45
0.45
0.45
0.55*
VCC = 5.5 V, VI = VCC or GND
mV
±1
±1
±1
±20
±20
±20
VCC = 5.5 V,
VCC = 5.5 V,
VO = 2.7 V
VO = 0.5 V
Ioff
VCC = 0,
VCC = 5.5 V,
VO = 5.5 V
VI or VO ≤ 4.5 V
VCC = 5.5 V,
VO = 2.5 V
VCC = 5.5 V,
IO = 0,
VI = VCC or GND
Outputs high
2
2
2
Outputs low
32
32
32
Outputs disabled
2
2
2
VCC = 5.5 V,
Outputs enabled
One input at 3.4 V,
Other inputs at
Outputs disabled
VCC or GND
VCC = 5.5 V, One input at 3.4 V,
Other inputs at VCC or GND
1
2
2
0.05
1
0.05
1.5
1.5
1.5
IO¶
ICC
A port
B port
A or B ports
Data inputs
∆ICC#
Control
inputs
Ci
Cio
10
10
10
µA
−10
−10
µA
±100
µA
50
µA
50
50
−25
−50
−100‡
−25
−90
−25
−100
−50
−100
−180
−50
−180
−50
−180
VI = 2.5 V or 0.5 V
VO = 2.5 V or 0.5 V
mA
mA
mA
3
pF
6
pF
* On products compliant to MIL-PRF-38535, this parameter does not apply.
† All typical values are at VCC = 5 V.
‡ This limit applies only to the SN74ABT162245.
§ The parameters IOZH and IOZL include the input leakage current.
¶ Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
# This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
POST OFFICE BOX 655303
µA
−10
±100
Outputs high
V
0.55
IOZH§
IOZL§
ICEX
V
V
100
Control
inputs
UNIT
2.6
A or B ports
4
MAX
−1.2
2.5
Vhys
II
TA = 25°C
TYP†
MAX
3.8
A port
VOL
MIN
• DALLAS, TEXAS 75265
SCBS239F − MARCH 1993 − REVISED JUNE 2004
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, CL = 50 pF (unless otherwise noted) (see Figure 1)
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A
B
tPLH
tPHL
B
A
tPZH
tPZL
OE
B
tPHZ
tPLZ
OE
B
tPZH
tPZL
OE
A
tPHZ
tPLZ
OE
A
PARAMETER
VCC = 5 V,
TA = 25°C
SN54ABT162245
SN74ABT162245
MIN
TYP
MAX
MIN
MAX
MIN
MAX
1
2.2
3.4
1
4.1
1
3.9
1
2.3
3.7
1
4.4
1
4.2
1
2.7
4.1
1
4.9
1
4.6
1.5
3.1
4.6
1.5
5.2
1.5
5.1
1
3.6
5.2
1
6.4
1
6.3
1
3.7
5.4
1
6.5
1
6.4
2
4.4
5.8
2
6.4
2
6.3
1.5
3.3
4.7
1.5
5.6
1.5
5.2
1.5
4.1
6
1.5
7.2
1.5
7.1
1.5
4.3
6.1
1.5
7.3
1.5
7
2
4.5
6.1
2
6.8
2
6.6
1.5
3.7
5.1
1.5
6.1
1.5
5.7
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
UNIT
ns
ns
ns
ns
ns
ns
5
SCBS239F − MARCH 1993 − REVISED JUNE 2004
PARAMETER MEASUREMENT INFORMATION
7V
S1
500 Ω
From Output
Under Test
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
7V
Open
LOAD CIRCUIT
3V
Timing Input
1.5 V
0V
tw
tsu
3V
Input
1.5 V
1.5 V
th
3V
1.5 V
Data Input
1.5 V
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
1.5 V
Input
1.5 V
0V
tPLH
VOH
Output
1.5 V
VOL
tPHL
1.5 V
tPLZ
3.5 V
1.5 V
tPZH
1.5 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
1.5 V
0V
Output
Waveform 1
S1 at 7 V
(see Note B)
tPLH
VOH
Output
1.5 V
tPZL
tPHL
1.5 V
3V
Output
Control
Output
Waveform 2
S1 at Open
(see Note B)
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH − 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
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• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
29-Jun-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
1
5962-9677401QXA
ACTIVE
CFP
WD
48
ACTIVE
TSSOP
DGG
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74ABT162245DLRG4
ACTIVE
SSOP
DL
48
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT162245DGGR
ACTIVE
TSSOP
DGG
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT162245DL
ACTIVE
SSOP
DL
48
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT162245DLG4
ACTIVE
SSOP
DL
48
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT162245DLR
ACTIVE
SSOP
DL
48
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SNJ54ABT162245WD
ACTIVE
CFP
WD
48
TBD
A42 SNPB
MSL Peak Temp (3)
74ABT162245DGGRE4
1
TBD
Lead/Ball Finish
A42 SNPB
N / A for Pkg Type
N / A for Pkg Type
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Apr-2007
TAPE AND REEL INFORMATION
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
Device
26-Apr-2007
Package Pins
Site
Reel
Diameter
(mm)
Reel
Width
(mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
SN74ABT162245DGGR
DGG
48
MLA
330
24
8.6
15.8
1.8
12
24
Q1
SN74ABT162245DLR
DL
48
MLA
330
32
11.35
16.2
3.1
16
32
Q1
TAPE AND REEL BOX INFORMATION
Device
Package
Pins
Site
Length (mm)
Width (mm)
Height (mm)
SN74ABT162245DGGR
DGG
48
MLA
333.2
333.2
31.75
SN74ABT162245DLR
DL
48
MLA
336.6
342.9
41.3
Pack Materials-Page 2
MECHANICAL DATA
MCFP010B – JANUARY 1995 – REVISED NOVEMBER 1997
WD (R-GDFP-F**)
CERAMIC DUAL FLATPACK
48 LEADS SHOWN
0.120 (3,05)
0.075 (1,91)
0.009 (0,23)
0.004 (0,10)
1.130 (28,70)
0.870 (22,10)
0.370 (9,40)
0.250 (6,35)
0.390 (9,91)
0.370 (9,40)
0.370 (9,40)
0.250 (6,35)
48
1
0.025 (0,635)
A
0.014 (0,36)
0.008 (0,20)
25
24
NO. OF
LEADS**
48
56
A MAX
0.640
(16,26)
0.740
(18,80)
A MIN
0.610
(15,49)
0.710
(18,03)
4040176 / D 10/97
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification only
Falls within MIL STD 1835: GDFP1-F48 and JEDEC MO -146AA
GDFP1-F56 and JEDEC MO -146AB
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MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
DL (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0.025 (0,635)
0.0135 (0,343)
0.008 (0,203)
48
0.005 (0,13) M
25
0.010 (0,25)
0.005 (0,13)
0.299 (7,59)
0.291 (7,39)
0.420 (10,67)
0.395 (10,03)
Gage Plane
0.010 (0,25)
1
0°–ā8°
24
0.040 (1,02)
A
0.020 (0,51)
Seating Plane
0.110 (2,79) MAX
0.004 (0,10)
0.008 (0,20) MIN
PINS **
28
48
56
A MAX
0.380
(9,65)
0.630
(16,00)
0.730
(18,54)
A MIN
0.370
(9,40)
0.620
(15,75)
0.720
(18,29)
DIM
4040048 / E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
Falls within JEDEC MO-118
POST OFFICE BOX 655303
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MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
0,50
48
0,08 M
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
1
0,25
24
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
48
56
64
A MAX
12,60
14,10
17,10
A MIN
12,40
13,90
16,90
DIM
4040078 / F 12/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,
improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.
Customers should obtain the latest relevant information before placing orders and should verify that such information is current and
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Products
Applications
Amplifiers
amplifier.ti.com
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www.ti.com/audio
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dataconverter.ti.com
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www.ti.com/automotive
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dsp.ti.com
Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
Low Power
Wireless
www.ti.com/lpw
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www.ti.com/telephony
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www.ti.com/video
Wireless
www.ti.com/wireless
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