SN74ALS641A, SN74ALS642A, SN74AS641 OCTAL BUS TRANSCEIVERS WITH OPEN-COLLECTOR OUTPUTS SDAS300 – MARCH 1995 • DW OR N PACKAGE (TOP VIEW) Bidirectional Bus Transceivers in High-Density 20-Pin Packages Choice of True or Inverting Logic Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (N) 300-mil DIPs • • DEVICE LOGIC SN74ALS641A, SN74AS641 True SN74ALS642A DIR A1 A2 A3 A4 A5 A6 A7 A8 GND Inverting description 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OE B1 B2 B3 B4 B5 B6 B7 B8 These octal bus transceivers are designed for asynchronous two-way communication between data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the level at the direction-control (DIR) input. The output-enable (OE) input disables the device so that the buses are effectively isolated. The -1 versions of the SN74ALS641A and SN74ALS642A are identical to the standard versions, except that the recommended maximum IOL is increased to 48 mA in the -1 versions. The SN74ALS641A, SN74ALS642A, and SN74AS641 are characterized for operation from 0°C to 70°C. FUNCTION TABLE INPUTS OPERATION OE DIR SN74ALS641A SN74AS641 L L B data to A bus B data to A bus L H A data to B bus A data to B bus H X Isolation Isolation SN74ALS642A logic symbols† SN74ALS641A, SN74AS641 OE DIR A1 19 1 2 SN74ALS642A G3 OE 3 EN1 [BA] 3 EN2 [AB] DIR 18 1 B1 A1 19 1 2 2 A2 A3 A4 A5 A6 A7 A8 G3 3 EN1 [BA] 3 EN2 [AB] 18 1 B1 2 3 17 4 16 5 15 6 14 7 13 8 12 9 11 B2 A2 B3 A3 B4 A4 B5 A5 B6 A6 B7 A7 B8 A8 3 17 4 16 5 15 6 14 7 13 8 12 9 11 B2 B3 B4 B5 B6 B7 B8 † These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Copyright 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN74ALS641A, SN74ALS642A, SN74AS641 OCTAL BUS TRANSCEIVERS WITH OPEN-COLLECTOR OUTPUTS SDAS300 – MARCH 1995 logic diagrams (positive logic) SN74ALS641A, SN74AS641 OE DIR A1 SN74ALS642A 19 OE 1 DIR 18 2 B1 A1 19 1 18 2 To Seven Other Transceivers B1 To Seven Other Transceivers absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI: All inputs and I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA: SN74ALS641A, SN74ALS642A . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN74ALS641A SN74ALS642A UNIT MIN NOM MAX 4.5 5 5.5 VCC VIH Supply voltage VIL VOH Low-level input voltage 0.8 V High-level output voltage 5.5 V Low level output current Low-level 24 48‡ mA 70 °C IOL High-level input voltage 2 TA Operating free-air temperature ‡ Applies only to the -1 version and only if VCC is between 4.75 V and 5.25 V 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 0 V V SN74ALS641A, SN74ALS642A, SN74AS641 OCTAL BUS TRANSCEIVERS WITH OPEN-COLLECTOR OUTPUTS SDAS300 – MARCH 1995 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER SN74ALS641A SN74ALS642A TEST CONDITIONS MIN VIK IOH VOL VCC = 4.5 V, VCC = 4.5 V, II = – 18 mA VOH = 5.5 V VCC = 4.5 V IOL = 12 mA IOL = 24 mA IOL = 48 mA‡ VCC = 5.5 V, VI = 7 V II Control inputs IIH Control inputs A or B ports§ 5V VCC = 5 5.5 V, 7V VI = 2 2.7 IIL Control inputs A or B ports§ VCC = 5 5.5 5V V, VI = 0 0.4 4V SN74ALS641A VCC = 5 5.5 5V SN74ALS642A VCC = 5 5.5 5V ICC TYP† UNIT MAX – 1.5 0.1 0.25 0.4 0.35 0.5 0.35 0.5 0.1 20 20 – 0.1 – 0.1 Outputs high 25 37 Outputs low 33 47 Outputs high 8 15 18 28 Outputs low † All typical values are at VCC = 5 V, TA = 25°C. ‡ Applies only to the -1 version and only if VCC is between 4.75 V and 5.25 V § For I/O ports, the parameters IIH and IIL include the off-state output current. V mA V mA µA mA mA switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 680 Ω, TA = MIN to MAX¶ SN74ALS641A tPLH tPHL A or B B or A tPLH tPHL OE A or B tPLH tPHL DIR A or B UNIT SN74ALS642A MIN MAX MIN MAX 5 25 10 30 3 18 5 22 8 30 10 30 8 30 15 38 8 32 10 30 8 32 15 38 ns ns ns ¶ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN74ALS641A, SN74ALS642A, SN74AS641 OCTAL BUS TRANSCEIVERS WITH OPEN-COLLECTOR OUTPUTS SDAS300 – MARCH 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI: All inputs and I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA: SN74AS641 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN74AS641 MIN NOM MAX 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL VOH Low-level input voltage 0.8 High-level output voltage 5.5 V IOL TA Low-level output current 64 mA 70 °C High-level input voltage 2 Operating free-air temperature V V 0 V electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VIK IOH VCC = 4.5 V, VCC = 4.5 V, II = – 18 mA VOH = 5.5 V VOL VCC = 4.5 V, IOL = 64 mA VI = 7 V II Control inputs A or B ports VCC = 5 5.5 5V Control inputs A or B ports§ 5V VCC = 5 5.5 V, 7V VI = 2 2.7 IIL Control inputs A or B ports§ VCC = 5 5.5 5V V, VI = 0 0.4 4V VCC = 5 5.5 5V POST OFFICE BOX 655303 0.35 V 0.1 mA V 0.1 0.1 20 70 – 0.5 – 0.75 50 82 Outputs low 84 136 • DALLAS, TEXAS 75265 UNIT 0.55 Outputs high ‡ All typical values are at VCC = 5 V, TA = 25°C. § For I/O ports, the parameters IIH and IIL include the off-state output current. 4 – 1.2 VI = 5.5 V IIH ICC SN74AS641 TYP‡ MAX MIN mA µA mA mA SN74ALS641A, SN74ALS642A, SN74AS641 OCTAL BUS TRANSCEIVERS WITH OPEN-COLLECTOR OUTPUTS SDAS300 – MARCH 1995 switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 680 Ω, TA = MIN to MAX† SN74AS641 MIN tPLH tPHL A or B B or A tPLH tPHL OE A or B tPLH tPHL DIR A or B UNIT MAX 5 21 1 7.5 5 21 1 9 5 22 1 10 ns ns ns † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN74ALS641A, SN74ALS642A, SN74AS641 OCTAL BUS TRANSCEIVERS WITH OPEN-COLLECTOR OUTPUTS SDAS300 – MARCH 1995 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V RL = R1 = R2 VCC S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point From Output Under Test CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS 3.5 V Timing Input Test Point LOAD CIRCUIT FOR 3-STATE OUTPUTS 3.5 V High-Level Pulse 1.3 V R2 1.3 V 1.3 V 0.3 V 0.3 V Data Input tw th tsu 3.5 V 1.3 V 3.5 V Low-Level Pulse 1.3 V 0.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATIONS 3.5 V Output Control (low-level enabling) 1.3 V 1.3 V 0.3 V tPZL Waveform 1 S1 Closed (see Note B) tPLZ [3.5 V 1.3 V tPHZ tPZH Waveform 2 S1 Open (see Note B) 1.3 V VOL 0.3 V VOH 1.3 V 0.3 V [0 V 3.5 V 1.3 V Input 1.3 V 0.3 V tPHL tPLH VOH In-Phase Output 1.3 V 1.3 V VOL tPLH tPHL VOH Out-of-Phase Output (see Note C) 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 4-Jun-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74ALS641A-1DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS641A-1DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS641A-1DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS641A-1DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS641A-1DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS641A-1DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS641A-1N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74ALS641A-1NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74ALS641A-1NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS641A-1NSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS641A-1NSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS641ADW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS641ADWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS641ADWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS641ADWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS641ADWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS641ADWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS641AN ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74ALS641ANE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74ALS641ANSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS641ANSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS641ANSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS642A-1DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS642A-1DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS642A-1DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 4-Jun-2007 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74ALS642A-1DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS642A-1DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS642A-1DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS642A-1N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74ALS642A-1NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74ALS642A-1NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS642A-1NSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS642A-1NSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) SN74ALS642ADW OBSOLETE SOIC DW 20 TBD Call TI Call TI SN74ALS642ADWR OBSOLETE SOIC DW 20 TBD Call TI Call TI SN74ALS642AN OBSOLETE PDIP N 20 TBD Call TI Call TI SN74AS641DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS641DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS641DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS641DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS641DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS641DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS641N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74AS641NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame Addendum-Page 2 PACKAGE OPTION ADDENDUM www.ti.com 4-Jun-2007 retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 4-Oct-2007 TAPE AND REEL BOX INFORMATION Device Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74ALS641A-1DWR DW 20 SITE 41 330 24 10.8 13.0 2.7 12 24 Q1 SN74ALS641A-1NSR NS 20 SITE 41 330 24 8.2 13.0 2.5 12 24 Q1 SN74ALS641ADWR DW 20 SITE 41 330 24 10.8 13.0 2.7 12 24 Q1 SN74ALS641ANSR NS 20 SITE 41 330 24 8.2 13.0 2.5 12 24 Q1 SN74ALS642A-1DWR DW 20 SITE 41 330 24 10.8 13.0 2.7 12 24 Q1 SN74ALS642A-1NSR NS 20 SITE 41 330 24 8.2 13.0 2.5 12 24 Q1 SN74AS641DWR DW 20 SITE 41 330 24 10.8 13.0 2.7 12 24 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 4-Oct-2007 Device Package Pins Site Length (mm) Width (mm) Height (mm) SN74ALS641A-1DWR DW 20 SITE 41 346.0 346.0 41.0 SN74ALS641A-1NSR NS 20 SITE 41 346.0 346.0 41.0 SN74ALS641ADWR DW 20 SITE 41 346.0 346.0 41.0 SN74ALS641ANSR NS 20 SITE 41 346.0 346.0 41.0 SN74ALS642A-1DWR DW 20 SITE 41 346.0 346.0 41.0 SN74ALS642A-1NSR NS 20 SITE 41 346.0 346.0 41.0 SN74AS641DWR DW 20 SITE 41 346.0 346.0 41.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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