Ceramic transient voltage suppressors SMD multilayer transient voltage suppressors, low capacitance series Series/Type: Date: November 2012 © EPCOS AG 2012. Reproduction, publication and dissemination of this publication, enclosures hereto and the information contained therein without EPCOS' prior express consent is prohibited. Multilayer varistors (MLVs) Low capacitance series EPCOS type designation system for low capacitance series CA 04 P2 S Construction: CT Single chip with nickel barrier termination (AgNiSn) CA Chip array with nickel barrier termination (AgNiSn) Case sizes: 0603 0603 single chip 0805 0805 single chip 06 0612 array Number of elements per component: Single chip P2 Array with 2 elements P4 Array with 4 elements Tolerance of the varistor voltage: K ±10% S Special tolerance Maximum RMS operating voltage (VRMS): 17 17 V Special features: Standard A Special tolerance T Internal coding Low capacitance series Taping mode: G 180-mm reel Please read Cautions and warnings and Important notes at the end of this document. Page 2 of 34 17 T LC G Multilayer varistors (MLVs) Low capacitance series Features ESD protection level acc. ISO 10605, IEC 61000-4-2 Level 4 Bidirectional protection Low capacitance Low insertion loss Low leakage current No signal distortion RoHS-compatible Suitable for lead-free soldering PSpice simulation models available Customer-specific types on request Applications ESD protection of data lines e.g. in notebooks and portable devices Design Multilayer technology Lack of plastic or epoxy encapsulation for flammability rating better than UL 94 V-0 Termination (see “Soldering directions”): CT and CA types with nickel barrier terminations (AgNiSn), recommended for lead-free soldering, and compatible with tin/lead solder. V/I characteristics and derating curves V/I and derating curves are attached to the data sheet. The curves are sorted by VRMS and then by case size, which is included in the type designation. Please read Cautions and warnings and Important notes at the end of this document. Page 3 of 34 Single chip Internal circuit Available case sizes: EIA 0603 0805 Metric 1608 2012 Array Internal circuit 4-fold array Available case sizes: EIA 0612 Metric 1632 Version 4-fold array Multilayer varistors (MLVs) Low capacitance series General technical data Maximum RMS operating voltage Maximum DC operating voltage Contact discharge ESD capability Air discharge ESD capability Maximum surge current Maximum capacitance Maximum clamping voltage Operating temperature Storage temperature VRMS,max VDC,max to IEC 61000-4-2 VESD,contact to IEC 61000-4-2 VESD,air (8/20 µs) Isurge,max (1 MHz, 1 V) Cmax (8/20 µs) Vclamp,max for arrays Top for case size ≥ 0603 Top for arrays LCT/UCT for case size ≥ 0603 LCT/UCT 17 22 8 15 10 ... 30 50 ... 100 50 40/+85 55/+125 40/+125 55/+150 Temperature derating Climatic category: 40/+85 °C for arrays Please read Cautions and warnings and Important notes at the end of this document. Climatic category: 55/+125 °C for chip size ≥ 0603 Page 4 of 34 V V kV kV A pF V °C °C °C °C Multilayer varistors (MLVs) Low capacitance series Electrical specifications and ordering codes Maximum ratings (Top,max) Type 4-fold array CA06P4S17TLCG Single chip CT0603K17LCG CT0603S17ALCG CT0805K17LCG VRMS,max VDC,max Isurge,max Wmax Pdiss,max Top,max (8/20 µs) (2 ms) V V A mJ mW °C Ordering code B72724A2170S162 17 22 30 75 3 +85 B72500T2170K060 17 B72500T2170S160 17 B72510T2170K062 17 22 22 22 10 30 30 100 75 100 1 3 4 +125 +125 +125 Characteristics (TA = 25 °C) Type 4-fold array CA06P4S17TLCG Single chip CT0603K17LCG CT0603S17ALCG CT0805K17LCG Please read Cautions and warnings and Important notes at the end of this document. VV,min (1 mA) V VV,max (1 mA) V Vclamp,max V Iclamp (8/20 µs) A 25 40 50 1 75 24.3 25 24.8 29.7 40 33 50 50 50 1 1 1 50 75 100 Page 5 of 34 Cmax (1 MHz, 1 V) pF Multilayer varistors (MLVs) Low capacitance series Dimensional drawings Single chip 4-fold array Dimensions in mm Case size EIA / mm l w h d e k 0603 / 1608 1.6 ±0.15 0.80 ±0.10 0.9 max. - - 0.10 ... 0.40 0805 / 2012 2.0 ±0.20 1.25 ±0.15 1.4 max. - - 0.13 ... 0.75 0612 / 1632 3.2 ±0.20 1.60 ±0.15 0.9 max. 0.40 ±0.15 0.80 ±0.15 0.20 ±0.10 Please read Cautions and warnings and Important notes at the end of this document. Page 6 of 34 Multilayer varistors (MLVs) Low capacitance series Recommended solder pad layout Single chip 4-fold array Dimensions in mm Case size EIA / mm A B C E 0603 / 1608 Single chip 1.00 1.00 1.00 - 0805 / 2012 Single chip 1.40 1.20 1.00 - 0612 / 1632 4-fold array 0.50 0.70 1.20 0.76 Delivery mode EIA case size Taping 4-fold array 0612 Single chip 0603 0603 0805 Reel size Packing unit Type mm pcs. Ordering code 180 4000 CA06P4S17TLCG B72724A2170S162 Cardboard 180 Cardboard 180 Blister 180 4000 4000 3000 CT0603K17LCG CT0603S17ALCG CT0805K17LCG B72500T2170K060 B72500T2170S160 B72510T2170K062 Blister Please read Cautions and warnings and Important notes at the end of this document. Page 7 of 34 Multilayer varistors (MLVs) Low capacitance series V/I characteristics CT0603K17LCG CT0603S17ALCG Please read Cautions and warnings and Important notes at the end of this document. Page 8 of 34 Multilayer varistors (MLVs) Low capacitance series V/I characteristics CT0805K17LCG CA06P4S17TLCG Please read Cautions and warnings and Important notes at the end of this document. Page 9 of 34 Multilayer varistors (MLVs) Low capacitance series V/I characteristics CA06P4S17TLCG Please read Cautions and warnings and Important notes at the end of this document. Page 10 of 34 Multilayer varistors (MLVs) Low capacitance series Derating curves Maximum surge current Isurge,max = f (tr, pulse train) For explanation of the derating curves refer to "General technical information", chapter 2.7.2 CT0603K17LCG CT0603S17ALCG CT0805K17LCG Please read Cautions and warnings and Important notes at the end of this document. CA06P4S17TLCG Page 11 of 34 Multilayer varistors (MLVs) Low capacitance series Taping and packing 1 Taping and packing for SMD components 1.1 Blister tape (the taping to IEC 60286-3) Dimensions in mm 8-mm tape 12-mm tape 16-mm tape Case size (inch/mm) Case size (inch/mm) Case size (inch/mm) 0508/ 1220 0612/ 1632 1012/ 2532 Tolerance 0603/ 1608 0506/ 1216 0805/ 2012 1206/ 3216 1210/ 3225 1812/ 4532 2220/ 5750 3225 4032 A0 0.9 ±0.10 1.50 1.60 1.90 2.80 3.50 5.10 7.00 B0 1.75 ±0.10 1.80 2.40 3.50 3.50 4.80 6.00 8.70 10.60 ±0.20 K0 1.0 0.80 T T2 1.80 0.30 1.3 1.20 2.50 8.60 ±0.20 2.60 5.00 max. 0.30 0.30 max. 3.50 5.50 max. D0 1.50 1.50 1.50 +0.10/0 D1 1.00 1.50 1.50 min. P0 4.00 4.00 4.00 ±0.101) P2 2.00 2.00 2.00 ±0.05 P1 4.00 8.00 12.00 ±0.10 W 8.00 12.00 16.00 ±0.30 E 1.75 1.75 1.75 ±0.10 F 3.50 5.50 7.50 ±0.05 G 0.75 0.75 0.75 min. 1) ≤±0.2 mm over 10 sprocket holes. Please read Cautions and warnings and Important notes at the end of this document. Page 12 of 34 Multilayer varistors (MLVs) Low capacitance series Part orientation in tape pocket for blister tape For discrete chip, case sizes 0603, 0805, 1206, 1210, 1812 and 2220 For array, case sizes 0612 For arrays 0506 and 1012 For filter array, case size 0508 Additional taping information Reel material Polystyrol (PS) Tape material Polystyrol (PS) or Polycarbonat (PC) or PVC Tape break force min. 10 N Top cover tape strength min. 10 N Top cover tape peel force 0.2 to 0.6 N for 8-mm tape and 0.2 to 0.8 N for 12-mm tape at a peel speed of 300 mm/min Tape peel angle Angle between top cover tape and the direction of feed during peel off: 165° to 180° Cavity play Each part rests in the cavity so that the angle between the part and cavity center line is no more than 20° Please read Cautions and warnings and Important notes at the end of this document. Page 13 of 34 Multilayer varistors (MLVs) Low capacitance series 1.2 Cardboard tape (taping to IEC 60286-3) Dimensions in mm 8-mm tape Case size Tolerance (inch/mm) Case size (inch/mm) 0201/0603 0402/1005 0405/1012 0603/1608 1003/2508 0508/1220 A0 0.38 ±0.05 0.60 1.05 0.95 1.00 1.60 ±0.20 B0 0.68 ±0.05 1.15 1.60 1.80 2.85 2.40 ±0.20 T 0.35 ±0.02 0.60 0.75 0.95 1.00 0.95 max. T2 0.4 min. 0.70 0.90 1.10 1.10 1.12 max. D0 1.50 ±0.1 1.50 +0.10/0 1.50 P0 4.00 ±0.102) P2 2.00 ±0.05 P1 2.00 ±0.05 2.00 4.00 4.00 4.00 4.00 ±0.10 W 8.00 ±0.30 E 1.75 ±0.10 F G ±0.05 3.50 1.35 0.75 2) ≤0.2 mm over 10 sprocket holes. Please read Cautions and warnings and Important notes at the end of this document. Page 14 of 34 min. Multilayer varistors (MLVs) Low capacitance series Part orientation in tape pocket for cardboard tape For discrete chip case sizes 0201, 0402, 0603 and 1003 For array case size 0405 For array case size 0508 For filter array, case size 0405 Additional taping information Reel material Polystyrol (PS) Tape material Cardboard Tape break force min. 10 N Top cover tape strength min. 10 N Top cover tape peel force 0.1 to 0.65 N at a peel speed of 300 mm/min Tape peel angle Angle between top cover tape and the direction of feed during peel off: 165° to 180° Cavity play Each part rests in the cavity so that the angle between the part and cavity center line is no more than 20° Please read Cautions and warnings and Important notes at the end of this document. Page 15 of 34 Multilayer varistors (MLVs) Low capacitance series 1.3 Reel packing Dimensions in mm 8-mm tape 180-mm reel 330-mm reel 12-mm tape 180-mm reel 330-mm reel 16-mm tape 330-mm reel A 180 3/+0 330 2.0 180 3/+0 330 2.0 330 2.0 W1 8.4 +1.5/0 8.4 +1.5/0 12.4 +1.5/0 12.4 +1.5/0 16.4 +1.5/0 W2 14.4 max. 14.4 max. 18.4 max. 18.4 max. 22.4 max. Leader, trailer Please read Cautions and warnings and Important notes at the end of this document. Page 16 of 34 Multilayer varistors (MLVs) Low capacitance series 1.4 Packing units for discrete chip and array chip Case size Chip thickness inch/mm 0201/0603 0402/1005 0405/1012 0506/1216 0508/1220 0603/1608 0612/1632 0805/2012 th 0.33 mm 0.6 mm 0.7 mm 0.5 mm 0.9 mm 0.9 mm 0.9 mm 0.7 mm 0.9 mm 1.3 mm 0.9 mm 1.0 mm 0.9 mm 1.3 mm 1.4 mm 1.6 mm 0.9 mm 1.3 mm 1.4 mm 1.6 mm 1.3 mm 1.4 mm 1.6 mm 2.3 mm 1.3 mm 1.4 mm 2.0 mm 2.3 mm 3.2 mm 4.5 mm 3.2 mm 4.5 mm 1003/2508 1012/2532 1206/3216 1210/3225 1812/4532 2220/5750 3225 4032 Please read Cautions and warnings and Important notes at the end of this document. Cardboard tape Blister tape W 8 mm 8 mm 8 mm 8 mm 8 mm 8 mm W 8 mm 8 mm 8 mm 8 mm 8 mm 8 mm 8 mm 8 mm 8 mm 8 mm 8 mm 8 mm 8 mm 8 mm 8 mm 8 mm 12 mm 12 mm 12 mm 12 mm 12 mm 12 mm 12 mm 12 mm 16 mm 16 mm 16 mm 16 mm Page 17 of 34 ∅ 180-mm reel ∅ 330-mm reel pcs. 15000 10000 5000 4000 4000 4000 3000 3000 3000 3000 4000 2000 3000 3000 2000 2000 3000 3000 2000 2000 1500 1000 1500 1000 pcs. 16000 12000 4000 3000 3000 3000 1000 1000 1000 1000 Multilayer varistors (MLVs) Low capacitance series 2 Delivery mode for leaded SHCV varistors Standard delivery mode for SHCV types is bulk. Alternative taping modes (AMMO pack or taped on reel) are available upon request. Packing units for: Type Pieces SR6 2000 SR1 / SR2 1000 For types not listed in this data book please contact EPCOS. Please read Cautions and warnings and Important notes at the end of this document. Page 18 of 34 Multilayer varistors (MLVs) Low capacitance series Soldering directions 1 Terminations 1.1 Nickel barrier termination The nickel barrier layer of the silver/nickel/tin termination prevents leaching of the silver base metallization layer. This allows great flexibility in the selection of soldering parameters. The tin prevents the nickel layer from oxidizing and thus ensures better wetting by the solder. The nickel barrier termination is suitable for all commonly-used soldering methods. Multilayer CTVS: Structure of nickel barrier termination 1.2 Silver-palladium termination Silver-palladium terminations are used for the large case sizes 1812 and 2220 and for chips intended for conductive adhesion. This metallization improves the resistance of large chips to thermal shock. In case of conductive adhesion, the silver-palladium metallization reduces susceptibility to corrosion. Silver-palladium termination can be used for smaller case sizes (only chip) for hybrid applications as well. The silver-palladium termination is not approved for lead-free soldering. Multilayer varistor: Structure of silver-palladium termination Please read Cautions and warnings and Important notes at the end of this document. Page 19 of 34 Multilayer varistors (MLVs) Low capacitance series 1.3 Silver-platinum termination Silver-platinum terminations are mainly used for the large case sizes 1812 and 2220. The silverplatinum termination is approved for reflow soldering, SnPb soldering and lead-free soldering with a silver containing solder paste. In case of SnPb soldering, a solder paste Sn62Pb36Ag2 is recommended. For lead-free reflow soldering, a solder paste SAC, e.g. Sn95.5Ag3.8Cu0.7, is recommended. Multilayer varistor: Structure of silver-platinum termination 2 Recommended soldering temperature profiles 2.1 Reflow soldering temperature profile Recommended temperature characteristic for reflow soldering following JEDEC J-STD-020D Please read Cautions and warnings and Important notes at the end of this document. Page 20 of 34 Multilayer varistors (MLVs) Low capacitance series Profile feature Sn-Pb eutectic assembly Pb-free assembly Preheat and soak - Temperature min - Temperature max - Time Tsmin Tsmax tsmin to tsmax 100 °C 150 °C 60 ... 120 s 150 °C 200 °C 60 ... 180 s Average ramp-up rate Tsmax to Tp 3 °C/ s max. 3 °C/ s max. Liquidous temperature Time at liquidous TL tL 183 °C 60 ... 150 s 217 °C 60 ... 150 s Peak package body temperature Tp1) 220 °C ... 235 °C2) 245 °C ... 260 °C2) 20 s3) 30 s3) 6 °C/ s max. 6 °C/ s max. maximum 6 min maximum 8 min Time (tP) within 5 °C of specified classification temperature (Tc) 3) Average ramp-down rate Tp to Tsmax Time 25 °C to peak temperature 1) Tolerance for peak profile temperature (TP) is defined as a supplier minimum and a user maximum. 2) Depending on package thickness. For details please refer to JEDEC J-STD-020D. 3) Tolerance for time at peak profile temperature (tP) is defined as a supplier minimum and a user maximum. Note: All temperatures refer to topside of the package, measured on the package body surface. Number of reflow cycles: 3 2.2 Wave soldering temperature profile Temperature characteristics at component terminal with dual-wave soldering Please read Cautions and warnings and Important notes at the end of this document. Page 21 of 34 Multilayer varistors (MLVs) Low capacitance series 2.3 Lead-free soldering processes EPCOS multilayer CTVS with AgNiSn termination are designed for the requirements of lead-free soldering processes only. Soldering temperature profiles to JEDEC J-STD-020D, IEC 60068-2-58 and ZVEI recommendations. 3 Recommended soldering methods - type-specific releases by EPCOS 3.1 Overview Reflow soldering Wave soldering Type Case size SnPb Lead-free SnPb Lead-free CT... / CD... 0201/ 0402 Approved Approved No No CT... / CD... 0603 ... 2220 Approved Approved Approved Approved CN... 0603 ... 2220 Approved No Approved No CN...K2 1812, 2220 Approved Approved No No Arrays 0405 ... 1012 Approved Approved No No ESD/EMI filters 0405, 0508 Approved Approved No No CU 3225, 4032 Approved Approved Approved Approved SHCV - No No Approved Approved 3.2 Nickel barrier and AgPt terminated multilayer CTVS All EPCOS MLVs with nickel barrier and AgPt termination are suitable and fully qualiyfied for leadfree soldering. The nickel barrier layer is 100% matte tin-plated. 3.3 Silver-palladium terminated MLVs AgPd-terminated MLVs are mainly designed for conductive adhesion technology on hybrid material. Additionally MLVs with AgPd termination are suitable for reflow and wave soldering with SnPb solder. Note: Lead-free soldering is not approved for MLVs with AgPd termination. 3.4 Silver-platinum terminated MLVs The silver-platinum termination is approved for reflow soldering, SnPb soldering and lead-free with a silver containing solder paste. In case of SnPb soldering, a solder paste Sn62Pb36Ag2 is recommended. For lead-free reflow soldering, a solder paste SAC, e.g. Sn95.5Ag3.8Cu0.7, is recommended. Please read Cautions and warnings and Important notes at the end of this document. Page 22 of 34 Multilayer varistors (MLVs) Low capacitance series 3.5 Tinned copper alloy All EPCOS CU types with tinned termination are approved for lead-free and SnPb soldering. 3.6 Tinned iron wire All EPCOS SHCV types with tinned termination are approved for lead-free and SnPb soldering. 4 Solder joint profiles / solder quantity 4.1 Nickel barrier termination If the meniscus height is too low, that means the solder quantity is too low, the solder joint may break, i.e. the component becomes detached from the joint. This problem is sometimes interpreted as leaching of the external terminations. If the solder meniscus is too high, i.e. the solder quantity is too large, the vise effect may occur. As the solder cools down, the solder contracts in the direction of the component. If there is too much solder on the component, it has no leeway to evade the stress and may break, as in a vise. The figures below show good and poor solder joints for dual-wave and infrared soldering. 4.1.1 Solder joint profiles for nickel barrier termination - dual-wave soldering Good and poor solder joints caused by amount of solder in dual-wave soldering. 4.1.2 Solder joint profiles for nickel barrier termination / silver-palladium / silver-platinum termination - reflow soldering Please read Cautions and warnings and Important notes at the end of this document. Page 23 of 34 Multilayer varistors (MLVs) Low capacitance series Good and poor solder joints caused by amount of solder in reflow soldering. 5 Conductive adhesion Attaching surface-mounted devices (SMDs) with electrically conductive adhesives is a commercially attractive method of component connection to supplement or even replace conventional soldering methods. Electrically conductive adhesives consist of a non-conductive plastic (epoxy resin, polyimide or silicon) in which electrically conductive metal particles (gold, silver, palladium, nickel, etc) are embedded. Electrical conduction is effected by contact between the metal particles. Adhesion is particularly suitable for meeting the demands of hybrid technology. The adhesives can be deposited ready for production requirements by screen printing, stamping or by dispensers. As shown in the following table, conductive adhesion involves two work operations fewer than soldering. Reflow soldering Wave soldering Conductive adhesion Screen-print solder paste Apply glue dot Screen-print conductive adhesive Mount SMD Mount SMD Mount SMD Predry solder paste Cure glue Cure adhesive Reflow soldering Wave soldering Inspect Wash Wash Inspect Inspect Please read Cautions and warnings and Important notes at the end of this document. Page 24 of 34 Multilayer varistors (MLVs) Low capacitance series A further advantage of adhesion is that the components are subjected to virtually no temperature shock at all. The curing temperatures of the adhesives are between 120 °C and 180 °C, typical curing times are between 30 minutes and one hour. The bending strength of glued chips is, in comparison with that of soldered chips, higher by a factor of at least 2, as is to be expected due to the elasticity of the glued joints. The lower conductivity of conductive adhesive may lead to higher contact resistance and thus result in electrical data different to those of soldered components. Users must pay special attention to this in RF applications. 6 Solderability tests Test Standard Wettability Leaching resistance Test conditions Pb-free soldering Criteria/ test results IEC Immersion in 60068-2-58 60/40 SnPb solder using non-activated flux at 215 ±3 °C for 3 ±0.3 s Immersion in Sn96.5Ag3.0Cu0.5 solder using non- or low activated flux at 245 ±5 °C for 3 ±0.3 s Covering of 95% of end termination, checked by visual inspection IEC Immersion in 60068-2-58 60/40 SnPb solder using mildly activated flux without preheating at 260 ±5 °C for 10 ±1 s Immersion in No leaching of Sn96.5Ag3.0Cu0.5 contacts solder using non- or low activated flux without preheating at 255 ±5 °C for 10 ±1 s Thermal shock (solder shock) Test conditions Sn-Pb soldering Dip soldering at 300 °C/5 s Dip soldering at 300 °C/5 s No deterioration of electrical parameters. Capacitance change: ∆C/C0 ≤ 15% Tests of resistance IEC Immersion in Immersion in to soldering heat 60068-2-58 60/40 SnPb for 10 s Sn96.5Ag3.0Cu0.5 for SMDs at 260 °C for 10 s at 260 °C Change of varistor voltage: ∆V/V (1 mA) ≤ 5% Tests of resistance IEC to soldering heat 60068-2-20 for radial leaded components (SHCV) Change of varistor voltage: ∆V/V (1 mA) ≤ 5% Change of capacitance X7R: ≤ 5/+10% Please read Cautions and warnings and Important notes at the end of this document. Immersion of leads in 60/40 SnPb for 10 s at 260 °C Immersion of leads in Sn96.5Ag3.0Cu0.5 for 10 s at 260 °C Page 25 of 34 Multilayer varistors (MLVs) Low capacitance series Note: Leaching of the termination Effective area at the termination might be lost if the soldering temperature and/or immersion time are not kept within the recommended conditions. Leaching of the outer electrode should not exceed 25% of the chip end area (full length of the edge A-B-C-D) and 25% of the length A-B, shown below as mounted on substrate. As a single chip 7 As mounted on substrate Notes for proper soldering 7.1 Preheating and cooling According to JEDEC J-STD-020D. Please refer to chapter 2. 7.2 Repair / rework Manual soldering with a soldering iron must be avoided, hot-air methods are recommended for rework purposes. 7.3 Cleaning All environmentally compatible agents are suitable for cleaning. Select the appropriate cleaning solution according to the type of flux used. The temperature difference between the components and cleaning liquid must not be greater than 100 °C. Ultrasonic cleaning should be carried out with the utmost caution. Too high ultrasonic power can impair the adhesive strength of the metallized surfaces. 7.4 Solder paste printing (reflow soldering) An excessive application of solder paste results in too high a solder fillet, thus making the chip more susceptible to mechanical and thermal stress. Too little solder paste reduces the adhesive strength on the outer electrodes and thus weakens the bonding to the PCB. The solder should be applied smoothly to the end surface. Please read Cautions and warnings and Important notes at the end of this document. Page 26 of 34 Multilayer varistors (MLVs) Low capacitance series 7.5 Adhesive application Thin or insufficient adhesive causes chips to loosen or become disconnected during curing. Low viscosity of the adhesive causes chips to slip after mounting. It is advised to consult the manufacturer of the adhesive on proper usage and amounts of adhesive to use. 7.6 Selection of flux Used flux should have less than or equal to 0.1 wt % of halogenated content, since flux residue after soldering could lead to corrosion of the termination and/or increased leakage current on the surface of the component. Strong acidic flux must not be used. The amount of flux applied should be carefully controlled, since an excess may generate flux gas, which in turn is detrimental to solderability. 7.7 Storage of CTVSs Solderability is guaranteed for one year from date of delivery for multilayer varistors, CeraDiodes and ESD/EMI filters (half a year for chips with AgPd and AgPt terminations) and two years for SHCV and CU components, provided that components are stored in their original packages. Storage temperature: 25 °C to +45 °C Relative humidity: ≤75% annual average, ≤95% on 30 days a year The solderability of the external electrodes may deteriorate if SMDs and leaded components are stored where they are exposed to high humidity, dust or harmful gas (hydrogen chloride, sulfurous acid gas or hydrogen sulfide). Do not store SMDs and leaded components where they are exposed to heat or direct sunlight. Otherwise the packing material may be deformed or SMDs/ leaded components may stick together, causing problems during mounting. After opening the factory seals, such as polyvinyl-sealed packages, it is recommended to use the SMDs or leaded components as soon as possible. 7.8 Placement of components on circuit board Especially in the case of dual-wave soldering, it is of advantage to place the components on the board before soldering in that way that their two terminals do not enter the solder bath at different times. Ideally, both terminals should be wetted simultaneously. 7.9 Soldering cautions An excessively long soldering time or high soldering temperature results in leaching of the outer electrodes, causing poor adhesion and a change of electrical properties of the varistor due to the loss of contact between electrodes and termination. Wave soldering must not be applied for MLVs designated for reflow soldering only. Keep the recommended down-cooling rate. Please read Cautions and warnings and Important notes at the end of this document. Page 27 of 34 Multilayer varistors (MLVs) Low capacitance series 7.10 Standards CECC 00802 IEC 60068-2-58 IEC 60068-2-20 JEDEC J-STD-020D Please read Cautions and warnings and Important notes at the end of this document. Page 28 of 34 Multilayer varistors (MLVs) Low capacitance series Symbols and terms Symbol Term Cline,typ Typical capacitance per line Cmax Maximum capacitance Cmin Minimum capacitance Cnom Nominal capacitance ∆Cnom Tolerance of nominal capacitance Ctyp Typical capacitance fcut-off,min Minimum cut-off frequency I Current Iclamp Clamping current Ileak Leakage current Ileak,typ Typical leakage current IPP Peak pulse current Isurge,max Maximum surge current (also termed peak current) LCT Lower category temperature Ltyp Typical inductance Pdiss,max Maximum power dissipation PPP Peak pulse power Rins Insulation resistance Rmin Minimum resistance RS Resistance per line TA Ambient temperature Top Operating temperature Tstg Storage temperature tr Duration of equivalent rectangular wave tresp Response time UCT Upper category temperature V Voltage VBR,min Minimum breakdown voltage Vclamp,max Maximum clamping voltage VDC,max Maximum DC operating voltage (also termed working voltage) VESD,air Air discharge ESD capability VESD,contact Contact discharge ESD capability Vjump Maximum jump-start voltage Please read Cautions and warnings and Important notes at the end of this document. Page 29 of 34 Multilayer varistors (MLVs) Low capacitance series VRMS,max Maximum AC operating voltage, root-mean-square value VV Varistor voltage (also termed breakdown voltage) VV,min Minimum varistor voltage VV,max Maximum varistor voltage ∆VV Tolerance of varistor voltage WLD Maximum load dump Wmax Maximum energy absorption (also termed transient energy) αtyp Typical insertion loss Lead spacing * Maximum possible application conditions All dimensions are given in mm. The commas used in numerical values denote decimal points. Please read Cautions and warnings and Important notes at the end of this document. Page 30 of 34 Multilayer varistors (MLVs) Low capacitance series Cautions and warnings General Some parts of this publication contain statements about the suitability of our ceramic transient voltage suppressor (CTVS) components (multilayer varistors (MLVs), CeraDiodes, ESD/EMI filters, SMD disk varistors (CU types), leaded transient voltage/ RFI suppressors (SHCV types)) for certain areas of application, including recommendations about incorporation/design-in of these products into customer applications. The statements are based on our knowledge of typical requirements often made of our CTVS devices in the particular areas. We nevertheless expressly point out that such statements cannot be regarded as binding statements about the suitability of our CTVS components for a particular customer application. As a rule, EPCOS is either unfamiliar with individual customer applications or less familiar with them than the customers themselves. For these reasons, it is always incumbent on the customer to check and decide whether the CTVS devices with the properties described in the product specification are suitable for use in a particular customer application. Do not use EPCOS CTVS components for purposes not identified in our specifications, application notes and data books. Ensure the suitability of a CTVS in particular by testing it for reliability during design-in. Always evaluate a CTVS component under worst-case conditions. Pay special attention to the reliability of CTVS devices intended for use in safety-critical applications (e.g. medical equipment, automotive, spacecraft, nuclear power plant). Design notes Always connect a CTVS in parallel with the electronic circuit to be protected. Consider maximum rated power dissipation if a CTVS has insufficient time to cool down between a number of pulses occurring within a specified isolated time period. Ensure that electrical characteristics do not degrade. Consider derating at higher operating temperatures. Choose the highest voltage class compatible with derating at higher temperatures. Surge currents beyond specified values will puncture a CTVS. In extreme cases a CTVS will burst. If steep surge current edges are to be expected, make sure your design is as low-inductance as possible. In some cases the malfunctioning of passive electronic components or failure before the end of their service life cannot be completely ruled out in the current state of the art, even if they are operated as specified. In applications requiring a very high level of operational safety and especially when the malfunction or failure of a passive electronic component could endanger human life or health (e.g. in accident prevention, life-saving systems, or automotive battery line applications such as clamp 30), ensure by suitable design of the application or other measures (e.g. installation of protective circuitry or redundancy) that no injury or damage is sustained by third parties in the event of such a malfunction or failure. Only use CTVS components from the automotive series in safety-relevant applications. Please read Cautions and warnings and Important notes at the end of this document. Page 31 of 34 Multilayer varistors (MLVs) Low capacitance series Specified values only apply to CTVS components that have not been subject to prior electrical, mechanical or thermal damage. The use of CTVS devices in line-to-ground applications is therefore not advisable, and it is only allowed together with safety countermeasures like thermal fuses. Storage Only store CTVS in their original packaging. Do not open the package before storage. Storage conditions in original packaging: temperature 25 to +45°C, relative humidity ≤75% annual average, maximum 95%, dew precipitation is inadmissible. Do not store CTVS devices where they are exposed to heat or direct sunlight. Otherwise the packaging material may be deformed or CTVS may stick together, causing problems during mounting. Avoid contamination of the CTVS surface during storage, handling and processing. Avoid storing CTVS devices in harmful environments where they are exposed to corrosive gases for example (SOx, Cl). Use CTVS as soon as possible after opening factory seals such as polyvinyl-sealed packages. Solder CTVS components after shipment from EPCOS within the time specified: CTVS with Ni barrier termination, 12 months CTVS with AgPd and AgPt termination, 6 months SHCV and CU series, 24 months Handling Do not drop CTVS components and allow them to be chipped. Do not touch CTVS with your bare hands - gloves are recommended. Avoid contamination of the CTVS surface during handling. Washing processes may damage the product due to the possible static or cyclic mechanical loads (e.g. ultrasonic cleaning). They may cause cracks to develop on the product and its parts, which might lead to reduced reliability or lifetime. Mounting When CTVS devices are encapsulated with sealing material or overmolded with plastic material, electrical characteristics might be degraded and the life time reduced. Make sure an electrode is not scratched before, during or after the mounting process. Make sure contacts and housings used for assembly with CTVS components are clean before mounting. The surface temperature of an operating CTVS can be higher. Ensure that adjacent components are placed at a sufficient distance from a CTVS to allow proper cooling. Avoid contamination of the CTVS surface during processing. Multilayer varistors (MLVs) with AgPd termination are not approved for lead-free soldering. Please read Cautions and warnings and Important notes at the end of this document. Page 32 of 34 Multilayer varistors (MLVs) Low capacitance series Soldering Complete removal of flux is recommended to avoid surface contamination that can result in an instable and/or high leakage current. Use resin-type or non-activated flux. Bear in mind that insufficient preheating may cause ceramic cracks. Rapid cooling by dipping in solvent is not recommended, otherwise a component may crack. Conductive adhesive gluing Only multilayer varistors (MLVs) with an AgPd termination are approved for conductive adhesive gluing. Operation Use CTVS only within the specified operating temperature range. Use CTVS only within specified voltage and current ranges. Environmental conditions must not harm a CTVS. Only use them in normal atmospheric conditions. Reducing the atmosphere (e.g. hydrogen or nitrogen atmosphere) is prohibited. Prevent a CTVS from contacting liquids and solvents. Make sure that no water enters a CTVS (e.g. through plug terminals). Avoid dewing and condensation. EPCOS CTVS components are mainly designed for encased applications. Under all circumstances avoid exposure to: direct sunlight rain or condensation steam, saline spray corrosive gases atmosphere with reduced oxygen content EPCOS CTVS devices are not suitable for switching applications or voltage stabilization where static power dissipation is required. Multilayer varistors (MLVs) are designed for ESD protection and transient suppression. CeraDiodes are designed for ESD protection only, ESD/EMI filters are designed for ESD and EMI protection only. This listing does not claim to be complete, but merely reflects the experience of EPCOS AG. Please read Cautions and warnings and Important notes at the end of this document. Page 33 of 34 Important notes The following applies to all products named in this publication: 1. Some parts of this publication contain statements about the suitability of our products for certain areas of application. These statements are based on our knowledge of typical requirements that are often placed on our products in the areas of application concerned. We nevertheless expressly point out that such statements cannot be regarded as binding statements about the suitability of our products for a particular customer application. As a rule, EPCOS is either unfamiliar with individual customer applications or less familiar with them than the customers themselves. For these reasons, it is always ultimately incumbent on the customer to check and decide whether an EPCOS product with the properties described in the product specification is suitable for use in a particular customer application. 2. We also point out that in individual cases, a malfunction of electronic components or failure before the end of their usual service life cannot be completely ruled out in the current state of the art, even if they are operated as specified. In customer applications requiring a very high level of operational safety and especially in customer applications in which the malfunction or failure of an electronic component could endanger human life or health (e.g. in accident prevention or lifesaving systems), it must therefore be ensured by means of suitable design of the customer application or other action taken by the customer (e.g. installation of protective circuitry or redundancy) that no injury or damage is sustained by third parties in the event of malfunction or failure of an electronic component. 3. The warnings, cautions and product-specific notes must be observed. 4. In order to satisfy certain technical requirements, some of the products described in this publication may contain substances subject to restrictions in certain jurisdictions (e.g. because they are classed as hazardous). Useful information on this will be found in our Material Data Sheets on the Internet (www.epcos.com/material). Should you have any more detailed questions, please contact our sales offices. 5. We constantly strive to improve our products. Consequently, the products described in this publication may change from time to time. The same is true of the corresponding product specifications. Please check therefore to what extent product descriptions and specifications contained in this publication are still applicable before or when you place an order. We also reserve the right to discontinue production and delivery of products. Consequently, we cannot guarantee that all products named in this publication will always be available. The aforementioned does not apply in the case of individual agreements deviating from the foregoing for customer-specific products. 6. Unless otherwise agreed in individual contracts, all orders are subject to the current version of the "General Terms of Delivery for Products and Services in the Electrical Industry" published by the German Electrical and Electronics Industry Association (ZVEI). 7. The trade names EPCOS, BAOKE, Alu-X, CeraDiode, CeraLink, CSMP, CSSP, CTVS, DeltaCap, DigiSiMic, DSSP, FilterCap, FormFit, MiniBlue, MiniCell, MKD, MKK, MLSC, MotorCap, PCC, PhaseCap, PhaseCube, PhaseMod, PhiCap, SIFERRIT, SIFI, SIKOREL, SilverCap, SIMDAD, SiMic, SIMID, SineFormer, SIOV, SIP5D, SIP5K, ThermoFuse, WindCap are trademarks registered or pending in Europe and in other countries. Further information will be found on the Internet at www.epcos.com/trademarks. Page 34 of 34