AMSCO ON33

0.35 µm CMOS
ON33
ON33 is an OR / NAND circuit providing the logical function Q = NOT [ (A+B+C).(D+E+F) ].
Truth Table
Capacitance
A
B
C
D
E
F
Q
Pin
Cap [pF]
0
0
0
X
X
X
1
A
0.018
X
X
X
0
0
0
1
B
0.018
X
X
1
X
X
1
0
C
0.018
X
X
1
X
1
X
0
D
0.017
X
X
1
1
X
X
0
E
0.016
X
1
X
X
X
1
0
F
0.015
X
1
X
X
1
X
0
X
1
X
1
X
X
0
1
X
X
X
X
1
0
1
X
X
X
1
X
0
1
X
X
1
X
X
0
Area
Power
2
0.226 mils
2
146 µm
1.234 µW/MHz
Delay [ns] = tpd.. = f(SL, L)
Output Slope [ns] = op_sl.. = f(SL, L)
AC Characteristics:
Tj = 25°C
with SL = Input Slope [ns] ; L = Output Load [pF]
with L = Output Load [pF]
VDD = 3.3V
Typical Process
AC Characteristics
Rise
Fall
Slope [ns]
Load [pF]
0.015
0.15
0.015
0.15
0.015
0.15
0.015
0.15
Delay A => Q
Delay B => Q
Delay C => Q
Delay D => Q
Delay E => Q
Delay F => Q
0.29
0.27
0.21
0.23
0.21
0.14
0.75
0.72
0.66
0.69
0.67
0.61
0.33
0.39
0.43
0.23
0.3
0.34
0.76
0.84
0.89
0.7
0.77
0.82
0.38
0.34
0.28
0.36
0.32
0.26
0.79
0.74
0.69
0.77
0.72
0.66
0.6
0.55
0.47
0.71
0.65
0.56
1.01
0.97
0.91
1.14
1.1
1.04
Slew A => Q
Slew B => Q
Slew C => Q
Slew D => Q
Slew E => Q
Slew F => Q
1.09
1.09
1.08
0.99
0.99
0.97
2.55
2.54
2.54
2.44
2.44
2.45
1.46
1.51
1.53
1.35
1.41
1.43
2.72
2.75
2.79
2.61
2.65
2.68
0.64
0.54
0.46
0.65
0.55
0.45
1.56
1.46
1.37
1.56
1.47
1.36
1.01
0.89
0.79
1.1
0.98
0.84
1.78
1.68
1.58
1.87
1.77
1.67
April 2000
0.1
2
0.1
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Rev. N/C