CHERRY CS3750

CS3750
CS3750
100mA Dual H-Bridge Air-Core
Gauge Driver
Description
The CS3750 is a dual H-bridge four
quadrant air-core gauge driver. The IC
provides all the functions necessary to
drive a tachometer or speedometer as
part of a microprocessor based multiplexed system. Digital input control
eliminates the need for any analog calibration of the gauge.
The controlling microprocessor sends
out a PWM signal to each H bridge
driver input (IN1, IN2). The PWM signal duty cycle is proportional to the
HÐbridge output. Output current
Features
(100mA max) direction is controlled by
the DIRECTION input. PWM switching noise is minimized at each half
bridge by an internal RC filter and
external programmable capacitor.
The CS3750 is protected against 50V
load dump, over voltage and thermal
runaway fault conditions. Any of these
faults causes the IC to shut down. Each
high side of the output driver is current
limited. A short circuit condition in one
driver does not affect the others.
Absolute Maximum Ratings
Supply Voltage .................................................................................7.5V to +16V
Internal Power Dissipation.....................................................Internally limited
Logic Input Voltages .......................................................................Ð0.3V to 6.5V
Junction Temperature Range ...................................................Ð40¡C to +150¡C
Storage Temperature Range .....................................................Ð55¡C to +165¡C
Lead Temperature Soldering
Wave Solder (through hole styles only) ...........10 sec. max, 260¡C peak
Electrostatic Discharge (Human Body Model)............................................8kV
OUT1B
C1
1/2 H -Bridge
Driver
with Current
Limit
1/2 H -Bridge
Driver
with Current
Limit
DIRECTION
Control
OUT2A
1/2 H- Bridge
Driver
with Current
Limit
OUT2B
C2
DIR1 1
1/2 H- Bridge
Driver
with Current
Limit
DIRECTION
Control
DIR2
C1
C2
IN1
IN2
Gnd
Gnd
Gnd
Gnd
OUT1A
RC Filter
for PWM Input
RC Filter
for PWM Input
Package Options
16 Lead PDIP
(internally fused leads)
Block Diagram
OUT1A
■ 2 Independent NPN
H-Bridge Drivers
■ No Analog Trim Required
■ Used in Multiplexed
Systems
■ Quiet Gauge Operation
■ Programmable Slew
Rate Minimizes
Switching Noise
■ Fault Protection
Over Voltage
Thermal Shutdown
Short Circuit
OUT2A
VS1
VS2
OUT1B
Overvoltage
Thermal
Shutdown
OUT2B
Gnd
VREF
VS1,2
DIR1
IN1
DIR2
IN2
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: [email protected]
Web Site: www.cherry-semi.com
Rev. 7/20/95
1
A
¨
Company
CS3750
Electrical Characteristics: 7.5V <= VCC<=15V; -40¡C ² TA ² +85¡C unless otherwise specified.
PARAMETER
■ Output Stage
VOUT Saturation Voltage
(Low Side)
VOUT Offset Voltage
VOUT Saturation High Side
Low Side
VOUT Differential
Matching Voltage
Supply Current
■ Input Stage
VIN LOW
HIGH
Hysteresis
IIN LOW
HIGH
Output Slew Rate
with respect to input
Output Turn on Delay
with respect to input
Output Turn off Delay
with respect to input
■ Direction
VDIR LOW
HIGH
Hysteresis
IDIR LOW
HIGH
Output Slew Rate
with respect to DIR
Output Fall Time
with respect to DIR
Output Turn on Delay
with respect to DIR
Output Turn off Delay
with respect to DIR
■ Protection Functions
IOUT Current Limit
(High Side Only)
Over Voltage Threshold
Hysteresis
Thermal Shutdown
Hysteresis
TEST CONDITIONS
IOUT=100mA; VIN=0V
IOUT=1mA; VIN=0V
VC=5V; IOUT=-30mA
VIN=5V;IOUT=-100mA
VIN=0V;IOUT=-1mA
VC=5V, IOUT=-100mA
MIN
VS-2
VIN=VDIR=0;
VIN decreasing; VDIR=0V
VIN increasing; VDIR=0V
VDIR=0V
VIN=0.8V; VDIR=0V
VIN=3.5V
VIN=250Hz; RLOAD=150½
0.8
TYP
MAX
UNIT
0.25
0.01
15
VS-1.5
0.02
0.50
0.10
50
VS
0.10
100
V
V
mV
V
V
mV
23
45
mA
1.9
2.0
100
20
0.4
0.2
100
100.0
0.8
V
V
mV
µA
µA
V/us
VIN=250Hz; RLOAD=150½, note 1
1.5
6
µs
VIN=250Hz; RLOAD=150½, note 2
2.4
9
µs
VIN=5V; VDIR decreasing
VIN=5V; VDIR increasing
VIN=5V
VIN=0V; VDIR=0.8V
VIN=0V; VDIR=3.5V
VIN=5V; fDIR=250Hz; C=0µF
0.8
0.2
VIN=0V; VDIR=0V; C=0µF
VIN=5V; RLOAD=150½
VDIR=250Hz; C=0µF, note 1
VIN=5V; RLOAD=150½
VDIR=250Hz; C=0µF, note 2
1.9
2.0
100
40
0.4
1.5
3.5
100
100
V
V
mV
µA
µA
V/µs
0.2
2.0
µs
1
6
µs
2.5
9
µs
VIN=5V
100
225
VIN=5V
17.0
21.5
0.5
160
20
Note 1: Time required for output signal to rise to 90% of its amplitude after input signal switches.
Note 2: Time required for output signal to decrease to 10% of its amplitude after input signal switches.
2
3.5
mA
26.0
V
V
¡C
¡C
CS3750
Package Pin Description
PACKAGE PIN #
PIN SYMBOL
FUNCTION
16L PDIP (internally fused leads)
1
DIR1
CMOS compatible input pin controls direction of current
through OUT1
2
C1
RC filter capacitor for OUT1 connected to Ground
3
IN1
CMOS compatible input pin controls output OUT1A and 1B
4,5,12,13
Gnd
Ground connection
6
OUT1A
One half of H-bridge output stage 1
7
VS1
Supply voltage
8
OUT1B
One half of H-bridge output stage 1
9
OUT2B
One half of H-bridge output stage 2
10
VS2
Supply voltage
11
OUT2A
One half of H-bridge output stage 2
14
IN2
CMOS compatible input pin controls output OUT2A and 2B
15
C2
RC filter capacitor for OUT2 connected to Ground
16
DIR2
CMOS compatible input pin controls direction of current
through OUT2
Circuit Description
Output Stage
Protection
Each output stage contains 4 power NPN transistors
arranged in a traditional H bridge configuration. Current
flow through the two outputs (OUTxA, OUTxB) in each
H-bridge is controlled by the logic signal DIRx.
The high side driver transistor in each H-bridge is current
limited as a protection against a short circuit fault condition. If an over voltage or a thermal runaway fault conditions occurs, all outputs shut down.
PWM input signals from the microprocessor, are filtered
on chip and sent to the output stage. The duty cycle of the
PWM signal is proportional to output voltage. The RC filter reduces the noise of the PWM input signal by slowing
its slew rate: i.e., the output signal is converted from a
square wave to an exponential sawtooth waveform. An
external capacitor (Cx) controls the slew rate for each H
bridge.
Application Diagram
When the voltage on the control pin (INx) is low, both
halves of the H bridge are off (Table 1). When INx is high,
DIR controls the flow of current through the H-bridge. If
DIRx=0, current flows from OUTxA out to the coil and
back in through OUTxB. If DIRx=1, current flows from
OUTxB out to the coil and back in through OUTxA.
1
C1
*C1
DIR2
DIR1
CS3750
Motor Direction Control
I/O
Microprocessor
VBAT
IN1
Gnd
Gnd
OUT1A
Direction
INX
DIRX
OUTxA
OUTxB
0
X
0
0
1
0
1
0
1
1
0
1
Gnd
Gnd
VS2
OUT1B
Input
*C2
OUT2A
VS1
Table 1. Logic Control of H-Bridge
C2
IN2
OUT2B
Outputs
COIL1
* 0.047mF
3
COIL2
Air Core
Gauge
Circular
Speedometer
CS3750
Package Specification
PACKAGE THERMAL DATA
PACKAGE DIMENSIONS IN mm (INCHES)
Thermal Data
D
Lead Count
16L PDIP
(internally fused leads)
Metric
Max
Min
19.69
18.67
English
Max Min
.775 .735
16L PDIP
(internally fused leads)
RQJC
typ
15
ûC/W
RQJA
typ
50
ûC/W
Plastic DIP (N); 300 mil wide
7.11 (.280)
6.10 (.240)
8.26 (.325)
7.62 (.300)
1.77 (.070)
1.14 (.045)
2.54 (.100) BSC
3.68 (.145)
2.92 (.115)
.356 (.014)
.203 (.008)
0.39 (.015)
MIN.
.558 (.022)
.356 (.014)
REF: JEDEC MS-001
D
Some 8 and 16 lead
packages may have
1/2 lead at the end
of the package.
All specs are the same.
Ordering Information
Part Number
CS3750ENF16
Rev. 7/20/95
Cherry Semiconductor Corporation reserves the
right to make changes to the specifications without
notice. Please contact Cherry Semiconductor
Corporation for the latest available information.
Description
16L PDIP (internally fused leads)
4
© 1999 Cherry Semiconductor Corporation