TPA6110A2 www.ti.com SLOS314A – DECEMBER 2000 – REVISED SEPTEMBER 2004 150-mW STEREO AUDIO POWER AMPLIFIER FEATURES • • • • • • • DGN PACKAGE (TOP VIEW) 150 mW Stereo Output PC Power Supply Compatible – Fully Specified for 3.3 V and 5 V Operation – Operation to 2.5 V Pop Reduction Circuitry Internal Mid-Rail Generation Thermal and Short-Circuit Protection Surface-Mount Packaging – PowerPAD™ MSOP Pin Compatible With LM4881 BYPASS GND SHUTDOWN IN2– 1 8 2 7 3 6 4 5 IN1– VO1 VDD VO2 DESCRIPTION The TPA6110A2 is a stereo audio power amplifier packaged in an 8-pin PowerPAD™ MSOP package capable of delivering 150 mW of continuous RMS power per channel into 16-Ω loads. Amplifier gain is externally configured by means of two resistors per input channel and does not require external compensation for settings of 1 to 10. THD+N when driving a 16-Ω load from 5 V is 0.03% at 1 kHz, and less than 1% across the audio band of 20 Hz to 20 kHz. For 32-Ω loads, the THD+N is reduced to less than 0.02% at 1 kHz, and is less than 1% across the audio band of 20 Hz to 20 kHz. For 10-kΩ loads, the THD+N performance is 0.005% at 1 kHz, and less than 0.5% across the audio band of 20 Hz to 20 kHz. TYPICAL APPLICATION CIRCUIT 325 kΩ 325 kΩ VDD 6 VDD Rf Audio Input C(S) VDD/2 Ri Ci 8 IN 1− 1 BYPASS 4 IN 2− − + VO1 7 − + VO2 5 C(C) C(B) Audio Input Ri Ci 3 From Shutdown Control Circuit SHUTDOWN C(C) Bias Control 2 Rf Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000–2004, Texas Instruments Incorporated TPA6110A2 www.ti.com SLOS314A – DECEMBER 2000 – REVISED SEPTEMBER 2004 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. AVAILABLE OPTIONS PACKAGED DEVICE TA -40°C to 85°C (1) MSOP SYMBOLIZATION MSOP (1) TPA6110A2DGN TI AIZ The DGN package is available inleft-ended tape and reel only (e.g., TPA6110A2DGNR). Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION BYPASS 1 I Tap to voltage divider for internal mid-supply bias supply. Connect to a 0.1 µF to 1 µF low ESR capacitor for best performance. GND 2 I GND is the ground connection. IN1– 8 I IN1– is the inverting input for channel 1. IN2– 4 I IN2– is the inverting input for channel 2. SHUTDOWN 3 I Puts the device in a low quiescent current mode when held high. VDD 6 I VDD is the supply voltage terminal. VO1 7 O VO1 is the audio output for channel 1. VO2 5 O VO2 is the audio output for channel 2. ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) UNIT VDD Supply voltage VI Input voltage 6V –0.3 V to VDD + 0.3 V Continuous total power dissipation Internally limited TJ Operating junction temperature range -40°C to 150°C Tstg Storage temperature range -65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds (1) 260°C Stresses beyond those listedunder "absolute maximum ratings” may cause permanent damage to thedevice. These are stress ratings only, and functional operation of the deviceat these or any other conditions beyond those indicated under "recommendedoperating conditions” is not implied. Exposure to absolute-maximum-ratedconditions for extended periods may affect devicereliability. DISSIPATION RATING TABLE (1) 2 PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING DGN 2.14 W (1) 17.1 mW/°C 1.37 W 1.11 W See the Texas Instrumentsdocument, PowerPAD Thermally EnhancedPackage Application Report (SLMA002), for more information on thePowerPAD™ package. The thermal data was measured on a PCB layout based onthe information in the section entitled Texas Instruments Recommended Board for PowerPAD onpage 33 of the before mentioned document. TPA6110A2 www.ti.com SLOS314A – DECEMBER 2000 – REVISED SEPTEMBER 2004 RECOMMENDED OPERATING CONDITIONS MIN MAX VDD Supply voltage 2.5 5.5 V TA Operating free-air temperature -40 85 °C VIH High-level input voltage (SHUTDOWN) VIL Low-level input voltage (SHUTDOWN) 60% x VDD UNIT V 25% x VDD V DC ELECTRICAL CHARACTERISTICS at TA = 25°C, VDD = 2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX VOO Output offset voltage Av = 2 V/V PSRR Power supply rejection ratio VDD = 3.2 V to 3.4 V 83 IDD Supply current SHUTDOWN = 0 V IDD(SD) Supply current in shutdown mode SHUTDOWN = VDD UNIT 15 mV 1.5 3 mA 10 50 µA dB AC OPERATING CHARACTERISTICS VDD = 3.3 V, TA = 25°C, RL = 16 Ω PARAMETER TEST CONDITIONS MIN TYP MAX 60 UNIT PO Output power (each channel) THD≤ 0.1%, f = 1 kHz mW THD+N Total harmonic distortion + noise PO = 40 mW, 20 - 20 kHz 0.4% BOM Maximum output power BW G = 10, THD < 5% > 20 Phase margin Open loop 96° Supply ripple rejection ratio f = 1 kHz 71 dB Channel/channel output separation f = 1 kHz, PO = 40 mW 89 dB SNR Signal-to-noise ratio PO = 50 mW, AV = 1 Vn Noise output voltage AV = 1 kHz 100 dB 11 µV(rms) DC ELECTRICAL CHARACTERISTICS at TA = 25°C, VDD = 5.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX VOO Output offset voltage AV = 2 V/V PSRR Power supply rejection ratio VDD = 4.9 V to 5.1 V 76 IDD Supply current SHUTDOWN = 0 V IDD(SD) Supply current in shutdown mode SHUTDOWN = VDD | IIH | High-level input current (SHUTDOWN) VDD = 5.5 V, VI = VDD | IIL | Low-level input current (SHUTDOWN) VDD = 5.5 V, VI = 0 V 1 Zi Input impedance UNIT 15 mV 1.5 3 mA 60 100 µA 1 µA >1 dB µA MΩ 3 TPA6110A2 www.ti.com SLOS314A – DECEMBER 2000 – REVISED SEPTEMBER 2004 AC OPERATING CHARACTERISTICS VDD = 5 V, TA = 25°C, RL = 16 Ω PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 150 mW PO Output power (each channel) THD≤ 0.1%, f = 1 kHz THD+N Total harmonic distortion + noise PO = 100 mW, 20 - 20 kHz 0.6% BOM Maximum output power BW G = 10, THD < 5% > 20 Phase margin Open loop 96° Supply ripple rejection ratio f = 1 kHz 61 dB Channel/Channel output separation f = 1 kHz, PO = 100 mW 90 dB SNR Signal-to-noise ratio PO = 100 mW, AV = 1 100 dB Vn Noise output voltage AV = 1 11.7 µV(rms) kHz AC OPERATING CHARACTERISTICS VDD = 3.3 V, TA = 25°C, RL = 32 Ω PARAMETER TEST CONDITIONS PO Output power (each channel) THD≤ 0.1%, f = 1 kHz MIN TYP MAX THD+N Total harmonic distortion + noise PO = 30 mW, 20 - 20 kHz 0.4% BOM Maximum output power BW AV = 10, THD < 2% > 20 Phase margin Open loop 96° Supply ripple rejection ratio f = 1 kHz 71 dB Channel/channel output separation f = 1 kHz 95 dB SNR Signal-to-noise ratio PO = 40 mW, AV = 1 Vn Noise output voltage AV = 1 40 UNIT mW kHz 100 dB 11 µV(rms) AC OPERATING CHARACTERISTICS VDD = 5 V, TA = 25°C, RL = 32 Ω PARAMETER TEST CONDITIONS PO Output power (each channel) THD≤ 0.1%, f = 1 kHz MIN TYP MAX THD+N Total harmonic distortion + noise PO = 60 mW, 20 - 20 kHz 0.4% BOM Maximum output power BW AV = 10, THD < 2% > 20 Phase margin Open loop 97° Supply ripple rejection ratio f = 1 kHz 61 dB 98 dB 90 UNIT mW kHz Channel/channel output separation f = 1 kHz SNR Signal-to-noise ratio PO = 90 mW, AV = 1 100 dB Vn Noise output voltage AV = 1 11.7 µV(rms) 4 TPA6110A2 www.ti.com SLOS314A – DECEMBER 2000 – REVISED SEPTEMBER 2004 TYPICAL CHARACTERISTICS Table of Graphs FIGURE THD+N Vn vs Frequency Total harmonic distortion plus noise 1, 3, 5, 6, 7, 9, 11, 13 vs Output power 2, 4, 8, 10, 12, 14 Supply ripple rejection ratio vs Frequency 15, 16 Output noise voltage vs Frequency 17, 18 Crosstalk vs Frequency 19–24 Shutdown attenuation vs Frequency 25, 26 Open-loop gain and phase margin vs Frequency 27, 28 Output power vs Load resistance 29, 30 IDD Supply current vs Supply voltage 31 SNR Signal-to-noise ratio vs Voltage gain 32 Power dissipation/amplifier vs Load power 33, 34 TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 10 1 VDD = 3.3 V, PO = 25 mW, CB = 1 µF, RL = 32 Ω, AV = −1 V/V THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % 10 0.1 0.01 0.001 20 100 1k 10k 20k 1 VDD = 3.3 V, RL = 32 Ω, AV = −1 V/V, CB = 1 µF 20 kHz 20 Hz 0.1 1 kHz 0.01 0.001 10 50 f − Frequency − Hz PO − Output Power − mW Figure 1. Figure 2. 100 5 TPA6110A2 www.ti.com SLOS314A – DECEMBER 2000 – REVISED SEPTEMBER 2004 TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 1 10 VDD = 5 V, PO = 60 mW, CB = 1 µF, RL = 32 Ω, THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % 10 AV = −5 V/V AV = −1 V/V AV = −10 V/V 0.1 0.05 0.01 0.001 20 100 TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 1k f − Frequency − Hz 1 kHz 0.01 100 500 Figure 4. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 10 THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % 0.1 Figure 3. VDD = 3.3 V, PO = 100 mW, CB = 1 µF, RL = 10 kΩ, AV = −1 V/V 0.01 100 1k f − Frequency − Hz Figure 5. 6 20 kHz PO − Output Power − mW 0.1 0.001 20 20 Hz 0.001 10 10k 20k 10 1 1 VDD = 5 V, RL = 32 Ω, AV = −1 V/V, CB = 1 µF 10k 20k 1 VDD = 5 V, PO = 100 mW, CB = 1 µF, RL = 10 kΩ AV = −5 V/V AV = −1 V/V 0.1 AV = −10 V/V 0.01 0.001 20 100 1k f − Frequency − Hz Figure 6. 10k 20k TPA6110A2 www.ti.com SLOS314A – DECEMBER 2000 – REVISED SEPTEMBER 2004 TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 1 10 THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % 10 VDD = 3.3 V, PO = 60 mW, CB = 1 µF, RL = 8 Ω, AV = −1 V/V 0.1 0.01 0.001 20 100 1k f − Frequency − Hz 0.01 100 Figure 8. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 500 10 VDD = 5 V, PO = 150 mW, CB = 1 µF, RL = 8 Ω THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % 1 kHz Figure 7. AV = −5 V/V 0.1 0.001 20 20 kHz 0.1 PO − Output Power − mW AV = −1 V/V 0.01 20 Hz 0.001 10 10k 20k 10 1 1 VDD = 3.3 V, RL = 8 Ω, AV = −1 V/V, CB = 1 µF AV = −10 V/V 100 1k f − Frequency − Hz Figure 9. 10k 20k 1 VDD = 5 V, RL = 8 Ω, AV = −1 V/V, CB = 1 µF 1 kHz 20 kHz 0.1 0.01 0.001 10 20 Hz 100 PO − Output Power − mW 500 Figure 10. 7 TPA6110A2 www.ti.com SLOS314A – DECEMBER 2000 – REVISED SEPTEMBER 2004 TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 1 10 THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % 10 VDD = 3.3 V, PO = 40 mW, CB = 1 µF, RL = 16 Ω, AV = −1 V/V 0.1 0.01 0.001 20 100 1k f − Frequency − Hz 500 TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 10 THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % 100 PO − Output Power − mW TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY VDD = 5 V, PO = 100 mW, CB = 1 µF, RL = 16 Ω AV = −5 V/V AV = −10 V/V 100 1k f − Frequency − Hz Figure 13. 8 0.01 Figure 12. 0.1 0.001 20 1 kHz 0.1 Figure 11. AV = −1 V/V 0.01 20 Hz 20 kHz 0.001 10 10k 20k 10 1 1 VDD = 3.3 V, RL =16 Ω, AV = −1 V/V, CB = 1 µF 10k 20k 1 VDD = 5 V, RL = 16 Ω, AV = −1 V/V, CB = 1 µF 20 Hz 20 kHz 1 kHz 0.1 0.01 0.001 10 100 PO − Output Power − mW Figure 14. 500 TPA6110A2 www.ti.com SLOS314A – DECEMBER 2000 – REVISED SEPTEMBER 2004 SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY 0 0.1 µF −10 VDD = 3.3 V, RL = 16 Ω, AV = −1 V/V 0.47 µF −20 1 µF −30 −40 −50 −60 −70 −80 Bypass = 1.65 V −90 −100 −110 K SVR − Supply Ripple Rejection Ratio − dB K SVR − Supply Ripple Rejection Ratio − dB 0 −120 VDD = 5 V, RL = 16 Ω, AV = −1 V/V 0.47 µF −20 1 µF −30 −40 −50 −60 −70 −80 Bypass = 2.5 V −90 −100 −110 −120 20 100 1k f − Frequency − Hz 10k 20k 20 100 1k f − Frequency − Hz Figure 15. Figure 16. OUTPUT NOISE VOLTAGE vs FREQUENCY OUTPUT NOISE VOLTAGE vs FREQUENCY 10k 20k 100 VDD = 3.3 V, BW = 10 Hz to 22 kHz RL = 16 Ω AV = −10 V/V AV = −1 V/V 10 1 V n − Output Noise Voltage − µ V(RMS) 100 V n − Output Noise Voltage − µ V(RMS) 0.1 µF −10 AV = −10 V/V AV = −1 V/V 10 VDD = 5 V, BW = 10 Hz to 22 kHz RL = 16 Ω 1 20 100 1k f − Frequency − Hz Figure 17. 10k 20k 20 100 1k f − Frequency − Hz 10k 20k Figure 18. 9 TPA6110A2 www.ti.com SLOS314A – DECEMBER 2000 – REVISED SEPTEMBER 2004 CROSSTALK vs FREQUENCY CROSSTALK vs FREQUENCY 0 0 VDD = 3.3 V, PO = 25 mW, CB = 1 µF, RL = 32 Ω, AV = −1 V/V −10 −20 −20 −30 −40 Crosstalk − dB Crosstalk − dB −30 −50 −60 −70 −80 −70 IN2− to VO1 20 100 1k f − Frequency − Hz IN1− to VO2 −110 IN1− to VO2 −120 10k 20k 20 100 1k f − Frequency − Hz Figure 19. Figure 20. CROSSTALK vs FREQUENCY CROSSTALK vs FREQUENCY 0 10k 20k 0 VDD = 3.3 V, PO = 60 mW, CB = 1 µF, RL = 8 Ω, AV = −1 V/V −10 −20 −30 −20 −30 −40 −50 −60 −70 IN2− to VO1 −80 VDD = 5 V, PO = 60 mW, CB = 1 µF, RL = 32 Ω, AV = −1 V/V −10 Crosstalk − dB Crosstalk − dB −60 −100 −110 −40 −50 −60 −70 −80 −90 IN2− to VO1 −90 −100 −100 IN1− to VO2 −110 IN1− to VO2 −110 20 100 1k f − Frequency − Hz Figure 21. 10 −50 −90 −100 −120 −40 −80 IN2− to VO1 −90 −120 VDD = 3.3 V, PO = 40 mW, CB = 1 µF, RL = 16 Ω, AV = −1 V/V −10 10k 20k −120 20 100 1k f − Frequency − Hz Figure 22. 10k 20k TPA6110A2 www.ti.com SLOS314A – DECEMBER 2000 – REVISED SEPTEMBER 2004 CROSSTALK vs FREQUENCY CROSSTALK vs FREQUENCY 0 0 VDD = 5 V, PO = 100 mW, CB = 1 µF, RL = 16 Ω, AV = −1 V/V −10 −20 −20 −30 −40 Crosstalk − dB Crosstalk − dB −30 −50 −60 −70 −80 −50 −60 −70 IN2− to VO1 −90 −100 −100 IN1− to VO2 −110 20 100 −10 1k f − Frequency − Hz −120 10k 20k 20 100 1k f − Frequency − Hz Figure 23. Figure 24. SHUTDOWN ATTENUATION vs FREQUENCY SHUTDOWN ATTENUATION vs FREQUENCY 10k 20k 0 VDD = 3.3 V, RL = 16 Ω, CB = 1 µF −10 −20 Shutdown Attenuation − dB −20 −30 −40 −50 −60 −70 −40 −50 −60 −70 −80 −90 −90 100 1k f − Frequency − Hz Figure 25. 10 k 20 k VDD = 5 V, RL = 16 Ω, CB = 1 µF −30 −80 −100 10 IN1− to VO2 −110 0 Shutdown Attenuation − dB −40 −80 IN2− to VO1 −90 −120 VDD = 5 V, PO = 150 mW, CB = 1 µF, RL = 8 Ω, AV = −1 V/V −10 −100 10 100 1k 10 k 20 k f − Frequency − Hz Figure 26. 11 TPA6110A2 www.ti.com SLOS314A – DECEMBER 2000 – REVISED SEPTEMBER 2004 OPEN-LOOP GAIN AND PHASE MARGIN vs FREQUENCY VDD = 3.3 V RL = 10 kΩ 100 180 120 150 100 Gain 120 Phase 90 30 Gain 0 40 −30 20 −60 −90 0 Open-Loop Gain − dB 60 60 150 120 90 80 Φ m − Phase Margin − Deg 80 VDD = 5 V RL = 10 kΩ 60 60 30 Phase 0 40 −30 20 −60 −90 0 −120 −20 −150 −40 1k 10 k 100 k 1M −180 10 M Φm − Phase Margin − Deg 180 120 Open-Loop Gain − dB OPEN-LOOP GAIN AND PHASE MARGIN vs FREQUENCY −120 −20 −150 −40 1k 10 k f − Frequency − Hz 100 k 1M −180 10 M f − Frequency − Hz Figure 27. Figure 28. OUTPUT POWER vs LOAD RESISTANCE OUTPUT POWER vs LOAD RESISTANCE 100 250 VDD = 3.3 V, THD+N = 1%, AV = −1 V/V VDD = 5 V, THD+N = 1%, AV = −1 V/V 200 P − Output Power − mW O P − Output Power − mW O 75 50 25 0 100 50 0 8 12 16 20 24 28 32 36 40 44 45 52 56 60 64 8 12 16 20 24 28 32 36 40 44 48 52 56 60 64 RL − Load Resistance − Ω RL − Load Resistance − Ω Figure 29. 12 150 Figure 30. TPA6110A2 www.ti.com SLOS314A – DECEMBER 2000 – REVISED SEPTEMBER 2004 SUPPLY CURRENT vs SUPPLY VOLTAGE SIGNAL-TO-NOISE RATIO vs VOLTAGE GAIN 120 2.5 SNR − Signal-to-Noise Ratio − dB VDD = 5 V I DD − Supply Current − mA 2 1.5 1 0.5 100 80 60 40 20 0 0 0.5 1 1.5 2 2.5 3 3.5 4 VDD − Supply Voltage − V 4.5 5 0 5.5 2 3 4 5 6 7 8 9 10 AV − Voltage Gain − V/V Figure 31. Figure 32. POWER DISSIPATION/AMPLIFIER vs LOAD POWER POWER DISSIPATION/AMPLIFIER vs LOAD POWER 180 80 VDD = 3.3 V VDD = 5 V Power Dissipation/Amplifier − mW 8Ω 70 Power Dissipation/Amplifier − mW 1 60 50 40 16 Ω 30 32 Ω 20 140 120 100 16 Ω 80 60 32 Ω 40 64 Ω 10 8Ω 160 64 Ω 20 0 0 0 20 40 60 80 100 120 140 160 180 Load Power − mW Figure 33. 200 0 20 40 60 80 100 120 140 160 180 200 Load Power − mW Figure 34. 13 TPA6110A2 www.ti.com SLOS314A – DECEMBER 2000 – REVISED SEPTEMBER 2004 APPLICATION INFORMATION f c(highpass) GAIN SETTING RESISTORS, Rf and Ri The gain for the TPA6110A2 is set by resistors Rf and Ri according to Equation 1. Gain Rf Ri (1) Given that the TPA6110A2 is a MOS amplifier, the input impedance is very high. Consequently input leakage currents are not generally a concern. However, noise in the circuit increases as the value of Rf increases. In addition, a certain range of Rf values is required for proper start-up operation of the amplifier. Considering these factors, it is recommended that the effective impedance seen by the inverting node of the amplifier be set between 5 kΩ and 20 kΩ. The effective impedance is calculated using Equation 2. Effective Impedance R fR i Rf Ri (2) For example, if the input resistance is 20 kΩ and the feedback resistor is 20 kΩ, the gain of the amplifier is -1, and the effective impedance at the inverting terminal is 10 kΩ, a value within the recommended range. For high performance applications, metal-film resistors are recommended because they tend to have lower noise levels than carbon resistors. For values of Rf above 50 kΩ, the amplifier tends to become unstable due to a pole formed from Rf and the inherent input capacitance of the MOS input structure. For this reason, a small compensation capacitor of approximately 5 pF should be placed in parallel with Rf. This, in effect, creates a low-pass filter network with the cutoff frequency defined by Equation 3. f c(lowpass) 1 2 R f CF (3) For example, if Rf is 100 kΩ and CF is 5 pF then fc(lowpass) is 318 kHz, which is well outside the audio range. INPUT CAPACITOR, Ci In the typical application, an input capacitor, Ci, is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. In this case, Ci and Ri form a high-pass filter with the corner frequency determined in Equation 4. 14 1 2 R i Ci (4) The value of Ci directly affects the bass (low frequency) performance of the circuit. Consider the example where Ri is 20 kΩ and the specification calls for a flat bass response down to 20 Hz. Equation 4 is reconfigured as Equation 5. Ci 1 2 R i f c(highpass) (5) In this example, Ci is 0.40 µF, so one would likely choose a value in the range of 0.47 µF to 1 µF. A further consideration for this capacitor is the leakage path from the input source through the input network formed by Ri, Ci, and the feedback resistor (Rf) to the load. This leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially in high-gain applications (gain >10). For this reason a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, connect the positive side of the capacitor to the amplifier input in most applications. The dc level there is held at VDD/2—likely higher than the source dc level. It is important to confirm the capacitor polarity in the application. POWER SUPPLY DECOUPLING, C(S) The TPA6110A2 is a high-performance CMOS audio amplifier that requires adequate power-supply decoupling to minimize the output total harmonic distortion (THD). Power-supply decoupling also prevents oscillations when long lead lengths are used between the amplifier and the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF, placed as close as possible to the device VDD lead, works best. For filtering lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the power amplifier is recommended. TPA6110A2 www.ti.com SLOS314A – DECEMBER 2000 – REVISED SEPTEMBER 2004 MIDRAIL BYPASS CAPACITOR, C(B) The midrail bypass capacitor, C(B), serves several important functions. During start up, C(B) determines the rate at which the amplifier starts up. This helps to push the start-up pop noise into the subaudible range (so low it can not be heard). The second function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This noise is from the midrail generation circuit internal to the amplifier. The capacitor is fed from a 230-kΩ source inside the amplifier. To keep the start-up pop as low as possible, maintain the relationship shown in Equation 6. 1 C(B) 230 kΩ 1 C i R i (6) Consider an example circuit where C(B) is 1 µF, Ci is 1 µF, and Ri is 20 kΩ. Subsitituting these values into the equation 9 results in: 6.25 ≤ 50 which satisfies the rule. Bypass capacitor, C(B), values of 0.1 µF to 1 µF ceramic or tantalum low-ESR capacitors are recommended for the best THD and noise performance. OUTPUT COUPLING CAPACITOR, C(C) In a typical single-supply, single-ended (SE) configuration, an output coupling capacitor (C(C)) is required to block the dc bias at the output of the amplifier, thus preventing dc currents in the load. As with the input coupling capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by Equation 7. fc 1 2 R L C(C) (7) The main disadvantage, from a performance standpoint, is that the typically-small load impedance drives the low-frequency corner higher. Large values of C(C) are required to pass low frequencies into the load. Consider the example where a C(C) of 68 µF is chosen and loads vary from 32 Ω to 47 kΩ. Table 1 summarizes the frequency response characteristics of each configuration. Table 1. Common Load Impedances vs LowFrequency Output Characteristics in SE Mode RL C(C) LOWEST FREQUENCY 32 Ω 68 µF 73 Hz 10,000 Ω 68 µF 0.23 Hz 47,000 Ω 68 µF 0.05 Hz As Table 1 indicates, headphone response is adequate, and drive into line level inputs (a home stereo for example) is very good. The output coupling capacitor required in single-supply SE mode also places additional constraints on the selection of other components in the amplifier circuit. With the rules described earlier still valid, add the following relationship: 1 C(B) 230 kΩ 1 C i R i 1 RLC (C) (8) USING LOW-ESR CAPACITORS Low-ESR capacitors are recommended throughout this application. A real capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance, the more the real capacitor behaves like an ideal capacitor. 5-V VERSUS 3.3-V OPERATION The TPA6110A2 was designed for operation over a supply range of 2.5 V to 5.5 V. This data sheet provides full specifications for 5-V and 3.3-V operation, since these are considered to be the two most common supply voltages. There are no special considerations for 3.3-V versus 5-V operation as far as supply bypassing, gain setting, or stability. The most important consideration is that of output power. Each amplifier in theTPA6110A2 can produce a maximum voltage swing of VDD– 1 V. This means, for 3.3-V operation, clipping starts to occur when VO(PP) = 2.3 V as opposed when VO(PP) = 4 V while operating at 5 V. The reduced voltage swing subsequently reduces maximum output power into the load before distortion becomes significant. 15 PACKAGE OPTION ADDENDUM www.ti.com 18-Apr-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPA6110A2DGN ACTIVE MSOPPower PAD DGN 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPA6110A2DGNG4 ACTIVE MSOPPower PAD DGN 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPA6110A2DGNR ACTIVE MSOPPower PAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPA6110A2DGNRG4 ACTIVE MSOPPower PAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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