TI SN74LV138ADBR

SN54LV138A, SN74LV138A
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
www.ti.com
SCLS395L – APRIL 1998 – REVISED AUGUST 2005
FEATURES
SN54LV138A . . . J OR W PACKAGE
SN74LV138A . . . D, DB, DGV, NS
OR PW PACKAGE
(TOP VIEW)
2
16
15
3
14
4
13
5
12
6
11
7
10
8
9
•
SN54LV138A . . . FK PACKAGE
(TOP VIEW)
VCC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
B
C
G2A
G2B
G1
Y7
1
16
B
A
NC
VCC
Y0
SN74LV138A . . . RGY PACKAGE
(TOP VIEW)
2
15
3
4
14
13
5
12
6
11
10
7
8
9
C
G2A
NC
G2B
G1
Y0
Y1
Y2
Y3
Y4
Y5
4
3 2 1 20 19
18
5
6
17
16
7
8
15
14
9 10 11 12 13
Y1
Y2
NC
Y3
Y4
Y7
GND
NC
Y6
Y5
1
•
VCC
A
B
C
G2A
G2B
G1
Y7
GND
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
Y6
•
•
A
•
2-V to 5.5-V VCC Operation
Max tpd of 9.5 ns at 5 V
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
>2.3 V at VCC = 3.3 V, TA = 25°C
Support Mixed-Mode Voltage Operation on All
Ports
GND
•
•
•
NC − No internal connection
DESCRIPTION/ORDERING INFORMATION
The 'LV138A devices are 3-line to 8-line decoders/demultiplexers designed for 2-V to 5.5-V VCC operation.
ORDERING INFORMATION
PACKAGE (1)
TA
QFN – RGY
SN74LV138ARGYR
Tube of 40
SN74LV138AD
Reel of 2500
SN74LV138ADR
SOP – NS
Reel of 2000
SN74LV138ANSR
74LV138A
SSOP – DB
Reel of 2000
SN74LV138ADBR
LV138A
Tube of 90
SN74LV138APW
Reel of 2000
SN74LV138APWR
TSSOP – PW
–55°C to 125°C
(1)
TOP-SIDE MARKING
Reel of 1000
SOIC – D
–40°C to 85°C
ORDERABLE PART NUMBER
LV138A
LV138A
LV138A
Reel of 250
SN74LV138APWT
TVSOP – DGV
Reel of 2000
SN74LV138ADGVR
LV138A
CDIP – J
Tube of 25
SNJ54LV138AJ
SNJ54LV138AJ
CFP – W
Tube of 150
SNJ54LV138AW
SNJ54LV138AW
LCCC – FK
Tube of 55
SNJ54LV138AFK
SNJ54LV138AFK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily
include testing of all parameters.
Copyright © 1998–2005, Texas Instruments Incorporated
SN54LV138A, SN74LV138A
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
www.ti.com
SCLS395L – APRIL 1998 – REVISED AUGUST 2005
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
These devices are designed for high-performance memory-decoding or data-routing applications requiring very
short propagation delay times. In high-performance memory systems, these decoders can be used to minimize
the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the
delay times of these decoders and the enable time of the memory usually are less than the typical access time of
the memory. This means that the effective system delay introduced by the decoder is negligible.
The conditions at the binary-select inputs (A, B, C) and the three enable inputs (G1, G2A, G2B) select one of
eight output lines. The two active-low (G2A, G2B) and one active-high (G1) enable inputs reduce the need for
external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters
and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing
applications.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
FUNCTION TABLE
2
ENABLE INPUTS
SELECT INPUTS
G1
G2A
G2B
C
B
A
Y0
Y1
Y20
OUTPUTS
Y3
Y4
Y5
Y6
Y7
X
H
X
X
X
X
H
H
H
H
H
H
H
H
X
X
H
X
X
X
H
H
H
H
H
H
H
H
L
X
X
X
X
X
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
H
H
L
H
H
H
H
H
H
H
L
L
L
H
L
H
H
L
H
H
H
H
H
H
L
L
L
H
H
H
H
H
L
H
H
H
H
H
L
L
H
L
L
H
H
H
H
L
H
H
H
H
L
L
H
L
H
H
H
H
H
H
L
H
H
H
L
L
H
H
L
H
H
H
H
H
H
L
H
H
L
L
H
H
H
H
H
H
H
H
H
H
L
SN54LV138A, SN74LV138A
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
www.ti.com
SCLS395L – APRIL 1998 – REVISED AUGUST 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
15
A
1
14
Select
Inputs
B
13
3
12
11
10
Enable
Inputs
6
4
G2A
G2B
Y1
2
C
G1
Y0
9
7
Y2
Y3
Data
Outputs
Y4
Y5
Y6
Y7
5
Pin numbers shown are for the D, DB, DGV, J, NS, PW, RGY, and W packages.
3
SN54LV138A, SN74LV138A
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
www.ti.com
SCLS395L – APRIL 1998 – REVISED AUGUST 2005
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VCC
Supply voltage range
–0.5
7
V
VI
Input voltage range (2)
–0.5
7
V
–0.5
7
V
–0.5
VCC + 0.5
state (2)
UNIT
VO
Voltage range applied to any output in the high-impedance or power-off
VO
Output voltage range (2) (3)
IIK
Input clamp current
VI < 0
–20
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
VO = 0 to VCC
±25
mA
±50
mA
Continuous current through VCC or GND
D
package (4)
73
DB package (4)
θJA
Package thermal impedance
82
DGV package (4)
120
NS package (4)
64
PW package (4)
108
RGY package (5)
Tstg
(1)
(2)
(3)
(4)
(5)
4
Storage temperature range
V
°C/W
39
–65
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
This value is limited to 5.5 V maximum.
The package thermal impedance is calculated in accordance with JESD 51-7
The package thermal impedance is calculated in accordance with JESD 51-5.
SN54LV138A, SN74LV138A
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
www.ti.com
SCLS395L – APRIL 1998 – REVISED AUGUST 2005
Recommended Operating Conditions
(1)
SN54LV138A (2)
VCC
Supply voltage
VCC = 2 V
VIH
High-level input voltage
MIN
MAX
2
5.5
Low-level input voltage
MIN
MAX
2
5.5
1.5
1.5
VCC = 2.3 V to 2.7 V
VCC × 0.7
VCC × 0.7
VCC = 3 V to 3.6 V
VCC × 0.7
VCC × 0.7
VCC = 4.5 V to 5.5 V
VCC × 0.7
VCC × 0.7
VCC = 2 V
VIL
SN74LV138A
UNIT
V
V
0.5
0.5
VCC = 2.3 V to 2.7 V
VCC × 0.3
VCC × 0.3
VCC = 3 V to 3.6 V
VCC × 0.3
VCC × 0.3
VCC = 4.5 V to 5.5 V
VCC × 0.3
VCC × 0.3
V
VI
Input voltage
0
5.5
0
5.5
VO
Output voltage
0
VCC
0
VCC
V
–50
–50
µA
VCC = 2.3 V to 2.7 V
–2
–2
VCC = 3 V to 3.6 V
–6
–6
–12
–12
50
50
2
2
VCC = 2 V
IOH
High-level output current
VCC = 4.5 V to 5.5 V
VCC = 2 V
IOL
Low-level output current
∆t/∆v Input transition rise or fall rate
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
6
6
VCC = 4.5 V to 5.5 V
12
12
VCC = 2.3 V to 2.7 V
200
200
VCC = 3 V to 3.6 V
100
100
20
20
VCC = 4.5 V to 5.5 V
TA
(1)
(2)
Operating free-air temperature
–55
125
–40
85
V
mA
µA
mA
ns/V
°C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Product Preview
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
VOH
TEST CONDITIONS
IOH = –50 µA
2 V to 5.5 V
IOH = –2 mA
2.3 V
IOH = –6 mA
IOH = –12 mA
VOL
SN54LV138A (1)
MIN
SN74LV138A
TYP MAX
MIN
VCC – 0.1
VCC – 0.1
2
2
3V
2.48
2.48
4.5 V
3.8
TYP MAX
3.8
2 V to 5.5 V
0.1
0.1
IOL = 2 mA
2.3 V
0.4
0.4
IOL = 6 mA
3V
0.44
0.44
4.5 V
II
VI = 5.5 V or GND
ICC
VI = VCC or GND,
Ioff
VI or VO = 0 to 5.5 V
Ci
VI = VCC or GND
IO = 0
UNIT
V
IOL = 50 µA
IOL = 12 mA
(1)
VCC
V
0.55
0.55
0 to 5.5 V
±1
±1
µA
5.5 V
20
20
µA
0
5
5
µA
3.3 V
2.1
2.1
pF
Product Preview
5
SN54LV138A, SN74LV138A
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
www.ti.com
SCLS395L – APRIL 1998 – REVISED AUGUST 2005
Switching Characteristics
over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
MAX
MIN
MAX
MIN
MAX
A, B, or C
11.7 (2)
17.6 (2)
1 (2)
21 (2)
1
21
G1
12.3 (2)
19.2 (2)
1 (2)
22 (2)
1
22
11.4 (2)
18.2 (2)
1 (2)
21 (2)
1
21
14.9
21.4
1
25
1
25
15.7
22.6
1
26
1
26
14.8
22
1
25
1
25
CL = 15 pF
A, B, or C
G1
Y
CL = 50 pF
G2A or G2B
(1)
(2)
SN74LV138A
TYP
Y
MIN
G2A or G2B
tpd
SN54LV138A (1)
TA = 25°C
UNIT
ns
ns
Product Preview
On products compliant to MIL-PRF-38535, this parameter is not production tested.
Switching Characteristics
over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
tpd
tpd
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
SN74LV138A
TYP
MAX
MIN
MAX
MIN
MAX
A, B, or C
8.1 (2)
11.4 (2)
1 (2)
13.5 (2)
1
13.5
G1
8.4 (2)
12.8 (2)
1 (2)
15 (2)
1
15
G2A or G2B
7.8 (2)
11.4 (2)
1 (2)
13.5 (2)
1
13.5
A, B, or C
10.3
15.8
1
18
1
18
10.6
16.3
1
18.5
1
18.5
10
14.9
1
17
1
17
Y
G1
Y
MIN
CL = 15 pF
CL = 50 pF
G2A or G2B
(1)
(2)
SN54LV138A (1)
TA = 25°C
UNIT
ns
ns
Product Preview
On products compliant to MIL-PRF-38535, this parameter is not production tested.
Switching Characteristics
over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
MAX
MIN
MAX
MIN
MAX
A, B, or C
5.6 (2)
8.1 (2)
1 (2)
9.5 (2)
1
9.5
G1
5.7 (2)
8.1 (2)
1 (2)
9.5 (2)
1
9.5
5.4 (2)
8.1 (2)
1 (2)
9.5 (2)
1
9.5
7
10.1
1
11.5
1
11.5
7.1
10.1
1
11.5
1
11.5
6.8
10.1
1
11.5
1
11.5
Y
CL = 15 pF
A, B, or C
G1
Y
G2A or G2B
(1)
(2)
CL = 50 pF
MIN
SN74LV138A
TYP
G2A or G2B
tpd
SN54LV138A (1)
TA = 25°C
UNIT
ns
ns
Product Preview
On products compliant to MIL-PRF-38535, this parameter is not production tested.
Operating Characteristics
TA = 25°C
PARAMETER
Cpd
6
Power dissipation capacitance
TEST CONDITIONS
CL = 50 pF,
f = 10 MHz
VCC
TYP
3.3 V
16.8
5V
19.1
UNIT
pF
SN54LV138A, SN74LV138A
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
www.ti.com
SCLS395L – APRIL 1998 – REVISED AUGUST 2005
PARAMETER MEASUREMENT INFORMATION
VCC
From Output
Under Test
Test
Point
RL = 1 kΩ
From Output
Under Test
CL
(see Note A)
S1
Open
TEST
GND
CL
(see Note A)
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
LOAD CIRCUIT FOR
3-STATE AND OPEN-DRAIN OUTPUTS
VCC
50% VCC
Timing Input
0V
tw
tsu
VCC
50% VCC
Input
50% VCC
th
VCC
50% VCC
Data Input
50% VCC
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VCC
50% VCC
Input
50% VCC
tPLH
tPHL
50% VCC
tPHL
50% VCC
VOL
VOH
50% VCC
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
50% VCC
0V
tPLZ
≈VCC
Output
Waveform 1
S1 at VCC
(see Note B)
50% VCC
tPZH
tPLH
50% VCC
50% VCC
tPZL
VOH
In-Phase
Output
Out-of-Phase
Output
0V
VCC
Output
Control
Output
Waveform 2
S1 at GND
(see Note B)
VOL + 0.3 V
VOL
tPHZ
50% VCC
VOH − 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns.
D. The outputs are measured one at a time, with one input transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPHL and tPLH are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuits and Voltage Waveforms
7
PACKAGE OPTION ADDENDUM
www.ti.com
8-Dec-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN74LV138AD
ACTIVE
SOIC
D
16
SN74LV138ADBR
ACTIVE
SSOP
DB
SN74LV138ADBRE4
ACTIVE
SSOP
SN74LV138ADBRG4
ACTIVE
SN74LV138ADE4
40
Lead/Ball Finish
MSL Peak Temp (3)
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
DB
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SSOP
DB
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138ADG4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138ADGVR
ACTIVE
TVSOP
DGV
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138ADGVRE4
ACTIVE
TVSOP
DGV
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138ADGVRG4
ACTIVE
TVSOP
DGV
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138ADR
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138ADRE4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138ADRG4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138ANSR
ACTIVE
SO
NS
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138ANSRG4
ACTIVE
SO
NS
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138APW
ACTIVE
TSSOP
PW
16
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138APWE4
ACTIVE
TSSOP
PW
16
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138APWG4
ACTIVE
TSSOP
PW
16
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138APWR
ACTIVE
TSSOP
PW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138APWRE4
ACTIVE
TSSOP
PW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138APWRG4
ACTIVE
TSSOP
PW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138APWT
ACTIVE
TSSOP
PW
16
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138APWTE4
ACTIVE
TSSOP
PW
16
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138APWTG4
ACTIVE
TSSOP
PW
16
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LV138ARGYR
ACTIVE
VQFN
RGY
16
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SN74LV138ARGYRG4
ACTIVE
VQFN
RGY
16
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
8-Dec-2009
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
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to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Aug-2010
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
6.6
2.5
12.0
16.0
Q1
SN74LV138ADBR
SSOP
DB
16
2000
330.0
16.4
8.2
SN74LV138ADGVR
TVSOP
DGV
16
2000
330.0
12.4
6.8
4.0
1.6
8.0
12.0
Q1
SN74LV138ADR
SOIC
D
16
2500
330.0
16.4
6.5
10.3
2.1
8.0
16.0
Q1
SN74LV138ANSR
SO
NS
16
2000
330.0
16.4
8.2
10.5
2.5
12.0
16.0
Q1
SN74LV138APWR
TSSOP
PW
16
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
SN74LV138APWT
TSSOP
PW
16
250
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
SN74LV138ARGYR
VQFN
RGY
16
3000
330.0
12.4
3.8
4.3
1.5
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Aug-2010
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74LV138ADBR
SSOP
DB
16
2000
346.0
346.0
33.0
SN74LV138ADGVR
TVSOP
DGV
16
2000
346.0
346.0
29.0
SN74LV138ADR
SOIC
D
16
2500
333.2
345.9
28.6
SN74LV138ANSR
SO
NS
16
2000
346.0
346.0
33.0
SN74LV138APWR
TSSOP
PW
16
2000
346.0
346.0
29.0
SN74LV138APWT
TSSOP
PW
16
250
346.0
346.0
29.0
SN74LV138ARGYR
VQFN
RGY
16
3000
346.0
346.0
29.0
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,40
0,23
0,13
24
13
0,07 M
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–8°
1
0,75
0,50
12
A
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,08
14
16
20
24
38
48
56
A MAX
3,70
3,70
5,10
5,10
7,90
9,80
11,40
A MIN
3,50
3,50
4,90
4,90
7,70
9,60
11,20
DIM
4073251/E 08/00
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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