SN75LP1185 LOW-POWER MULTIPLE RS-232 DRIVERS AND RECEIVERS SLLS335A – JANUARY 1999 – REVISED JANUARY 2001 D D D D D D D D D D D DB, DW, OR N PACKAGE (TOP VIEW) Single-Chip TIA/EIA-232-F Interface for IBM PC/AT Serial Port Designed to Transmit and Receive 4-µs Pulses (Equivalent to 256 kbit/s) Less Than 21-mW Power Consumption Wide Supply-Voltage Range . . . 4.75 V to 15 V Driver Output Slew Rates Are Internally Controlled to 30 V/µs Max Receiver Input Hysteresis . . . 1000 mV Typical TIA/EIA-232-F Bus-Pin ESD Protection Exceeds: – 15-kV, Human-Body Model Three Drivers and Five Receivers Meet or Exceed the Requirements of TIA/EIA-232-F and ITU V.28 Complements the SN75LP196 Designed to Replace the Industry-Standard SN75185 and SN75C185 With the Same Flow-Through Pinout Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Dual-In-Line (N) Packages VDD RA1 RA2 RA3 DY1 DY2 RA4 DY3 RA5 VSS 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC RY1 RY2 RY3 DA1 DA2 RY4 DA3 RY5 GND description The SN75LP1185 is a low-power bipolar device containing three drivers and five receivers, with 15 kV of ESD protection on the bus pins with respect to each other. Bus pins are defined as those pins that tie directly to the serial-port connector, including GND. The pinout matches the flow-through design of the industry-standard SN75185 and SN75C185. The flow-through pinout of the SN75LP1185 allows easy interconnection of the UART and serial-port connector of the IBM PC/AT and compatibles. The SN75LP1185 provides a rugged, low-cost solution for this function with the combination of the bipolar processing and 15 kV of ESD protection. The SN75LP1185 has internal slew-rate control to provide a maximum rate of change in the output signal of 30 V/µs. The driver output swing is nominally clamped at ±6 V to enable the higher data rates associated with this device and to reduce EMI emissions. Even though the driver outputs are clamped, they can handle voltages up to ±15 V without damage. All the logic inputs can accept 3.3-V or 5-V input signals. The SN75LP1185 complies with the requirements of TIA/EIA-232-F and ITU V.28. These standards are for data interchange between a host computer and peripheral at signaling rates up to 20 kbit/s. The switching speeds of the SN75LP1185 support rates up to 256 kbit/s. The SN75LP1185 is characterized for operation from 0°C to 70°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. IBM and PC/AT are trademarks of International Business Machines Corporation. Copyright 2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN75LP1185 LOW-POWER MULTIPLE RS-232 DRIVERS AND RECEIVERS SLLS335A – JANUARY 1999 – REVISED JANUARY 2001 AVAILABLE OPTIONS PACKAGED DEVICES TA PLASTIC SHRINK SMALL-OUTLINE (DB) PLASTIC SMALL OUTLINE (DW) PLASTIC DIP (N) 0°C to 70°C SN75LP1185DBR SN75LP1185DW SN75LP1185N The DB package is only available taped and reeled. The DW package also is available taped and reeled. Add the suffix R to device type (e.g., SN75LP1185DWR). Function Tables DRIVER INPUT DA OUTPUT DY H L L H Open L RECEIVER INPUT RA OUTPUT RY H L L H Open H logic diagram (positive logic) 2 19 RA1 RY1 3 18 RA2 RY2 4 17 RA3 RY3 5 16 DY1 DY2 RA4 DY3 DA1 6 15 7 14 8 13 9 12 DA2 RA5 2 POST OFFICE BOX 655303 RY4 DA3 RY5 • DALLAS, TEXAS 75265 SN75LP1185 LOW-POWER MULTIPLE RS-232 DRIVERS AND RECEIVERS SLLS335A – JANUARY 1999 – REVISED JANUARY 2001 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Positive supply-voltage range (see Note 1): VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 15 V Negative supply-voltage range, VSS (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to –15 V Input-voltage range, VI: Receiver (RA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 V to 30 V Driver (DA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.4 V Output-voltage range, VO: Receiver (RY) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6 V Driver (DY) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –15 V to 15 V Electrostatic discharge: Bus pins (human-body model) (see Note 2) . . . . . . . . . . . . . . . . . . . . . Class 3: 15 kV Bus pins (machine model) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 V All pins (human-body model) (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . Class 3: 5 kV All pins (machine model) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400 V Package thermal impedance, θJA (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values are with respect to network ground terminal, unless otherwise noted. 2. Per MIL-STD-883, Method 3015.7 3. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions MIN NOM MAX UNIT VCC VDD Supply voltage (see Note 4) 4.75 5 5.25 V Supply voltage (see Note 5) 9 12 15 V VSS VIH Supply voltage (see Note 5) –9 –12 –15 V High-level input voltage DA VIL VI Low-level input voltage DA Receiver input voltage RA IOH IOL High-level output current Low-level output current 2 V 0.8 –25 V 25 V RY –1 mA RY 2 mA TA Operating free-air temperature 0 70 °C NOTES: 4. VCC cannot be greater than VDD. 5. The device operates down to VDD = VCC and |VSS| = VCC, but supply currents increase and other parameters may vary slightly from the data sheet limits. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN75LP1185 LOW-POWER MULTIPLE RS-232 DRIVERS AND RECEIVERS SLLS335A – JANUARY 1999 – REVISED JANUARY 2001 supply currents over the recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS Supply current for VCC, CC ICC Supply current for VDD, DD IDD No load, All in uts at minimum VOH or inputs maximum VOL Supply current for VSS, SS ISS MIN TYP MAX VDD = 9 V, VDD = 12 V, VSS = –9 V VSS = –12 V 1000 VDD = 9 V, VDD = 12 V, VSS = –9 V VSS = –12 V 800 VDD = 9 V, VDD = 12 V, VSS = –9 V VSS = –12 V –625 UNIT 1000 800 µA –625 driver electrical characterisitics over the recommended operating conditions (unless otherwise noted) PARAMETER VOH High level output voltage High-level VOL Low level output voltage Low-level IIH IIL High-level input current TEST CONDITIONS VIL = 0.8 V, RL = 3 kΩ kΩ, See Figure 1 VDD = 9 V, VSS = –9 V VDD = 12 V, VSS = –12 V, VIH = 2 V, RL = 3 kΩ kΩ, See Figure 1 VDD = 9 V, VSS = –9 V VDD = 12 V, VSS = –12 V, MIN TYP MAX 5 5.8 6.6 5 5.8 6.6 –5 –5.8 –6.9 –5 –5.9 –6.9 UNIT V See Note 6 V See Note 6 Low-level input current VI at VCC VI at GND IOS(H) Short-circuit high-level output current VO = GND or VSS, See Figure 2 and Note 7 IOS(L) Short-circuit low-level output current VO = GND or VDD, See Figure 2 and Note 7 1 µA –1 µA –30 –55 mA 30 55 mA ro Output resistance VDD = VSS = VCC = 0, VO = 2 V 300 Ω NOTES: 6. Maximum output swing is clamped nominally at ±6 V to enable the higher data rates associated with this device and to reduce EMI emissions. The driver outputs may slightly exceed the maximum output voltage over the full VCC and temperature ranges. 7. Not more than one output should be shorted at one time. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75LP1185 LOW-POWER MULTIPLE RS-232 DRIVERS AND RECEIVERS SLLS335A – JANUARY 1999 – REVISED JANUARY 2001 driver switching characteristics over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS MIN TYP MAX UNIT tPHL Propagation delay time, high- to low-level output PARAMETER RL = 3 kΩ to 7 kΩ, CL = 15 pF, See Figure 1 300 800 1600 ns tPLH Propagation delay time, low- to high-level output RL = 3 kΩ to 7 kΩ, CL = 15 pF, See Figure 1 300 800 1600 ns tTLH Transition time, lowlow to high-level high level output VCC = 5 V, VDD = 12 V, VSS = –12 V, RL = 3 kΩ to 7 kΩ kΩ, See Figure 1 and Note 9 Using VTR = 10%-to-90% transition region, Driver speed = 250 kbit/s, CL = 15 pF, See Note 8 375 2240 Using VTR = ±3 V transition region, Driver speed = 250 kbit/s, CL = 15 pF 200 1500 Using VTR = ±2 V transition region, Driver speed = 250 kbit/s, CL = 15 pF 133 1000 Using VTR = ±3 V transition region, Driver speed = 125 kbit/s, CL = 2500 pF tTHL Transition time, highhigh to low-level low level output VCC = 5 V, VDD = 12 V, VSS = –12 V, RL = 3 kΩ to 7 kΩ kΩ, See Figure 1 and Note 9 2750 Using VTR = 10%-to-90% transition region, Driver speed = 250 kbit/s, CL = 15 pF, See Note 8 375 2240 Using VTR = ±3 V transition region, Driver speed = 250 kbit/s, CL = 15 pF 200 1500 Using VTR = ± 2 V transition region, Driver speed = 250 kbit/s, CL = 15 pF 133 1000 Using VTR = ±3 V transition region, Driver speed = 125 kbit/s, CL = 2500 pF SR Output slew rate VCC = 5 V, VDD = 12 V, VSS = –12 V Using VTR = ±3 V transition region, Driver speed = 0 to 250 kbit/s, CL = 15 pF ns ns 2750 4 20 30 V/µs NOTES: 8. Equivalent to the SN75C185. The SN75LP1185 output-voltage swing is clamped to about 70% of the typical SN75C185 output-voltage swing, and the specified limits reflect the reduced output swing. 9. Maximum output swing is limited to ±6 V to enable the higher data rates associated with this device and to reduce EMI emissions. receiver electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIT+ VIT– Positive-going input threshold voltage See Figure 3 1.6 2 2.55 V Negative-going input threshold voltage See Figure 3 0.6 1 1.45 V VHYS VOH Input hysteresis, VIT+ VIT– See Figure 3 600 1000 High-level output voltage 2.5 3.9 VOL Low-level output voltage IOH = –1 mA IOL = 2 mA IIH High level input current High-level VI = 3 V VI = 25 V 0.43 0.6 1 3.6 5.1 8.3 IIL Low level input current Low-level VI = –3 V VI = –25 V –0.43 –0.6 –1 –3.6 –5.1 –8.3 IOS(H) IOS(L) Short-circuit high-level output current Short-circuit low-level output current 0.33 VO = 0, VO = VCC, See Figure 5 and Note 7 See Figure 5 and Note 7 VI = ±3 V to ±25 V NOTE 7: Not more than one output should be shorted at one time. RIN Input resistance POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 5 mV V 0.5 V mA mA –20 mA 20 mA 7 kΩ 5 SN75LP1185 LOW-POWER MULTIPLE RS-232 DRIVERS AND RECEIVERS SLLS335A – JANUARY 1999 – REVISED JANUARY 2001 receiver switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 4) PARAMETER TYP MAX UNIT tPHL tPLH Propagation delay time, high- to low-level output MIN 400 900 ns Propagation delay time, low- to high-level output 400 900 ns tTLH tTHL Transition time, low- to high-level output 200 500 ns Transition time, high- to low-level output 200 400 ns tSK(p) Pulse skew |tPLH – tPHL| 200 425 ns PARAMETER MEASUREMENT INFORMATION tw Inputs 50% VI Outputs 3V 50% 0V II IO tPLH CL 50% VTR– VO VI VO RL VTR+ VTR+ tTLH NOTES: A. The pulse generator has the following characteristics: For CL < 1000 pF: tw = 4 µs, PRR = 250 kbit/s, ZO = 50 Ω, tr and tf < 50 ns. For CL = 2500 pF: tw = 8 µs, PRR = 125 kbit/s, ZO = 50 Ω, tr and tf < 50 ns. B. CL includes probe and jig capacitance. Figure 1. Driver Parameter Test Circuit and Waveform Inputs Outputs II VDD VCC IO VI GND VSS VO Figure 2. Driver IOS Test Inputs Outputs II VI IO VO Figure 3. Receiver VIT Test 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 tPHL 50% VTR– VOH VOL tTHL SN75LP1185 LOW-POWER MULTIPLE RS-232 DRIVERS AND RECEIVERS SLLS335A – JANUARY 1999 – REVISED JANUARY 2001 PARAMETER MEASUREMENT INFORMATION tw 4V VI Inputs Outputs II IO VI 50% 50% 0V tPLH VO 50% 10% VO CL 90% tPHL 90% tTLH 50% 10% VOH VOL tTHL NOTES: A. The pulse generator has the following characteristics: tw = 4 µs, PRR = 250 kbit/s, ZO = 50 Ω, tr and tf < 50 ns. B. CL includes probe and jig capacitance. Figure 4. Receiver Parameter Test Circuit and Waveform Inputs Outputs II IO VI VCC GND VO Figure 5. Receiver IOS Test APPLICATION INFORMATION Diodes placed in series with the VDD and VSS leads protect the SN75LP1185 in the fault condition when the device outputs are shorted to ±15 V and the power supplies are at low voltage and provide low-impedance paths to ground (see Figure 6). VDD Output SN75LP1185 Output SN75LP1185 VSS Figure 6. Power-Supply Protection to Meet Power-Off Fault Conditions of TIA/EIA-232-F POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN75LP1185DBR ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75LP1185DBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75LP1185DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75LP1185DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75LP1185DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75LP1185DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75LP1185N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN75LP1185NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN75LP1185PWR OBSOLETE TSSOP PW 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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