ETC CX20536

PRODUCT SUMMARY
CX20536: CDMA and GPS Baseband Analog Processor
• Single mode for CDMA phones, but also with GPS position
location capability
• Receive signal path includes:
− Separate CDMA, GPS filters, and ADCs
− DC offset correction
The CX20536 operates within a power supply voltage range of 2.7
V to 3.3 V. Power control logic maintains a minimum power
consumption. Electrical performance parameters are designed to
operate over the –30 °C to +85 °C range. The device is available
in a 32-pin, 5 x 5 x 1 mm RF Land Grid Array (RFLGA) package.
The device package and pinout are shown in Figure 1. A system
block diagram of the CX20536 is shown in Figure 2.
• Receive VHF PLL synthesizer:
− Programmable charge pump current
− Lock detector output
− Operate in conjunction with CDMA/GPS mode receive
functions
• System clock generation:
− 19.2, 19.68, and 19.8 MHz system clock support
− CHIPx8 accepts external CHIPx8 clock (9.8304 MHz or
8.184 MHz)
RXQD1
• Low power consumption in all operating modes including sleep
operation
VC
• Operational temperature –30 °C to +85 °C
VREFP
• Single supply voltage 2.7 to 3.3 V
RBIAS
Features
VREFN
• GPS receivers
AVDD_RX
• Dual-band, dual-mode mobile phones (including E911
capabilities)
analog and digital signals for CDMA and GPS operation. For a
given operation, the CX20536 accepts analog In-phase (I) and
Quadrature (Q) signals, performs channel selection low-pass
filtering, and converts the analog baseband signals into digital
signals. For clock generation, the CX20536 includes internal
digital and Phase Locked Loop (PLL) clock synthesis for 19.2,
19.68, and 19.8 MHz system clocks. It also provides the
capability to accept the CHIPx8 clock from the Mobile Station
Modem (MSM) or equivalent baseband device. The CX20536 also
integrates a VHF PLL synthesizer to synthesize a receive
Intermediate Frequency (IF) Local Oscillator (LO).
IOFFSET
Applications
32
31
30
29
28
27
26
RXQ+
3
23
RXQD4
• Mode control logic for receive/GPS and sleep modes
RXI+
4
22
RXID1
• Functionality similar to the CX20489 and CX20529, with GPS
processing capability
RXI–
5
21
RXID2
AVDD_SYN
6
20
RXID3
AVSS_SYN
7
19
RXID4
RXPDOUT
8
18
SLEEP
RXPLL_IN
9
17
SYN_ENA
• RFLGA™ (32-pin, 5 x 5 x 1 mm) package
Description
The CX20536 is a receive-only Code Division Multiple Access
(CDMA) and Global Positioning System (GPS) Baseband Analog
Processor (BAP) for dual-mode CDMA and GPS-capable portable
phones. The device is designed to interface between the receive
section and the digital processing circuitry of the telephone.
The CX20536 includes all of the circuitry needed to support
receive baseband signal processing and conversions between
10
11
12
13
14
15
16
SYN_CLK
RXQD3
CHIPX8IN
24
SYN_DATA
2
LOCK
RXQD2
RXQ–
TCXO
25
DVDD
1
PLLFLTR
QOFFSET
C1387
Figure 1. CX20536 Pinout – 32-Pin RFLGA
(Top View)
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
103089B • Skyworks Proprietary and Confidential information • Products and Product Information are Subject to Change Without Notice • January 14, 2005
1
PRODUCT SUMMARY • CX20536
RF Chipset
CDMA/GPS BAP
RF
Transmit
PA
CX20536
RF
Receive
Baseband
C1388
Figure 2. CX20536 System Block Diagram
Ordering Information
Model Name
CX20536 CDMA Baseband Analog Processor
Manufacturing Part Number
Product Revision
CX20536-12
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Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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January 14, 2005 • Skyworks Proprietary and Confidential information • Products and Product Information are Subject to Change Without Notice • 103089B