ETC AAT3218IGV-2.85-T1

AAT3218
150mA MicroPower™ High Performance LDO
General Description
Features
The AAT3218 MicroPower™ Low Dropout Linear
Regulator is ideally suited for portable applications
where very fast transient response, extended battery
life and small size are critical. The AAT3218 has
been specifically designed for high speed turn on and
turn off performance, fast transient response, good
power supply ripple rejection (PSRR) and is reasonably low noise, making it ideal for powering sensitive
circuits with fast switching requirements.
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Other features include low quiescent current, typically 70µA, and low dropout voltage which is typically
less than 200mV at the maximum output current level
of 150mA. The device is output short circuit protected and has a thermal shutdown circuit for additional
protection under extreme operating conditions.
The AAT3218 also features a low-power shutdown
mode for extended battery life. A reference bypass
pin has been provided to improve PSRR performance and output noise, by connecting a small
external capacitor from the AAT3218's reference
output to ground.
The AAT3218 is available in a space saving 5-pin
SOT23 or 8-pin SC70JW package in 16 factory
programmed voltages of 1.2V, 1.4V, 1.5V, 1.8V,
1.9V, 2.0V, 2.3V, 2.5V, 2.6V, 2.7V, 2.8V, 2.85V,
2.9V, 3.0V, 3.3V or 3.5V.
PowerLinear™
Low Dropout - 200mV at 150mA
Guaranteed 150mA Output
High accuracy ±1.5%
70µA Quiescent Current
Fast line and load transient response
High speed device turn-on and shutdown
High Power Supply Ripple Rejection
Low self noise
Short circuit protection
Over-Temperature protection
Uses Low ESR ceramic capacitors
Output noise reduction bypass capacitor
Shutdown mode for longer battery life
Low temperature coefficient
16 Factory programmed output voltages
SOT23 5-pin or SC70JW 8-pin package
Applications
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Cellular Phones
Notebook Computers
Portable Communication Devices
Personal Portable Electronics
Digital Cameras
Typical Application
VIN
VOUT
IN
OUT
AAT3218
ON/OFF
BYP
EN
GND
1µF
GND
3218.2004.02.1.0
10nF
2.2µF
GND
1
AAT3218
150mA MicroPower™ High Performance LDO
Pin Descriptions
Pin #
Symbol
Function
SOT23-5
SC70JW-8
1
5, 6
IN
2
8
GND
3
7
EN
4
1
BYP
Bypass capacitor connection - to improve AC ripple rejection,
connect a 10nF capacitor to GND. This will also provide a soft
start function.
5
2, 3, 4
OUT
Output pin - should be decoupled with 2.2µF ceramic capacitor.
Input voltage pin - should be decoupled with 1µF or greater
capacitor.
Ground connection pin
Enable pin - this pin should not be left floating. When pulled low
the PMOS pass transistor turns off and all internal circuitry
enters low-power mode, consuming less than 1µA.
Pin Configuration
SOT23-5
(Top View)
OUT
BYP
BYP
OUT
OUT
OUT
1
8
7
2
2
2
1 5
2
3 4
1
IN
GND
EN
SC70JW-8
(Top View)
3
6
4
5
GND
EN
IN
IN
3218.2004.02.1.0
AAT3218
150mA MicroPower™ High Performance LDO
Absolute Maximum Ratings
Symbol
VIN
IOUT
TJ
(TA=25°C unless otherwise noted)
Description
Input Voltage
DC Output Current
Operating Junction Temperature Range
Value
Units
6
PD/(VIN-VO)
-40 to 150
V
mA
°C
Note: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum rating should be applied at any one time.
Thermal Information
Symbol
ΘJA
PD
Description
Maximum Thermal Resistance (SOT23-5, SC70JW-8)
Maximum Power Dissipation1 (SOT23-5, SC70JW-8)
1
Rating
Units
190
526
°C/W
mW
Note 1: Mounted on a demo board.
Recommended Operating Conditions
Symbol
VIN
T
Description
Input Voltage
Ambient Temperature Range
2
Rating
Units
(VOUT+VDO) to 5.5
-40 to +85
V
°C
Note 2: To calculate minimum input voltage, use the following equation: VIN(MIN) = VOUT(MAX) + VDO(MAX) as long as VIN ≥ 2.5V.
3218.2004.02.1.0
3
AAT3218
150mA MicroPower™ High Performance LDO
Electrical Characteristics
(VIN=VOUT(NOM)+1V for VOUT options greater than 1.5V. VIN= 2.5 for
VOUT≤1.5V. IOUT=1mA, COUT=2.2µF, CIN=1µF, TA= -40 to 85°C unless otherwise noted. Typical values are
at TA=25°C)
Symbol
VOUT
Description
Conditions
Min Typ Max
Output Voltage Tolerance
IOUT = 1mA to 150mA
Output Current
Dropout Voltage 1, 2
Short Circuit Current
Ground Current
Shutdown Current
VOUT > 1.2V
IOUT = 150mA
VOUT < 0.4V
VIN = 5V, No load, EN = VIN
VIN = 5V, EN = 0V
TA=25°C
-1.5
TA=-40 to 85°C -2.5
150
IOUT
VDO
ISC
IQ
ISD
∆VOUT/
VOUT*∆VIN
∆VOUT(line)
Line Regulation
VIN = VOUT + 1 to 5.0V
Dynamic Line Regulation
∆VOUT(load)
tENDLY
VEN(L)
VEN(H)
IEN
Dynamic Load Regulation
Enable Delay Time
Enable Threshold Low
Enable Threshold High
Leakage Current on Enable Pin
VIN=VOUT+1V to VOUT+2V, IOUT=150mA,
TR/TF =2µs
IOUT = 1mA to 150mA, TR<5µs
BYP = open
PSRR
TSD
THYS
eN
TC
Power Supply Rejection Ratio
1.5
2.5
200
600
70
125
1
%
%
mA
mV
mA
µA
µA
0.09
%/V
300
2.5
mV
30
15
mV
µs
V
V
µA
0.6
1.5
VEN = 5V
1 kHz
IOUT=10mA, CBYP=10nF 10kHz
1MHz
Over Temp Shutdown Threshold
Over Temp Shutdown Hysteresis
Output Noise
Noise Power BW = 300Hz-50kHz
Output Voltage Temp. Coeff.
Units
1
67
47
45
145
12
50
22
dB
°C
°C
µVrms/rtHz
ppm/°C
Note 1: VDO is defined as VIN - VOUT when VOUT is 98% of nominal.
Note 2: For VOUT < 2.3V, VDO = 2.5V - VOUT.
4
3218.2004.02.1.0
AAT3218
150mA MicroPower™ High Performance LDO
Typical Characteristics
(Unless otherwise noted, VIN = 5V, TA = 25°C)
Dropout Voltage vs. Temperature
Dropout Characteristics
3.00
IL = 150mA
IOUT = 0mA
2.80
V OUT (V)
Dropout Voltage (mV)
3.20
260
240
220
200
180
160
140
120
100
80
60
40
20
0
IL = 100mA
IOUT = 10mA
2.60
IOUT = 50mA
2.40
IL = 50mA
-40 -30 -20 -10 0
IOUT = 100mA
IOUT = 150mA
2.20
2.00
2.70
10 20 30 40 50 60 70 80 90 100 110 120
Temperature (°C)
2.90
3.00
3.20
Ground Current vs. Input Voltage
90.00
300
80.00
250
70.00
IGND (µA)
200
85°C
150
100
50.00
IOUT=150mA
40.00
IOUT=50mA
IOUT=0mA
IOUT=10mA
20.00
-40°C
50
60.00
30.00
25°C
10.00
0
0
25
50
75
100
125
0.00
150
2
2.5
3
3.5
Output Current (mA)
4
4.5
VIN (V)
Output Voltage vs. Temperature
Quiescent Current vs. Temperature
1.203
100
90
1.202
80
Output Voltage (V)
Quiescent Current (µA)
3.10
VIN (V)
Dropout Voltage vs. Output Current
Dropout Voltage (mV)
2.80
70
60
50
40
30
20
10
0
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80 90 100 110 120
Temperature (°C)
3218.2004.02.1.0
1.201
1.200
1.199
1.198
1.197
1.196
-40 -30 -20 -10
0
10 20
30
40
50 60
70 80
90 100
Temperature (°C)
5
AAT3218
150mA MicroPower™ High Performance LDO
Typical Characteristics
(Unless otherwise noted, VIN = 5V, TA = 25°C)
Initial Power Up Response Time
CBYP=10nF
Turn-OFF Response Time
CBYP=10nF
VEN (5V/div)
VEN (5V/div)
VOUT (1V/div)
VOUT (1V/div)
50 µs/div
400µs/div
Over Current Protection
Turn-ON Time From Enable (VIN present)
CBYP=10nF
1200
1000
VEN (5V/div)
IOUT (mA)
800
600
400
200
0
-200
VOUT (1V/div)
Time (20 ms/div)
5 µs/div
Load Transient Response
Line Transient Response
500
2.90
6
3.04
5
3.03
V IN (V)
3
3.01
2
3.00
V OUT (V)
3.02
VOUT
400
2.80
300
2.75
200
2.70
100
2.65
1
VOUT
2.99
0
2.98
I OUT (mA)
VIN
4
VOUT (V)
2.85
0
IOUT
2.60
-100
100µs/div
100µs/div
6
3218.2004.02.1.0
AAT3218
150mA MicroPower™ High Performance LDO
Typical Characteristics
(Unless otherwise noted, VIN = 5V, TA = 25°C)
AAT3218 Self Noise
COUT = 10µF (ceramic)
VIH and V IL vs. VIN
Noise Amplitude (µV/rtHz)
1.250
1.225
10
1.200
1
VIH
1.175
1.150
0.1
0.01
1.125
0.001
0.01
0.1
1
10
1.075
100
Frequency (kHz)
3218.2004.02.1.0
VIL
1.100
Band Power:
300Hz to 50kHz = 44.6µVrms/rtHz
100Hz to 100kHz = 56.3µVrms/rtHz
1000
10000
1.050
2.5
3.0
3.5
4.0
4.5
5.0
5.5
VIN (V)
7
AAT3218
150mA MicroPower™ High Performance LDO
Functional Block Diagram
OUT
IN
Active
Feedback
Control
Over-Current
Protection
OverTemperature
Protection
+
Error
Amplifier
-
EN
Fast
Start
Control
Voltage
Reference
BYP
Functional Description
The AAT3218 is intended for LDO regulator applications where output current load requirements range
from no load to 150mA.
The advanced circuit design of the AAT3218 has
been specifically optimized for very fast start-up and
shutdown timing. This proprietary CMOS LDO has
also been tailored for superior transient response
characteristics. These traits are particularly important
for applications, which require fast power supply timing, such as GSM cellular telephone handsets.
The high-speed turn-on capability of the AAT3218 is
enabled through the implementation of a fast start
control circuit, which accelerates the power up behavior of fundamental control and feedback circuits within the LDO regulator.
Fast turn-off time response is achieved by an active
output pull down circuit, which is enabled when the
LDO regulator is placed in the shutdown mode. This
active fast shutdown circuit has no adverse effect on
normal device operation.
The AAT3218 has very fast transient response characteristics, which is an important feature for applications where fast line and load transient response is
8
GND
required. This rapid transient response behavior is
accomplished through the implementation of an
active error amplifier feedback control. This proprietary circuit design is unique to this MicroPower™
LDO regulator.
The LDO regulator output has been specifically optimized to function with low cost, low ESR ceramic
capacitors. However, the design will allow for operation over a wide range of capacitor types.
A bypass pin has been provided to allow the addition
of an optional voltage reference bypass capacitor to
reduce output self noise and increase power supply
ripple rejection. Device self noise and PSRR will be
improved by the addition of a small ceramic capacitor
in this pin. However, increased values of CBYPASS
may slow down the LDO regulator turn-on time.
This LDO regulator has complete short circuit and
thermal protection. The integral combination of these
two internal protection circuits give the AAT3218 a
comprehensive safety system to guard against
extreme adverse operating conditions. Device
power dissipation is limited to the package type and
thermal dissipation properties. Refer to the thermal
considerations discussion in the section for details on
device operation at maximum output current loads.
3218.2004.02.1.0
AAT3218
150mA MicroPower™ High Performance LDO
Applications Information
Bypass Capacitor and Low Noise
Applications
To assure the maximum possible performance is
obtained from the AAT3218, please refer to the following application recommendations.
A bypass capacitor pin is provided to enhance the
low noise characteristics of the AAT3218 LDO regulator. The bypass capacitor is not necessary for
operation of the AAT3218. However, for best device
performance, a small ceramic capacitor should be
placed between the Bypass pin (BYP) and the device
ground pin (GND). The value of CBYP may range
from 470pF to 10nF. For lowest noise and best possible power supply ripple rejection performance a
10nF capacitor should be used. To practically realize
the highest power supply ripple rejection and lowest
output noise performance, it is critical that the capacitor connection between the BYP pin and GND pin be
direct and PCB traces should be as short as possible. Refer to the PCB Layout Recommendations
section of this document for examples.
Input Capacitor
Typically a 1µF or larger capacitor is recommended for CIN in most applications. A CIN capacitor is
not required for basic LDO regulator operation.
However, if the AAT3218 is physically located more
than 3 centimeters from an input power source, a
CIN capacitor will be needed for stable operation.
CIN should be located as close to the device VIN pin
as practically possible. CIN values greater than
1µF will offer superior input line transient response
and will assist in maximizing the highest possible
power supply ripple rejection.
Ceramic, tantalum or aluminum electrolytic capacitors may be selected for CIN. There is no specific
capacitor ESR requirement for CIN. However, for
150mA LDO regulator output operation, ceramic
capacitors are recommended for CIN due to their
inherent capability over tantalum capacitors to withstand input current surges from low impedance
sources such as batteries in portable devices.
Output Capacitor
For proper load voltage regulation and operational
stability, a capacitor is required between pins VOUT
and GND. The COUT capacitor connection to
the LDO regulator ground pin should be made as
direct as practically possible for maximum device
performance.
The AAT3218 has been specifically designed to function with very low ESR ceramic capacitors. For best
performance, ceramic capacitors are recommended.
Typical output capacitor values for maximum output
current conditions range from 1µF to 10µF.
Applications utilizing the exceptionally low output
noise and optimum power supply ripple rejection
characteristics of the AAT3218 should use 2.2µF or
greater for COUT. If desired, COUT may be increased
without limit.
In low output current applications where output
load is less then 10mA, the minimum value for
COUT can be as low as 0.47µF.
3218.2004.02.1.0
There is a relationship between the bypass capacitor value and the LDO regulator turn on time and
turn off time. In applications where fast device turn
on time and turn off time is desired, the value of
CBYP should be reduced.
In applications where low noise performance and/
or ripple rejection are less of a concern, the bypass
capacitor may be omitted. The fastest device turn
on time will be realized when no bypass capacitor
is used.
DC leakage on this pin can affect the LDO regulator output noise and voltage regulation performance. For this reason, the use of a low leakage,
high quality ceramic (NPO or COG type) or film
capacitor is highly recommended.
Capacitor Characteristics
Ceramic composition capacitors are highly recommended over all other types of capacitors for use
with the AAT3218. Ceramic capacitors offer many
advantages over their tantalum and aluminum electrolytic counterparts. A ceramic capacitor typically
has very low ESR, is lower cost, has a smaller PCB
footprint and is non-polarized. Line and load transient response of the LDO regulator is improved by
using low ESR ceramic capacitors. Since ceramic
capacitors are non-polarized, they are not prone to
incorrect connection damage.
9
AAT3218
150mA MicroPower™ High Performance LDO
Applications Information
Equivalent Series Resistance (ESR): ESR is a very
important characteristic to consider when selecting a
capacitor. ESR is the internal series resistance associated with a capacitor, which includes lead resistance, internal connections, size and area, material
composition and ambient temperature. Typically
capacitor ESR is measured in milliohms for ceramic
capacitors and can range to more than several ohms
for tantalum or aluminum electrolytic capacitors.
Ceramic Capacitor Materials: Ceramic capacitors
less than 0.1µF are typically made from NPO or
COG materials. NPO and COG materials are typically tight tolerance very stable over temperature.
Larger capacitor values are typically composed of
X7R, X5R, Z5U and Y5V dielectric materials. Large
ceramic capacitors, typically greater then 2.2µF are
often available in the low cost Y5V and Z5U
dielectrics. These two material types are not recommended for use with LDO regulators since the
capacitor tolerance can vary more than ±50% over
the operating temperature range of the device. A
2.2µF Y5V capacitor could be reduced to 1µF over
temperature, this could cause problems for circuit
operation. X7R and X5R dielectrics are much more
desirable. The temperature tolerance of X7R
dielectric is better than ±15%.
Capacitor area is another contributor to ESR.
Capacitors which are physically large in size will have
a lower ESR when compared to a smaller sized
capacitor of an equivalent material and capacitance
value. These larger devices can improve circuit transient response when compared to an equal value
capacitor in a smaller package size.
Consult capacitor vendor data sheets carefully
when selecting capacitors for LDO regulators.
Enable Function
The AAT3218 features an LDO regulator enable/
disable function. This pin (EN) is active high and is
compatible with CMOS logic. To assure the LDO
regulator will switch on, the EN turn on control level
must be greater than 1.5 volts. The LDO regulator
will go into the disable shutdown mode when the
voltage on the EN pin falls below 0.6 volts. If the
enable function is not needed in a specific application, it may be tied to VIN to keep the LDO regulator in a continuously on state.
10
When the LDO regulator is in the shutdown mode,
an internal 1.5kΩ resistor is connected between
VOUT and GND. This is intended to discharge COUT
when the LDO regulator is disabled. The internal
1.5kΩ has no adverse effect on device turn on time.
Short Circuit Protection
The AAT3218 contains an internal short circuit protection circuit that will trigger when the output load
current exceeds the internal threshold limit. Under
short circuit conditions the output of the LDO regulator will be current limited until the short circuit
condition is removed from the output or LDO regulator package power dissipation exceeds the
device thermal limit.
Thermal Protection
The AAT3218 has an internal thermal protection circuit which will turn on when the device die temperature exceeds 150°C. The internal thermal protection circuit will actively turn off the LDO regulator
output pass device to prevent the possibility of over
temperature damage. The LDO regulator output
will remain in a shutdown state until the internal die
temperature falls back below the 150°C trip point.
The combination and interaction between the short
circuit and thermal protection systems allow the
LDO regulator to withstand indefinite short circuit
conditions without sustaining permanent damage.
No-Load Stability
The AAT3218 is designed to maintain output voltage regulation and stability under operational noload conditions. This is an important characteristic
for applications where the output current may drop
to zero.
Reverse Output to Input Voltage
Conditions and Protection
Under normal operating conditions a parasitic
diode exists between the output and input of the
LDO regulator. The input voltage should always
remain greater then the output load voltage maintaining a reverse bias on the internal parasitic
diode. Conditions where VOUT might exceed VIN
should be avoided since this would forward bias
the internal parasitic diode and allow excessive
current flow into the VOUT pin possibly damaging
the LDO regulator.
3218.2004.02.1.0
AAT3218
150mA MicroPower™ High Performance LDO
Applications Information
In applications where there is a possibility of VOUT
exceeding VIN for brief amounts of time during normal operation, the use of a larger value CIN capacitor is highly recommended. A larger value of CIN
with respect to COUT will effect a slower CIN decay
rate during shutdown, thus preventing VOUT from
exceeding VIN. In applications where there is a
greater danger of VOUT exceeding VIN for extended
periods of time, it is recommended to place a schottky diode across VIN to VOUT (connecting the cathode to VIN and anode to VOUT). The Schottky diode
forward voltage should be less than 0.45 volts.
Thermal Considerations and High
Output Current Applications
The AAT3218 is designed to deliver a continuous
output load current of 150mA under normal operating conditions.
The limiting characteristic for the maximum output
load current safe operating area is essentially
package power dissipation and the internal preset
thermal limit of the device. In order to obtain high
operating currents, careful device layout and circuit
operating conditions need to be taken into account.
The following discussions will assume the LDO regulator is mounted on a printed circuit board utilizing
the minimum recommended footprint as stated in
the layout considerations section of the document.
pation and the input to output voltage drop across
the LDO regulator. Refer to the following simple
equation:
IOUT(MAX) < PD(MAX) / (VIN - VOUT)
For example, if VIN = 5V, VOUT = 3V and TA = 25°,
IOUT(MAX) < 264mA. If the output load current were to
exceed 264mA or if the ambient temperature were to
increase, the internal die temperature will increase.
If the condition remained constant, the LDO regulator thermal protection circuit will activate.
To figure what the maximum input voltage would be
for a given load current refer to the following equation. This calculation accounts for the total power
dissipation of the LDO Regulator, including that
caused by ground current.
PD(MAX) = (VIN - VOUT)IOUT + (VIN x IGND)
This formula can be solved for VIN to determine the
maximum input voltage.
VIN(MAX) = (PD(MAX) + (VOUT x IOUT)) / (IOUT + IGND)
The following is an example for an AAT3218 set for
a 2.5 volt output:
From the discussion above, PD(MAX) was determined to equal 526mW at TA = 25°C.
VOUT = 2.5 volts
IOUT = 150mA
IGND = 150µA
At any given ambient temperature (TA) the maximum package power dissipation can be determined by the following equation:
VIN(MAX)=(526mW+(2.5Vx150mA))/(150mA +150µA)
PD(MAX) = [TJ(MAX) - TA] / ΘJA
Thus, the AAT3218 can sustain a constant 2.5V
output at a 150mA load current as long as VIN is ≤
6.00V at an ambient temperature of 25°C. 6.0V is
the absolute maximum voltage where an AAT3218
would never be operated, thus at 25°C, the device
would not have any thermal concerns or operational VIN(MAX) limits.
Constants for the AAT3218 are TJ(MAX), the maximum junction temperature for the device which is
125°C and ΘJA = 190°C/W, the package thermal
resistance. Typically, maximum conditions are calculated at the maximum operating temperature
where TA = 85°C, under normal ambient conditions
TA = 25°C. Given TA = 85°, the maximum package
power dissipation is 211mW. At TA = 25°C°, the
maximum package power dissipation is 526mW.
The maximum continuous output current for the
AAT3218 is a function of the package power dissi-
3218.2004.02.1.0
VIN(MAX) = 6.00V
This situation can be different at 85°C. The following is an example for an AAT3218 set for a 2.5 volt
output at 85°C:
From the discussion above, PD(MAX) was determined to equal 211mW at TA = 85°C.
11
AAT3218
150mA MicroPower™ High Performance LDO
Applications Information
VIN(MAX) = 3.90V
Higher input to output voltage differentials can be
obtained with the AAT3218, while maintaining
device functions within the thermal safe operating
area. To accomplish this, the device thermal
resistance must be reduced by increasing the heat
sink area or by operating the LDO regulator in a
duty cycled mode.
For example, an application requires VIN = 4.2V
while VOUT = 2.5V at a 150mA load and TA = 85°C.
VIN is greater than 3.90V, which is the maximum
safe continuous input level for VOUT = 2.5V at
150mA for TA = 85°C. To maintain this high input
voltage and output current level, the LDO regulator
must be operated in a duty cycled mode. Refer to
the following calculation for duty cycle operation:
PD(MAX) is assumed to be 211mW
IGND = 150µA
IOUT = 150mA
VIN = 4.2 volts
Voltage Drop (V)
VIN(MAX)=(211mW+(2.5Vx150mA))/(150mA +150uA)
3.5
3
2.5
200mA
2
1.5
1
0.5
0
0
10
20
30
40
50
60
70
80
90
100
Duty Cycle (%)
Device Duty Cycle vs. VDROP
VOUT= 2.5V @ 50 C
3.5
Voltage Drop (V)
VOUT = 2.5 volts
IOUT = 150mA
IGND = 150uA
Device Duty Cycle vs. V DROP
VOUT = 2.5V @ 25 C
3
2.5
200mA
2
150mA
1.5
1
0.5
0
0
10
20
30
40
50
60
70
80
90
100
Duty Cycle (%)
VOUT = 2.5 volt
%DC=100(PD(MAX)/((VIN-VOUT)IOUT+(VINxIGND))
%DC=100(211mW/((4.2V-2.5V)150mA+(4.2Vx150µA))
Device Duty Cycle vs. VDROP
VOUT = 2.5V @ 85 C
%DC = 85.54%
The following family of curves show the safe operating area for duty cycled operation from ambient
room temperature to the maximum operating level.
3.5
Voltage Drop (V)
For a 150mA output current and a 2.7volt drop
across the AAT3218 at an ambient temperature of
85°C, the maximum on time duty cycle for the
device would be 85.54%.
100mA
3
2.5
200mA
2
1.5
150mA
1
0.5
0
0
10
20
30
40
50
60
70
80
90
100
Duty Cycle (%)
12
3218.2004.02.1.0
AAT3218
150mA MicroPower™ High Performance LDO
Applications Information
High Peak Output Current Applications
two power dissipation levels can summed to determine the total true power dissipation under the varied load.
Some applications require the LDO regulator to
operate at continuous nominal level with short
duration high current peaks. The duty cycles for
both output current levels must be taken into
account. To do so, one would first need to calculate the power dissipation at the nominal continuous level, then factor in the additional power dissipation due to the short duration high current peaks.
PD(total) = PD(100mA) + PD(150mA)
PD(total) = 156.6mW + 21mW
PD(total) = 177.6mW
For example, a 2.5V system using a AAT3218IGV2.5-T1 operates at a continuous 100mA load current level and has short 150mA current peaks. The
current peak occurs for 378µs out of a 4.61ms period. It will be assumed the input voltage is 4.2V.
Printed Circuit Board Layout
Recommendations
First the current duty cycle in percent must be calculated:
% Peak Duty Cycle: X/100 = 378µs/4.61ms
% Peak Duty Cycle = 8.2%
The LDO Regulator will be under the 100mA load
for 91.8% of the 4.61ms period and have 150mA
peaks occurring for 8.2% of the time. Next, the
continuous nominal power dissipation for the
100mA load should be determined then multiplied
by the duty cycle to conclude the actual power dissipation over time.
PD(MAX) = (VIN - VOUT)IOUT + (VIN x IGND)
PD(100mA) = (4.2V - 2.5V)100mA + (4.2V x 150µA)
PD(100mA) = 170.6mW
PD(91.8%D/C) = %DC x PD(100mA)
PD(91.8%D/C) = 0.918 x 170.6mW
PD(91.8%D/C) = 156.6mW
The power dissipation for 100mA load occurring for
91.8% of the duty cycle will be 156.6mW. Now the
power dissipation for the remaining 8.2% of the
duty cycle at the 150mA load can be calculated:
PD(MAX) = (VIN - VOUT)IOUT + (VIN x IGND)
PD(150mA) = (4.2V - 2.5V)150mA + (4.2V x 150mA)
PD(150mA) = 255.6mW
PD(8.2%D/C) = %DC x PD(150mA)
PD(8.2%D/C) = 0.082 x 255.6mW
PD(8.2%D/C) = 21mW
The power dissipation for 150mA load occurring for
8.2% of the duty cycle will be 21mW. Finally, the
3218.2004.02.1.0
The maximum power dissipation for the AAT3218
operating at an ambient temperature of 85°C is
211mW. The device in this example will have a total
power dissipation of 177.6mW. This is well within
the thermal limits for safe operation of the device.
In order to obtain the maximum performance from
the AAT3218 LDO regulator, very careful attention
must be considered in regard to the printed circuit
board (PCB) layout. If grounding connections are
not properly made, power supply ripple rejection,
low output self noise and transient response can
be compromised.
Figure 1 shows a common LDO regulator layout
scheme. The LDO Regulator, external capacitors
(CIN, COUT and CBYP) and the load circuit are all connected to a common ground plane. This type of layout will work in simple applications where good
power supply ripple rejection and low self noise are
not a design concern. For high performance applications, this method is not recommended.
The problem with the layout in Figure 1 is the bypass
capacitor and output capacitor share the same
ground path to the LDO regulator ground pin along
with the high current return path from the load back
to the power supply. The bypass capacitor node is
connected directly to the LDO regulator internal reference, making this node very sensitive to noise or
ripple. The internal reference output is fed into the
error amplifier, thus any noise or ripple from the
bypass capacitor will be subsequently amplified by
the gain of the error amplifier.
This effect can
increase noise seen on the LDO regulator output as
well as reduce the maximum possible power supply
ripple rejection. There is PCB trace impedance
between the bypass capacitor connection to ground
and the LDO regulator ground connection. When
the high load current returns through this path, a
small ripple voltage is created, feeding into the CBYP
loop.
13
AAT3218
150mA MicroPower™ High Performance LDO
Applications Information
ILOAD
IIN
VIN
VIN
EN
DC INPUT
LDO
Regulator
VOUT
BYP
GND
CIN
GND
CBYP
IGND
IRIPPLE
IBYP + noise
RTRACE
COUT
CBYP
RLOAD
GND
LOOP
RTRACE
RTRACE
RTRACE
ILOAD return + noise and ripple
Figure 1: Common LDO Regulator Layout with CBYP Ripple feedback loop
Figure 2 shows the preferred method for the bypass
and output capacitor connections. For low output
noise and highest possible power supply ripple
rejection performance, it is critical to connect the
bypass and output capacitor directly to the LDO regulator ground pin. This method will eliminate any
load noise or ripple current feedback through the
LDO regulator.
ILOAD
IIN
VIN
VIN
EN
LDO
Regulator
VOUT
BYP
GND
DC INPUT
CIN
IGND
CBYP
COUT
RLOAD
IBYP only
IRIPPLE
GND
RTRACE
RTRACE
RTRACE
RTRACE
ILOAD return + noise and ripple
Figure 2: Recommended LDO Regulator Layout
Evaluation Board Layout
The AAT3218 evaluation layout follows the recommend printed circuit board layout procedures and
Figure 3: Evaluation board
component side layout
14
can be used as an example for good application
layouts.
Note: Board layout shown is not to scale.
Figure 4: Evaluation board
solder side layout
Figure 5: Evaluation board
top side silk screen layout /
assembly drawing
3218.2004.02.1.0
AAT3218
150mA MicroPower™ High Performance LDO
Ordering Information
Output Voltage
1.2V
1.5V
1.8V
1.9V
2.0V
2.3V
2.5V
2.6V
2.7V
2.8V
2.85V
2.9V
3.0V
3.3V
3.5V
1.2V
1.4V
1.5V
1.8V
1.9V
2.0V
2.3V
2.5V
2.6V
2.7V
2.8V
2.85V
2.9V
3.0V
3.3V
3.5V
Package
SOT23-5
SOT23-5
SOT23-5
SOT23-5
SOT23-5
SOT23-5
SOT23-5
SOT23-5
SOT23-5
SOT23-5
SOT23-5
SOT23-5
SOT23-5
SOT23-5
SOT23-5
SC70JW-8
SC70JW-8
SC70JW-8
SC70JW-8
SC70JW-8
SC70JW-8
SC70JW-8
SC70JW-8
SC70JW-8
SC70JW-8
SC70JW-8
SC70JW-8
SC70JW-8
SC70JW-8
SC70JW-8
SC70JW-8
Marking1
GZXYY
HBXYY
HDXYY
HNXYY
GWXYY
EOXYY
EMXYY
HOXYY
GXXYY
HPXYY
KWXYY
JUXYY
GZXYY
HBXYY
HDXYY
HNXYY
GWXYY
EOXYY
EMXYY
HOXYY
GXXYY
HPXYY
IUXYY
Part Number (Tape and Reel)
AAT3218IGV-1.2-T1
AAT3218IGV-1.5-T1
AAT3218IGV-1.8-T1
AAT3218IGV-1.9-T1
AAT3218IGV-2.0-T1
AAT3218IGV-2.3-T1
AAT3218IGV-2.5-T1
AAT3218IGV-2.6-T1
AAT3218IGV-2.7-T1
AAT3218IGV-2.8-T1
AAT3218IGV-2.85-T1
AAT3218IGV-2.9-T1
AAT3218IGV-3.0-T1
AAT3218IGV-3.3-T1
AAT3218IGV-3.5-T1
AAT3218IJS-1.2-T1
AAT3218IJS-1.4-T1
AAT3218IJS-1.5-T1
AAT3218IJS-1.8-T1
AAT3218IJS-1.9-T1
AAT3218IJS-2.0-T1
AAT3218IJS-2.3-T1
AAT3218IJS-2.5-T1
AAT3218IJS-2.6-T1
AAT3218IJS-2.7-T1
AAT3218IJS-2.8-T1
AAT3218IJS-2.85-T1
AAT3218IJS-2.9-T1
AAT3218IJS-3.0-T1
AAT3218IJS-3.3-T1
AAT3218IJS-3.5-T1
Note: Sample stock is generally held on all part numbers listed in BOLD.
Note 1: XYY = assembly and date code.
3218.2004.02.1.0
15
AAT3218
150mA MicroPower™ High Performance LDO
Package Information
SOT23-5
2.85 ± 0.15
1.90 BSC
0.40 ± 0.10
0.075 ± 0.075
0.15 ± 0.07
4° ± 4°
10° ± 5°
1.10 ± 0.20
0.60 REF
1.20 ± 0.25
2.80 ± 0.20
1.575 ± 0.125
0.95
BSC
0.60 REF
0.45 ± 0.15
GAUGE PLANE
0.10 BSC
All dimensions in millimeters.
16
3218.2004.02.1.0
AAT3218
150mA MicroPower™ High Performance LDO
SC70JW-8
2.20 ± 0.20
1.75 ± 0.10
0.50 BSC 0.50 BSC 0.50 BSC
0.225 ± 0.075
2.00 ± 0.20
0.100
7° ± 3°
0.45 ± 0.10
4° ± 4°
0.05 ± 0.05
0.15 ± 0.05
1.10 MAX
0.85 ± 0.15
0.048REF
2.10 ± 0.30
All dimensions in millimeters.
3218.2004.02.1.0
17
AAT3218
150mA MicroPower™ High Performance LDO
AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work
rights, or other intellectual property rights are implied.
AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice, and advise customers to obtain the latest
version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale
supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability.
AnalogicTech warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with AnalogicTech’s standard warranty. Testing and
other quality control techniques are utilized to the extent AnalogicTech deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed.
Advanced Analogic Technologies, Inc.
830 E. Arques Avenue, Sunnyvale, CA 94085
Phone (408) 737-4600
Fax (408) 737-4611
18
3218.2004.02.1.0