ICS ICS650-12

ICS650-12
MPEG Clock Synthesizer
Description
Features
The ICS650-12 is a low cost, low jitter, high
performance clock synthesizer designed to
produce fixed clock outputs of 13.5 MHz and
27.0 MHz and four selectable clock outputs of two
Processor Clocks (PCLK1 and PCLK2), Audio
Clock (ACLK), and Communications Clock
(CCLK). Using our patented analog PhaseLocked Loop (PLL) techniques, the device uses a
27.0 MHz clock or fundamental crystal input to
produce clocks ideal for Digital Video/MPEGbased applications.
•
•
•
•
Packaged in 20 pin tiny SSOP (QSOP)
Input Frequency of 27.0 MHz
Zero ppm synthesis error in output clocks
Provides fixed 13.5 MHz and 27.0 MHz.
Also provides two selectable Processor Clocks,
one Audio Clock, and one Communications Clock
• Ideal for Digital Video/MPEG-based applications
• 3.3 V or 5.0 V operating voltage
• Entire chip powers down (when CS1=CS0=0)
Block Diagram
PS2:0
Clock
Synthesis
and
Control
Circuitry
AS2:0
CS1:0
Output
Buffer
PCLK1
Output
Buffer
PCLK2
Output
Buffer
ACLK
Output
Buffer
CCLK
Output
Buffer
13.5 MHz
Output
Buffer
27.0 MHz
÷2
27.0 MHz
crystal or
clock
Input
Buffer/Crystal
Oscillator
1
Revision 113000
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com
MDS 650-12 A
ICS650-12
MPEG Clock Synthesizer
Pin Assignment
PS2
1
20
PS1
X2
2
19
PS0
X1
3
18
CCLK
VDD
4
17
PCLK2
CS1
5
16
VDD
GND
6
15
AS1
ACLK
7
14
GND
PCLK1
8
13
13.5M
CS0
9
12
27M
AS2
10
11
AS0
20 pin SSOP (QSOP)
PCLK1 and PCLK2 Select Table (in MHz)
PS2 PS1 PS0
PCLK1
PCLK2
0
0
0
108.00
54.00
0
0
1
55.00
27.5
0
1
0
66.67
33.33
0
1
1
80.00
40.00
1
0
0
54.00
27.00
1
0
1
81.00
40.5
1
1
0
50.00
25.00
1
1
1
60.00
30.00
ACLK Select Table (in MHz)
AS2 AS1 AS0
ACLK
0
0
0
12.288
0
0
1
11.2896
0
1
0
8.192
0
1
1
24.576
1
0
0
8.192
1
0
1
16.9344
1
1
0
18.432
1
1
1
11.2896
CCLK Select Table (in MHz)
CS1 CS0
CCLK
0
0
All off*
0
1
20.00
1
0
66.6666
1
1
24.576
*Note: Entire chip powers
down (outputs stop low)
when CS1 = CS0 = 0.
Pin Descriptions
Pin #
1
2
3
4, 16
5
6, 14
7
8
9
10
11
12
13
15
17
18
19
20
Name
PS2
X2
X1
VDD
CS1
GND
ACLK
PCLK1
CS0
AS2
AS0
27M
13.5M
AS1
PCLK2
CCLK
PS0
PS1
Type
I
XO
XI
P
I
P
O
O
I
I
I
O
O
I
O
O
I
I
Description
Processor Clock Select Pin 2. See above table.
Crystal connection to a 27.0 MHz crystal or leave unconnected for clock input
Crystal connection. Connect to a 27.0 MHz fundamental mode crystal or clock input.
Connect to +3.3 V or +5.0 V.
Communications Clock Select Pin 1. See above table.
Connect to ground.
Audio Clock Output. See above table.
Processor Clock Output 1. See above table.
Communications Clock Select 0. See above table.
Audio Clock Select Pin 2. See above table.
Audio Clock Select Pin 0. See above table.
27 MHz buffered clock output.
13.5 MHz clock output.
Audio Clock Select Pin 1. See above table.
Processor Clock Output 2. See above table.
Communications Clock Output. See above table.
Processor Clock Select Pin 0. See above table.
Prcoessor Clock Select Pin 1. See above table.
Key: I = Input with internal pull-up; O = output; P = power supply connection; XI, XO = crystal
connections
2
Revision 113000
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com
MDS 650-12 A
ICS650-12
MPEG Clock Synthesizer
Electrical Specifications
Parameter
Conditions
Minimum
Typical
Maximum
Units
7
VDD+0.5
70
260
150
V
V
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply voltage, VDD
Inputs and Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage temperature
Referenced to GND
Referenced to GND
-0.5
0
Max of 10 seconds
-65
°C
°C
°C
DC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
Operating Voltage, VDD
Input High Voltage, VIH
Input Low Voltage, VIL
Output High Voltage, VOH
Output Low Voltage, VOL
Output High Voltage, VOH, VDD = 3.3 or 5V
Operating Supply Current, IDD, at 5V
Operating Supply Current, IDD, at 3.3V
Short Circuit Current, VDD = 3.3 V
Input Capacitance
3.0
2
5.5
0.8
VDD=3.3V, IOH=-8mA
VDD=3.3V, IOL=8mA
IOH=-8mA
No Load
No Load
Each output
Except X1
2.4
0.4
VDD-0.4
39
22
±50
7
V
V
V
V
V
V
mA
mA
mA
pF
AC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
Input Crystal or Clock Frequency
Output Clocks Accuracy (synthesis error)
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle
One Sigma Jitter, ACLK
Absolute Clock Period Jitter
All clocks
0.8 to 2.0V
2.0 to 0.8V
At VDD/2
VDD=3.3 V
VDD=5.0 V
VDD=3.3 V, Except CCLK=20 MHz
VDD=5.0 V, Except CCLK=20 MHz
Notes:
27
0
40
50
100
40
±300
±200
1
1.5
1.5
60
MHz
ppm
ns
ns
%
ps
ps
ps
ps
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
External Components
A minimum number of external components are required for proper operation. A decoupling capacitor of
0.01 µF should be connected between VDD and GND on pins 4 and 6, and 16 and 14, and a 33 Ω
terminating resistor may be used on each clock output if the trace is longer than 1 inch.
3
Revision 113000
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com
MDS 650-12 A
ICS650-12
MPEG Clock Synthesizer
Package Outline and Package Dimensions
(For current dimensional specifications, see JEDEC Publication No. 95.)
20 pin SSOP
E1
INDEX
AREA
1
Symbol
A
A1
b
c
D
e
E
E1
L
E
2
Inches
Min
Max
0.053 0.069
0.004 0.010
0.008 0.012
0.007 0.010
0.337 0.344
.025 BSC
0.228 0.244
0.150 0.157
0.016 0.050
Millimeters
Min
Max
1.35
1.75
0.10
0.25
0.20
0.30
0.18
0.25
8.55
8.75
0.635 BSC
5.80
6.20
3.80
4.00
0.40
1.27
D
A1
A
c
e
b
L
Ordering Information
Part/Order Number
ICS650R-12
ICS650R-12T
Marking
ICS650R-12
ICS650R-12
Package
20 pin SSOP
20 pin SSOP
Shipping
Tubes
Tape and Reel
Temperature
0 to 70 °C
0 to 70 °C
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its
use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is
intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does
not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
4
Revision 113000
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • www.icst.com
MDS 650-12 A