LED Dot Matrix KODENSHI KLM-040MA-16B This module designed for light emitting display device. Organize with 16×32 matrix combination with 512 of each Red, Green LED Chips, for indoor use. FEATURES MAXIMUM RATINGS •Active display size : 40mm×80mm •Dot size : ø2 •Dot pitch : 2.5mm •Display color : RED, GREEN, AMBER(Mixed color) •Duty rate : 1/16 •Dot matrix : 512(16×32) •Weight : 50g(Typ.) •With a simple serial-inter face. (Ta=25℃) ITEM SYMBOL RATING Power dissipation Supply voltage(DRIVE) Supply voltage(LED) Logic input power Junction Temp. Operating Temp. Storage Temp. PD VDD VLED Vin Tj Topr Tstg 12 6 6 -0.5~VDD 115 -20~+60 -20~+65 UNIT COND. W V V V ℃ ℃ ℃ DIMENSIONS (Unit : mm) (*1) TEST AREA OPTICAL CHARACTERISTICS (Ta=25℃) ITEM Bright-ness(16×16) Dot-Balance Emisson Wavelen-ght Spectrum half-band SYMBOL GREEN RED AMBER GREEN RED AMBER GREEN RED GREEN RED CONDTION IVg IVr IVo IVR g IVRr IVR o λpg λpr △λg △λr - 1- VDD=5V VLED=5V MIN. TYP. MAX. - 80 60 565 630 25 40 2 2 2 - UNIT. cd/m2 * 1 nm nm LED Dot Matrix KLM-040MA-16B ELECTRICAL CHARACTERISTICS(VOLTAGE CURRENT CHARACTERISTICS) ITEM Supply voltage(LOGIC) Supply voltage(LED) Supply current(LOGIC) GREEN RED AMBER Supply current(LED) Logic-input vol tage LOW Logic-input vol tage HIGH (Ta=25℃) SYMBOL CONDTION MIN. TYP. MAX. UNIT. VDD VLED IDD ILEDg ILEDr ILEDo VIL VIH VDD=5V Lighting all * 2 4.75 4.50 3.5 5 5 50.0 - 5.25 5.50 70.0 1 1 1.5 1.5 - V V mA VLED=5V VDD=5V *2. VD D=5V, VLED=5V *PULL UP A V V VD D R (R=47kΩ) buffer ELECTRICAL CHARACTERISTICS (CONNECTOR SPECIFCATION) CLASSIFICATION POWER CONN. INPUT SIGNAL CONN. OUTPUT SIGNAL CONN. ASS′Y POWER SIGNAL NAME STANDARD LENGH COMPANY REMARK WAFER WAFER WAFER HARNESS HARNESS HARNESS 5267-03A 53047-1210 53047-1210 5263PBT/5264-03/AWG24 5263PBT/5264-03/AWG24 50079-8000/51021-1200/AWG26 Option Option Option molex molex molex molex molex molex Ring type Solder type - BLOCK DIAGRAM TIMING CHART RECOMMENDED TIMING CONDITION NO ITEM SYMBOL MIN. TYP. MAX. UNIT. 1 2 3 4 5 6 7 8 9 10 11 CLOCK FREQUENCY CLOCK CYCLE CLOCK-LATCH TIME LATCH PULSE WIDTH ENABLE-LATCH TIME DATA SETUPTIME DATA HOLD TIME ADDRESS-ENABLE TIME LATCH-ADDRESS TIME LATCH-ENABLE TIME ENABLE CYCLE fcl 1/fcl td(C-L) twst td(E-L) tsd thd td(A-E) td(L-A) td(L-E) toc 25 25 25 0 6 6 25 0 0 - - 40 1 MHz ns ns ns ns ns ns ns ns ns ms - 2-