5675 14-BIT, 400MSPS DIGITAL-TO-ANOALOG CONVERTER Functional Block Diagram FEATURES: DESCRIPTION: • • • • • • Maxwell Technologies 5675 is a 14-bit resolution highspeed digital to analog converter. The 5675 is designed for high-speed digital data transmission in wired and wireless communication systems. The 5675 has excelent spurios free dynamic range (SFDR) at high intermediate frequencies. 400-MSPS Update Rate LVDS-Compatable Input Interface Differential Scalable Current Outputs: 2mA to 20mA On-Chip 1.2-V Reference Single 3.3-V Supply Operation Power Dissipation: 820 mW at fCLK = 400MHz, fO = 70MHz The 5675 operates from a single-supply voltage of 3.3V. Power dissipation is 820 mW at fclk = 400 MSPS, fout = 70MHz. The 5675 provides a nominal full-scale differential current output of 20mA, supporting both singleended and differential applications. Theoutput can be directly fed to the load with no additional external output buffered required. Maxwell Technologies' patented RAD-PAK® packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, RAD-PAK® provides greater than 100 krad(Si) radiation dose tolerance. This product is available with screening up to Class S. 07.13.04 Rev 1X (858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com All data sheets are subject to change without notice 1 ©2004 Maxwell Technologies All rights reserved. 5675 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter TABLE 1. PINOUT DESCRIPTION PIN SYMBOL DESCRIPTION 19, 41, 46, 47 AGND Analog Negative Supply Voltage (Ground) 20, 42, 45, 48 AVDD Analog Positive Supply Voltage 39 BIASJ Full-scale Output Current Bias 22 CLK External Clock Input 21 CLKC Complementory External Clock Input 1, 3, 5, 7, 9, 13, 23 25, 27, 29, 31, 33, 35 D9(13:0)A LVDS Positive Input, data bits 13 through 0 D13A is most significant data bit (MSB) D0A is the least significant bit (LSB) 2, 4, 6, 8, 10, 14, 24 26, 28, 30, 32, 34, 36 D(13:0)B LVDS Positive Input, data bits 13 through 0 D13B is most significant data bit (MSB) D0B is the least significant bit (LSB) 16, 18 DGND 38 DLLOFF High = DLL Off / Low = DLL On 15, 17 DVDD Digital Positive Supply Voltage 40 EXTIO Internal reference out put or external reference input. Requires a 0.1uf decoupling capacitor to groind when used as reference output. 43 IOUT1 DAC current output. Full scale when all inputs are set to 1. Connect reference side DAC load resistors to AVDD 44 IOUT2 DAC complimentory current output. Full scale when all inputs are set to 0. Connect reference side DAC load resistors to AVDD 37 SLEEP Asynchronous hardware power down input. Active high. Internally pulldown. Digital Negative Supply Voltage (Ground) PARAMETER SYMBOL MIN MAX UNIT AVDD -0.3 3.6 V DVDD -0.3 3.6 V AVDD to DVDD -3.6 3.6 V Voltage between AGND and DGND -- -0.3 0.5 V CLK, CLKC, SLEEP -- -0.3 to DVDD DVDD to 0.3 V Digital input D[13:0]A, D[13:0]B -- -0.3 to DVDD DVDD to 0.3 V IOUT1, IOUT2 -- -1.0 to DVDD AVDD to 0.3 V EXTIO, BIASJ -- -0.3 to DVDD AVDD to 0.3 V Peak Input Current (any input) 20 mA Peak Total Input Current (any input) -30 mA 150 °C Supply Voltage Range Storage temperature range -65 07.13.04 Rev 1 All data sheets are subject to change without notice 2 ©2004 Maxwell Technologies All rights reserved. Memory TABLE 2. 5675 ABSOLUTE MAXIMUM RATINGS 1 5675 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter TABLE 2. 5675 ABSOLUTE MAXIMUM RATINGS 1 PARAMETER SYMBOL Operating Temperature range MIN MAX UNIT -55 125 °C 1. Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. TABLE 3. DELTA LIMITS PARAMETER VARIATION IAVDD ±10% of specified value in Table 5 IDVDD ±10% of specified value in Table 5 MIN PARAMETER Output Update Rate TYP DLL disable, DLLOFF=1 100 DLL enable, DLLOFF=0 MAX UNIT 100 MSPS 400 Analog Supply Voltage, AVDD 3.15 3.3 3.6 V Digital Supply Voltage, DVDD 3.15 3.3 3.6 V Input Reference Voltage, EXTIO 0.6 1.2 1.25 V 2 20 mA AVDD-1 AVDD+0.3 V 0.4 0.8 V Full-scale output currentm IO(FS) Output compliance range AVDD=3.15 to 3.45V, IO(FS)=20mA Clock Differential Input Votage, CLK-CLKC Clock Pulse Width High, tWH 1.25 nS Clock Pulse Width Low, tLH 1.25 nS Clock Duty Cycle Memory TABLE 4. 5675 RECOMMENDED OPERATING CONDITIONS 1 40 60 % 1. All unused control inputs of the device must be held at high or low ensure proper device operation. TABLE 5. 5675 DC ELECTRICAL CHARACTERISTICS (DVDD = 3.3±10%, AVDD = 3.3±10%, TA = -55 TO +125 ° C, UNLESS OTHERWISE SPECIFIED) PARAMETER TEST CONDITIONS SYMBLE Resolution SUBGROUPS MIN TYP MAX 14 UNIT Bits DC Accuracy1 Integral Nonlinearity TMIN TO TMAX INL -4 +2 4 LSB DIFFERENTIAL NONLINEARITY TMIN TO TMAX DNL -2 +1.5 2 LSB Monotonic 12-bit Level MONOTICITY 07.13.04 Rev 1 All data sheets are subject to change without notice 3 ©2004 Maxwell Technologies All rights reserved. 5675 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter TABLE 5. 5675 DC ELECTRICAL CHARACTERISTICS (DVDD = 3.3±10%, AVDD = 3.3±10%, TA = -55 TO +125 ° C, UNLESS OTHERWISE SPECIFIED) PARAMETER TEST CONDITIONS SYMBLE SUBGROUPS MIN TYP MAX UNIT ANALOG OUTPUT OFFSET ERROR GAIN ERROR 0.02 %FSR Without Internal Reference -10 10 %FSR With Internal Reference -10 10 %FSR OUTPUT RESISTANCE 300 K OUTPUT CAPACITANCE 5 pf REFERENCE OUTPUT REFERENCE VOLTAGE EXTIO 1.17 REFERENCE OUTPUT CURRENT2 1.23 1.29 V 100 nA 1 M SMALL SIGNAL BANDWIDTH 1.4 MHz INPUT CAPACITANCE 100 pf 0 ppm of FSR/° C +50 ppm of FSR/° C VEXTIO +50 ppm of FSR/° C ANALOG SUPPLY CURRENT3 IAVDD 175 mA DIGITAL SUPPLY CURREN3T IDVDD 100 mA IAVDD 45 mA REFERENCE INPUT INPUT RESISTANCE Memory TEMPERATURE COEFFICIENTS OFFSET DRIFT GAIN DRIFT Without Internal Reference REFERENCE VOLTAGE DRIFT POWER SUPPLY ANALOG SUPPLY CURRENT4 Sleep Mode POWER DISSIPATION AVdd = 3.3V, DVdd = 3.3V ANALOG AND DIGITAL POWER AVdd = 3.15 to 3.45V SUPPLY REJECTION RATIO PD APSRR -0.5 0.5 DPSRR -0.5 0.5 %FSm WR/V LVDS INTERFACE: NODE D[13:0]A; D[13:0]B POSITIVE-GOING DIFFERENTIAL INPUT VOLTAGE THRESHOLD NEGATIVE-GOING DIFFERENTIAL See LVDS min/max threshold voltage table VITH+ 100 VITH- -100 mV INPUT VOLTAGE THRESHOLD INTERNAL TERMINATION IMPEDANCE ZT INPUT CAPACITANCE CI 90 132 2 Ohms pF CMOS INTERFACE: NODE SLEEP 07.13.04 Rev 1 All data sheets are subject to change without notice 4 ©2004 Maxwell Technologies All rights reserved. 5675 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter TABLE 5. 5675 DC ELECTRICAL CHARACTERISTICS (DVDD = 3.3±10%, AVDD = 3.3±10%, TA = -55 TO +125 ° C, UNLESS OTHERWISE SPECIFIED) PARAMETER TEST CONDITIONS SYMBLE HIGH-LEVEL INPUT VOLTAGE VIH LOW-LEVEL INPUT VOLTAGE VIL HIGH-LEVEL INPUT CURRENT IIH LOW-LEVEL INPUT CURRENT IIL SUBGROUPS MIN TYP 2 3.3 0 MAX UNIT V 0.8 V -10 10 uA -10 10 uA INPUT CAPACITANCE 2 pF CLOCK INTERFACE: NODE CLK, CLCKC INPUT RESISTANCE node CLK, CLKC 670 Ohms INPUT CAPACITANCE node CLK, CLKC 2 pF INPUT RESISTANCE Differential 1.3 Kohms INPUT CAPACITANCE Differential 1 pF TIMING tSU 1.5 nS INPUT HOLD TIME th 0.25 nS TLPH 2 nS 1 clk INPUT LATCH PULSE HIGH TIME TDD DIGITAL DELAY TIME 1. Measured Differential at IOUT1 and IOUT2. 2.5Ohms to AVDD Memory INPUT SETUP TIME 2. Use an external buffer amplifier with high impedance input drive to drive any external load. 3. Measured at fCLK = 400 MSPS and FOUT = 70 MHz 4. Measured for 50 Ohms Rl at IOUT1 and IOUT2, fCLK = 400 MSPS and fOUT = 70MHz 07.13.04 Rev 1 All data sheets are subject to change without notice 5 ©2004 Maxwell Technologies All rights reserved. 5675 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter TABLE 6. 5675 AC ELECTRICAL CHARACTERISTICS (DVDD = 3.3±10%, AVDD = 3.3±10%, TA = -55 TO +125 ° C, UNLESS OTHERWISE SPECIFIED) PARAMETER TEST CONDITIONS SYMBOL VCC = 3.3V ± 0.3 SUBGROUPS MIN TYP UNIT MAX ANALOG OUTPUT OUTPUT SETTLING TIME MID-SCALE TRANSITION (CODE 8191-8192) OUTPUT PROPAGATION DELAY OUTPUT RISE TIME 10% TO 90% 9, 10, 11 5 nS TPD 9, 10, 11 1 nS TR(IOUT) 9, 10, 11 2 nS 9, 10, 11 2 nS 9, 10, 11 55 pA/ 2^Hz 30 pA/ 2^Hz 72 dBc OUTPUT FALL TIME 90% TO 10% OUTPUT NOISE IOUTFS = 20MA IOUTFS = 2MA Memory TS (DAC) AC LINEARITY TOTAL HARMONIC DISTORTION SPURIOUS FREE DYNAMIC RANGE TO NYQUIST tCLK = 100 MSPS, fOUT=20MHz, TA = 25C THD tCLK = 160 MSPS, fOUT=41MHz, TA = 25C 67 tCLK = 200 MSPS, fOUT=70MHz, TA = 25C 63 tCLK = 400 MSPS, fOUT=20 MHz, TMIN to TMAX 72 tCLK = 400 MSPS, fOUT=70MHz, TA = 25C 64 tCLK = 400 MSPS, fOUT=140MHz, TA = 25C 58 tCLK = 100 MSPS, fOUT=20MHz, TA = 25C SFDR 77 tCLK = 160 MSPS, fOUT=41MHz, TA = 25C 70 tCLK = 200 MSPS, fOUT=701MHz, TA = 25C 70 tCLK = 400 MSPS, fOUT=20 MHz, TMIN to TMAX 73 tCLK = 400 MSPS, fOUT=70MHz, TA = 25C 69 tCLK = 400 MSPS, fOUT=140MHz, TA = 25C 58 07.13.04 Rev 1 dBc All data sheets are subject to change without notice 6 ©2004 Maxwell Technologies All rights reserved. 5675 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter TABLE 6. 5675 AC ELECTRICAL CHARACTERISTICS (DVDD = 3.3±10%, AVDD = 3.3±10%, TA = -55 TO +125 ° C, UNLESS OTHERWISE SPECIFIED) PARAMETER TEST CONDITIONS SYMBOL VCC = 3.3V ± 0.3 SUBGROUPS MIN SPURIOUS FREE DYNAMIC RANGE WITHIN A WINDOW, 5-MHZ SPAN TWO-TONE INTERMODULATION TO NYQUIST (EACH TONE AT -6 DBFS) SFDR 88 tCLK = 160 MSPS, fOUT=41MHz, TA = 25C 83 tCLK = 200 MSPS, fOUT=701MHz, TA = 25C 80 tCLK = 400 MSPS, fOUT=20 MHz, TMIN to TMAX 88 tCLK = 400 MSPS, fOUT=70MHz, TA = 25C 80 tCLK = 400 MSPS, fOUT=140MHz, TA = 25C 73 fCLK=122.8 MSPS, IF=30.72 MHz, TA=25C ACPR 73 fCLK=245.76 MSPS, IF=61.44 MHz, TA=25C 71 fCLK=399.32 MSPS, IF=153.36 MHz, TA=25C 68 fCLK=400MHx, fOUT1=70MHz, fOUT2=141MHz, Ta=25C IMD 67 fCLK=400MHx, fOUT1=140MHz, fOUT2=141MHz, Ta=25C 63 FOUR-TONE INTERMODULATION, 15MHZ fCLK=400MHx, fOUT1=70MHz, SPAN, MISSING CENTER TONE fOUT2=141MHz, Ta=25C (EACH TONE AT -6 DBFS) 72 fCLK=400MHx, fOUT1=140MHz, fOUT2=141MHz, Ta=25C 74 07.13.04 Rev 1 UNIT MAX dBc Memory ADJACENT CHANNEL POWER RATIO WCDMA WITH 3.84 MHZ BW, 5MHZ CHANNEL SPACING tCLK = 100 MSPS, fOUT=20MHz, TA = 25C TYP dB dBc All data sheets are subject to change without notice 7 ©2004 Maxwell Technologies All rights reserved. 5675 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter TABLE 7. LVDS INPUT THRESHOLDS AND LOGICAL BIT EQUIVALENT RESULTING RESULTING DIFFERENTIAL COMMON-MODE INPUT VOLTAGE INPUT VOLTAGE APPIED VOLTAGE LOGICAL BIT BINARY EQUIVALENT VB [V] VA,B [MV] VCOM [V] 1.25 1.15 200 1.2 1 1.15 1.25 -200 1.2 0 2.4 2.3 200 1.35 1 2.3 2.4 -200 2.35 0 0.1 0 200 0.05 1 0 0.1 -200 0.05 0 1.5 0.9 600 1.2 1 0.9 1.5 -600 1.2 0 2.4 1.8 600 2.1 1 1.8 2.4 -600 2.1 0 0.6 0 600 0.3 1 0 0.6 -600 0.3 0 07.13.04 Rev 1 Operation with minimum differential voltage(+/-200mV) applied to the complimentory inputs versus common mode range Operation with minimum differential voltage(+/-600mV) applied to the complimentory inputs versus common mode range Memory VA [V] COMMENT All data sheets are subject to change without notice 8 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter 5675 Memory 07.13.04 Rev 1 All data sheets are subject to change without notice 9 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter 5675 Memory 07.13.04 Rev 1 All data sheets are subject to change without notice 10 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter 5675 Memory 07.13.04 Rev 1 All data sheets are subject to change without notice 11 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter 5675 Memory 07.13.04 Rev 1 All data sheets are subject to change without notice 12 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter 5675 Memory Applications Schematic 07.13.04 Rev 1 All data sheets are subject to change without notice 13 ©2004 Maxwell Technologies All rights reserved. 5675 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter Memory 48 PIN RAD-PAK® QUAD FLAT PACKAGE DIMENSION SYMBOL CENTER LINE MIN NOM MAX A -- .121 .135 .149 b -- .008 .010 .012 c -- .006 .008 .010 D PKG/leads .645 .650 .655 D1 PKG/leads .270 .275 .280 e -- -- .025 -- L Frame L1 Frame 1.585 1.605 1.625 L2 Frame .945 .956 .965 A1 -- -- .108 -- z -- -- .0125 -- N -- 1.645 48 Note: All dimensions in inches 07.13.04 Rev 1 All data sheets are subject to change without notice 14 ©2004 Maxwell Technologies All rights reserved. 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter 5675 Important Notice: These data sheets are created using the chip manufacturer’s published specifications. Maxwell Technologies verifies functionality by testing key parameters either by 100% testing, sample testing or characterization. The specifications presented within these data sheets represent the latest and most accurate information available to date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no responsibility for the use of this information. Maxwell Technologies’ products are not authorized for use as critical components in life support devices or systems without express written approval from Maxwell Technologies. Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies’ liability shall be limited to replacement of defective parts. Memory 07.13.04 Rev 1 All data sheets are subject to change without notice 15 ©2004 Maxwell Technologies All rights reserved. 5675 14-BIT, 400MSPS DIGITAL-TO-ANALOG Converter Product Ordering Options Model Number 5675 RP Q X Option Details Feature Monolithic S = Maxwell Class S B = Maxwell Class B I = Industrial (testing @ -55°C, +25°C, +125°C) E = Engineering (testing @ +25°C) Package Q = Quad Flat Pack Radiation Feature RP = RAD-PAK® package Base Product Nomenclature Digital-Analog Converter 14-Bit, 400 MSPS 07.13.04 Rev 1 All data sheets are subject to change without notice Memory Screening Flow 16 ©2004 Maxwell Technologies All rights reserved.