NTE7108 Integrated Circuit 1.3GHz Phase Locked Loop w/I2C Bus Description: The NTE7108 is an integrated circuit in an 18–Lead DIP type package and when used in combination with a VCO (tuner), comprises a digital programmable phase–locked loop (PLL) for television devices designed to use the PLL frequency synthesis tuning principle. The PLL provides a crystal–stable frequency for tuner oscillators between 16 ∼ 1300MHz in the 62.5kHz raster. By including an external prescaler 1/2, the component can also be used for synthesizing applications of up to 2.4GHz (e.g. satellite receivers). As a result, the resolution is doubled to 125kHz. The tuning process is controlled via an I2C bus by the microprocessor. Features: D Low Current Consumption D Message Transmission Via I2C Bus D 4 Software–Controlled Outputs D Cost–Effective and Space–Saving Design D Prescaler Output Frequency is Free from Interference Radiation Absolute Maximum Ratings: (Note 1) Supply Voltage, VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 6V Output PD, V1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to VS Crystal Q1, V2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to VS Crystal Q2, V3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to VS Bus Input/Output SDA, V4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to VS Bus Input SCL, V5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to VS Port Output P7, V6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +16V Port Output P6, V7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +16V Port Output P5, V8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +16V Port Output P4, V9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +16V Port Output P3, V10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +16V Port Output P2, V11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +16V Port Output P1, V12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +16V Port Output P0, V13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +16V Signal Input UHF/VHF, V15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +2.5V Reference Input REF, V16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +2.5V Output Active Filter VD, V18 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to VS Bus Output SDA (Open Collector), I4L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1mA to +5mA Port Output P7 (Open Collector), I6L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1mA to +5mA Note 1. Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings (Cont’d): (Note 1) Port Output P6 (Open Collector), I7L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1mA to +5mA Port Output P5 (Open Collector), I8L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1mA to +5mA Port Output P4 (Open Collector), I9L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1mA to +5mA Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C Storage Temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +125°C Thermal Resistance, System to Ambient, RΘSA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80K/W Note 1. Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Operating Range: Supply Voltage, VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V Ambient Temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0° to +85°C Input Frequency, I15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16MHz to 1300MHz Crystal Frequency, I2, 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4MHz Divider Factor, N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 256 to 32767 Electrical Characteristics: (VS = 5V, TA = +25°C unless otherwise specified) Parameter Symbol Min Typ Max Unit IS 35 55 75 mA Crystal Frequency Series Capacitance 18pF f2, 3* – – 4 MHz Input Sensitivity UHF/VHF a15 f15 = 80 to 500MHz –27/10 – 3/315 dBm/* f15 = 500 to 1000MHz –24/14 – 3/315 dBm/* f15 = 1200MHz –15/40 – 3/315 dBm/* – – 10 µA Current Consumption Band Selection Outputs P0 – P3 (Current Sinks Leakage Current Sink Current Port Outputs P4 – P7 (Switch w/Open Test Conditions w/Internal Resistance Ri = 12kΩ) I13H V13H = 13.5V I13L V13H = 12V 0.7 1.0 1.5 mA Collector) Leakage Current I9H V9H = 13.5V – – 10 µA Residual Voltage V9L I9L = 1.7mA – – 0.3 V I1H 5 I = High, V1 = 2V ±90 ±220 ±300 µA 5 I = Low, V1 = 2V ±22 ±50 ±75 µA 1.5 – 2.5 V 500 – – µA – – 100 mV V5H 3.0 – 5.5 V V5L – – 1.5 V V5H = VS – – 50 µA V5L = 0V – – –100 µA Phase Detector Output PD (VS = 5V) Charge Pump Current Output Voltage Locked VIL Active Filter Output VD (Test Modus T0 = 1, PD = Tristate) Output Current I1B V18 = 0.8V, I14 = 90µA Output Voltage V18 V1L = 0V Bus Inputs SCL, SDA Input Voltage Input Current * Listed as mVrms with 50Ω. I5L Electrical Characteristics (Cont’d): (VS = 5V, TA = +25°C unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Output SDA (Open Collector) Output Voltage V4H I4H = 5.5mA – – 12 V V4L I4L = 2mA – – 0.4 V Edges SCL, SDA Rise Time tR – – 15 µs Fall Time tF – – 15 µs f5 0 – 100 kHz t5 HIGH 4 – – µs t5 LOW 4 – – µs Set–Up Time tSUSTA 4 – – µs Hold Time tHDSTA 4 – – µs tSUSTO 4 – – µs tBUF 4 – – µs Set–Up Time tSUDAT 0.3 – – µs Hold Time tHDDAT 0 – – µs Shift Register Clock Pulse SCL Frequency Pulse Width Start Stop Set–Up Time Bus Free Time Data Transfer Pin Connection Diagram PD 1 18 VD Q1 2 17 GND Q2 3 16 REF SDA 4 15 UHF/VHF SCL 5 14 VS P7 6 13 P0 P6 7 12 P1 P5 8 11 P2 P4 9 10 P3 18 10 1 9 .250 (6.35) .870 (22.1) Max .150 (3.8) .100 (2.54) .800 (20.3) .125 (3.17) Min