RM7065A 64-Bit MIPS RISC Microprocessor with Integrated L2 Cache FEATURES Supports two outstanding reads with out-of-order return High-performance floating-point unit • 800 MFLOPS maximum • IEEE754 compliant single and double precision floating-point operations 64-bit MIPS instruction set architecture • Data PREFETCH instruction allows the processor to overlap cache miss latency and instruction execution • Single-cycle floating-point multiplyadd Integrated memory management unit • Fully associative TLB • 64/48 dual entries map 128/96 pages • Variable page size Embedded application enhancements • Specialized DSP integer MultiplyAccumulate instructions (MAD/MADU), and three-operand Multiply instruction (MUL) • I and D Test/Break-point (Watch) registers for emulation and debug • • Dual-issue symmetric superscalar microprocessor • 400 MHz max CPU frequency • 300 MHz max CPU frequency at Itemp (-40-85 C) • Capable of issuing two instructions per clock cycle • Integrated primary and secondary caches • 16KB instruction, 16KB Data, and 256KB on-chip secondary • All are 4-way set associative with 32-byte line size • Per-line locking in primary and secondary caches • Fast Packet Cache™ increases system efficiency in networking applications • High-performance system interface • 1000 Mbyte per-second peak throughput • 125 MHz maximum frequency multiplexed address/data bus (SysAD) • • • • • • Performance counter for system and software tuning and debug Fourteen fully prioritized vectored interrupts-10 external, 2 internal, 2 software PACKAGING • Fully Static 0.18µ CMOS design with dynamic power down logic • 256 pin TBGA package, 27x27 mm DEVELOPMENT TOOLS • Operating Systems: • Linux by MontaVista and Red Hat • VxWorks by Wind River Systems • Nucleus by Accelerated Technology • Neutrino by QNX Software Systems • Compiler Suites • Algorithmics • Green Hills Software • Red Hat BLOCK DIAGRAM 64-bit Integer Unit System Control 64-bit FP Unit Dual-Issue Superscalar PC Unit Double/Single IEEE754 Integer Multiplier Instr. Dispatch I-Cache MMU 16KB, 4-way, lockable Fully Assoc., 48 or 64 Entry D-Cache 16KB, 4-way, lockable System Cache (L2) Bus Interface Unit Int Ctlr 256KB, 4-way, lockable 64-bit SysA /D Bus PMC- 2011599 (R2) NMI, INT9 – INT0 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE © Copyright PMC-Sierra, Inc. 2001 RM7065A 64-Bit MIPS RISC Microprocessor with Integrated L2 Cache • Evaluation Boards and Companion Chips • Galileo Technology • EV-64120A-7000: 32/64-bit, 33/66MHz PCI • EV-64240-7000: 32/64-bit, 33/66MHz PCI • Momentum Computer • Ocelot: 6U RM7000 Compact PCI Single Board Computer • • • • • • • • • • Logic Analyzers and Emulation • HP • Tektronix • Corelis • Crescent Heart Software APPLICATIONS • Voice Gateways • Multi-Service Access Platforms DSLAMs/Access Concentrators Remote Access Switches Web Switches Layer 3 Switches Backbone Switches/Routers RAIDs Set Top Boxes Networked Printers Cellular Base Stations TYPICAL APPLICATION RM7065A 64-Bit 100MHz Marvell/Galileo 64-Bit 100MHz GT-64120A 64bit PCI Bus 32/64-bit @ 33MHz 64bit 32bit PCI-to-PCI Bridge Ethernet MAC SDRAM 32bit Data Buffer 8-bit Boot-Flash Ethernet MAC Flash Disk Watchdog, I2C & Control Registers Dual UART Head Office: PMC-Sierra, Inc. 8555 Baxter Place Burnaby, B.C. V5A 4V7 Canada Tel: 604.415.6000 Fax: 604.415.6200 To order documentation, send email to: [email protected] or contact the head office, Attn: Document Coordinator All product documentation is available on our web site at: http://www.pmc-sierra.com For corporate information, send email to: [email protected] PMC- 2011599 (R2) © Copyright PMC-Sierra, Inc. 2001. All rights reserved. RM7065A is a trademark of PMC-Sierra Inc. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE