Dot Matrix LED Unit for Indoor Use LT1560ED(Chip Type) ■ Features ¡No. of dots : 16✕32dots ¡Outline dimensions : 96✕192mm ¡Dot size : 3.0✕3.0mm ¡Dot pitch : 6.0mm ¡Radiation color : Yellow-green+Red (dichromatic type) LT1560ED ¡Driving method : 1/16 duty dynamic drive ■ Absolute Maximum Ratings Symbol VCC VLED VI tON Topr Tstg P Parameter Supply voltage for IC Supply voltage for LED Input voltage*1 Turn-on time Operating temperature Storage temperature Power dissipation *1 VI<Vcc at Vcc≤5 ■ Optical Characteristics Parameter Symbol Red Luminance Yellow-green Viewing angle Red Peak emission wavelength Yellow-green LV 2θ1/2 λp (Ta=25˚C) Rating -0.3 to +5.5 -0.3 to +4.5 -0.3 to VCC+0.3 1 -10 to +60 -20 to +70 26 (VCC=5V,VLED=4V,Ta=25˚C) Parameter Supply voltage for IC Supply voltage for LED IC current dissipation*1 LED current dissipation*1 (VCC=5V,VLED=4V,Ta=25˚C) TYP 100 100 120 635 565 ■ Electrical Characteristics Symbol MIN. TYP. MAX. Unit V 5.25 5.0 VCC 4.75 V 4.25 4.0 3.75 VLED -----mA 200 150 ICC -----A 5.5 4.5 ILED ----------V 3.5 VIH Input voltage ----------V 1.5 VIL µA ----------0.1 IIH Input current ----------0.12 mA IIL ----------10 MHZ fCLK Clock frequency 250 1000 70 Frame frequency fFR HZ *1 Under the condition that dichromatic all dots are lit. Unit V V V ms ˚C ˚C W Unit ■ Timing Chart cd/m 2 tsu t WCLK th CLOCK ˚ R &G DATA nm VD(n+1)th line's data R &G DATA(OUT) t WL VD(n+2)th line's data td(L-C) td(C-L) t dD LATCH ■ Terminal Functions LATCH ADDRESS (A0 to A3) VD(n) Clock signal for data transmission in the shift-register. (L→H: serial data is shifted.) Ground for signal Buffered input signal Input signal generated through 32-bit shift register RDATA or buffer Input signal generated through 32-bit shift register Output signal GDATA or buffer (CN3) LATCH Buffered input signal ENABLE Buffered input signal Buffered input signal CLOCK Ground for signal GND Each signal is used as input signal for next unit. * As for the terminal number, refer to the outline dimensions. GND A0 to A3 OFF VD(n+1) td(L-A) td(E-A) td(A-E) ■ Block Diagram Input/output circuit 331 473 HC367 ENABLE Controls ON/OFF of LED (H: LED OFF) CLOCK (Notice) ENABLE OUT IN A0 A1 A2 A3 RDATA GDATA LATCH ENABLE CLOCK A0 A1 A2 A3 RDATA GDATA LATCH ENABLE CLOCK 4 TO 16 DECODER Pch FET DRIVER 32BIT SHIFT-REGISTER, LATCH, DRIVER AND LUMINANCE ADJUSTMENT CIRCUIT Input signal (CN2) Function Supply voltage for LED (+5V) Supply voltage for IC (+4V) Ground Address specification signal for row driver Serial data input for red (H=ON, L=OFF) Serial data input for yellow-green (H=ON, L=OFF) Latch signal of display data. H: Serial data is converted to parallel data. L: Contents are latched. VD(n+1)data ON 1/f ENA OFF 16✕16DOT ✕2 DICHROMATIC LED MATRIX 32BIT SHIFT-REGISTER, LATCH, DRIVER AND LUMINANCE ADJUSTMENT CIRCUIT Connector Symbol Power VLED supply VCC (CN1) GND A0 to A3 RDATA GDATA t WENA VD(n)data ON ¡In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device. 162 (Internet) ¡Data for sharp's optoelectronic/power device is provided for internet.(Address http://www.sharp.co.jp/ecg/) Dot Matrix LED Unit Outline Dimensions(Unit:mm) 512-❏3 chip LED 5 192 +0 -0.5 8.2 6 HD0 27.4 ±0.3 95.7 ±0.3 P6.0✕15=90 3 256-ø5 V D31 3 +0 -0.15 Data shift direction 95.7±0.3 HD15 V D0 P6.0✕15=90 96 +0 -0.5 H D0 Data shift direction H D15 VD0 76 (76) (15) 20 VD15 76 (76) Pin connection CN1(Power supply) 93 CN1(Power supply) Pin No. 1 2 3 4 5 6 7 CN2(Input signal) Pin No. 1 2 3 4 5 6 7 8 9 10 Name VLED VLED VLED VCC GND GND GND CN3(Output signal) Name A0 A1 A2 A3 RDATA GDATA LATCH ENABLE CLOCK GND Pin No. 1 2 3 4 5 6 7 8 9 10 4-M3(Screw depth 6) Name A0 A1 A2 A3 RDATA GDATA LATCH ENABLE CLOCK GND LT1560ED CN2(Input signal) 1 26 1 4 VOL.2 18 24 14 VLED Vcc GND1 GND2 Name Pin No. CN1 8-M3 Insert nut (Effective screw depth 4) Pin connection 1 2 3 4 3.96✕3=11.8 1 CN3 CN2 10 VOL.1 93 40 ±0.1 33 25 1 (10) CN1 CN2 7 10 IN (20) (10) (10) VR1 Name Pin No. 16.5 2.5✕9=22.5 VR2 OUT10 84 43.5 ±0.1 40 1 40 ±0.1 33 25 CN3 43.5 ±0.1 40 9 1 2 3 4 5 6 7 8 9 10 A0 A1 A2 A3 RDATA GDATA LATCH ENABLE CLOCK GND1 CN3(Output signal) Pin No. 1 2 3 4 5 6 7 8 9 10 Name A0 A1 A2 A3 RDATA GDATA LATCH ENABLE CLOCK GND1 LT1451ED 576-❏3 chip LED 7 96+0 -0.5 8 8.2 95.7±3 HD0 (256-ø5.0) (P6.0✕1590.0) HD16 Data shift direction Data shift direction 95.7±0.3 P6.0✕15=90.0) 96+0 -0.5 HD0 HD15 HD23 VD0 VD23 HD31 VD0 VD15 12.3 Data shift direction 13.5 76±0.25 (28) (28) (10) (5) 15.0 Pin connection 1 VR1 1 1 CN2(Input signal) 4-M3 Insert nut (Effective screw depth 4) Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 VLED VCC GND1 GND2 CN2(Input signal) CN3(Output signal) Pin No. Name A0 1 2 A1 3 A2 4 A3 5 A4 6 RDATA 7 GDATA 8 LATCH 9 ENABLE 10 CLOCK 11 GND 12 GND 1 2 3 4 Name A0 A1 A2 A3 A4 RDATA GDATA LATCH ENABLE CLOCK GND GND CN3 10 CN2 10 1 1 4 1 CN1 VR1 VR2 (2.5✕9=22.5) CN1 CN2 IN 12 Name VLED VLED VLED VCC GND GND GND 95.5 78.0 (17.0) 3.96✕3=11.88) Pin No. 1 2 3 4 5 6 7 VR2 7 LT1525ED 4-M3(Depth6MIN) CN1(Power supply) 12 CN3 OUT (10) 84±0.25 (22) (10) (10) Pin connection CN1(Power supply) 95.5 78.0 (5.0) (4.0) 1 2 3 4 5 6 7 8 9 10 A0 A1 A2 RENABLE RDATA GDATA LATCH GENABLE CLOCK GND1 CN3(Output signal) 1 2 3 4 5 6 7 8 9 10 A0 A1 A2 RENABLE RDATA GDATA LATCH GENABLE CLOCK GND1 (26.0) LT1455M/LT1456M ¡In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP devices shown in catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device. (Internet) ¡Data for sharp's optoelectronic/power device is provided for internet.(Address http://www.sharp.co.jp/ecg/) (Notice) 177