ASAHI KASEI [AKD4645A-A] AKD4645A-A Evaluation board Rev.1 for AK4645A GENERAL DESCRIPTION AKD4645A is an evaluation board for the AK4645A, stereo CODEC with built-in MIC/HP amplifier. The AKD4645A can evaluate A/D converter and D/A converter separately in addition to loopback mode (A/D → D/A). The AKD4645A also has the digital audio interface and can achieve the interface with digital audio systems via opt-connector. Ordering guide AKD4645A --- Evaluation board for AK4645A (Cable for connecting with printer port of IBM-AT,compatible PC and control software are packed with this. This control software does not support Windows NT.) FUNCTION • DIT/DIR with optical input/output • BNC connector for an external clock input • 10pin Header for serial control mode REG AVDD DVDD TVDD HVDD GND 5V PORT4 T1 3.3V Control Data MIC 10pin Header MIN PORT3 LIN DSP RIN AK4645A 10pin Header PORT1 HP Opt In AK4114 LINE OUT Opt out PORT2 Clock Gen 3.3V 3.3V LVC_VDD VD_VDD Figure 1. AKD4645A Block Diagram * Circuit diagram and PCB layout are attached at the end of this manual < KM094901> 2009/10 -1- ASAHI KASEI [AKD4645A-A] Board Outline Chart Outline Chart DGND VD_IN TVDD LVC_IN DVDD AVDD AGND REG PORT4 CTRL J9 LIN1/RIN1 H H L L J3 LIN AK4645A SW2 DIR J5 RIN SW1 PDN J7 MIN MCLK BICK LRCK SDTI VCC J6 LOUT HVDD J4 HPR J1 HPL J8 ROUT J2 HP/LINE Figure 2. AKD4645A Outline Chart < KM094901> 2009/10 -2- ASAHI KASEI [AKD4645A-A] Operation sequence 1) Set up the power supply lines. [AVDD] (orange) = 2.6 ∼ 3.6V : for AVDD of AK4645A (typ. 3.3V) [HVDD] (orange) = 2.6 ∼ 5.25V : for HVDD of AK4645A (typ. 3.3/5.0V) [DVDD] (orange) = 2.6 ∼ 3.6V : for DVDD of AK4645A (typ. 3.3V:=AVDD±0.3V) [TVDD] (orange) = 1.6 ∼ 3.6V : for TVDD of AK4645A (typ. 3.3V:≤DVDD) [LVC_IN] (orange) = 1.6 ∼ 3.6V : for logic (typ. 3.3V:=TVDD) [VD_IN] (orange) = 2.7 ∼ 3.6V : for AK4114 and logic (typ. 3.3V) [REG] (red) = 5.0V : for regulator (typ. 5.0V) [AGND] (black) = 0V : for analog ground [DGND] (black) = 0V : for logic ground Each supply line should be distributed from the power supply unit. 2) Set up the evaluation mode, jumper pins and DIP switches. (See the followings.) 3) Power on. The AK4645A and AK4114 should be reset once bringing SW1 and SW2 “L” upon power-up. Evaluation mode (1) External Slave Mode In case of AK4645A evaluation using AK4114, it is necessary to correspond to audio interface format for AK4645A and AK4114. About AK4645A’s audio interface format, refer to datasheet of AK4645A. About AK4114’s audio interface format, refer to Table 1 in this manual. (1-1) Evaluation of Recording block (MIC, ADC) using DIT of AK4114 <default> (1-2) Evaluation of Playback block (HP, LINEOUT) using DIR of AK4114 (1-3) Evaluation of Loop-back using AK4114 (1-4) All interface signals including master clock are fed externally. (1-1) Evaluation of Recording block (MIC, ADC) using DIT of AK4114 <default> PORT2 (DIT) and X1 (X’tal) are used. DIT generates audio bi-phase signal from received data and which is output through optical connector (TOTX141). Nothing should be connected to PORT1 (DIR) and PORT3 (DSP) and J11 (EXT). The jumper pins should be set to the following. JP name JP25(EXT) JP26(4114_MCKI_IN) JP27(4114BICK_SEL) JP28(4114LRCK_SEL) JP24 MCLK JP21 BICK State Short Open Open Open JP name JP32(BICK_SEL) JP33(LRCK_SEL) JP35(LRCK_MODE) JP36(BICK_MODE) JP30 SDTI JP29 LRCK JP19 PHASE State Short Short Open Open JP20 PHASE DIR EXT DIR 4040 DIR 4040 DIR 4040 THR INV THR INV When AK4114 is used, JP22 (MKFS) and JP23 (BCFS) are not used. Therefore, JP22 (MKFS) should be set to “x1” and JP23 (BCFS) should be set to “64fs”. * The AK4114 operates at fs of 32kHz or more. If the fs is slower than 32kHz, this evaluation mode can’t be used. < KM094901> 2009/10 -3- ASAHI KASEI [AKD4645A-A] (1-2) Evaluation of Playback block (HP, LINEOUT) using DIR of AK4114 PORT1 (DIR) is used. Nothing should be connected to PORT2 (DIT), PORT3 (DSP) and J11 (EXT). The jumper pins should be set to the following. JP name JP25(EXT) JP26(4114_MCKI_IN) JP27(4114BICK_SEL) JP28(4114LRCK_SEL) JP24 MCLK JP21 BICK State Short Open Open Open JP name JP32(BICK_SEL) JP33(LRCK_SEL) JP35(LRCK_MODE) JP36(BICK_MODE) JP29 LRCK JP30 SDTI State Short Short Open Open JP19 PHASE JP20 PHASE DIR EXT DIR 4040 DIR 4040 DIR 4040 THR INV THR INV When AK4114 is used, JP22 (MKFS) and JP23 (BCFS) are not used. Therefore, JP22 (MKFS) should be set to “x1” and JP23 (BCFS) should be set to “64fs”. * The AK4114 operates at fs of 32kHz or more. If the fs is slower than 32kHz, this evaluation mode can’t be used. (1-3) Evaluation of Loop-back using AK4114 X’tal oscillator (X1) is used. Nothing should be connected to PORT1 (DIR), PORT3 (DSP) and J11 (EXT). The jumper pins should be set to the following. JP name JP25(EXT) JP26(4114_MCKI_IN) JP27(4114BICK_SEL) JP28(4114LRCK_SEL) JP24 MCLK JP21 BICK State Short Open Open Open JP name JP32(BICK_SEL) JP33(LRCK_SEL) JP35(LRCK_MODE) JP36(BICK_MODE) JP29 LRCK JP30 SDTI State Short Short Open Open JP19 PHASE JP20 PHASE DIR EXT DIR 4040 DIR 4040 DIR 4040 THR INV THR INV When AK4114 is used, JP22 (MKFS) and JP23 (BCFS) are not used. Therefore, JP22 (MKFS) should be set to “x1” and JP23 (BCFS) should be set to “64fs”. * The AK4114 operates at fs of 32kHz or more. If the fs is slower than 32kHz, this evaluation mode can’t be used. < KM094901> 2009/10 -4- ASAHI KASEI [AKD4645A-A] (1-4) All interface signals including master clock are fed externally. PORT3 (ROM) is used. Nothing should be connected to PORT1 (DIR), PORT2 (DIT), and J11 (EXT). The jumper pins should be set to the following. Please set SW2=“L” JP name JP25(EXT) JP26(4114_MCKI_IN) JP27(4114BICK_SEL) JP28(4114LRCK_SEL) JP21 BICK JP24 MCLK DIR EXT DIR 4040 State Short Open Open Open JP name JP32(BICK_SEL) JP33(LRCK_SEL) JP35(LRCK_MODE) JP36(BICK_MODE) JP30 SDTI JP29 LRCK DIR 4040 DIR State Short Short Open Open JP19 PHASE 4040 THR INV JP20 PHASE THR INV When AK4114 is used, JP22 (MKFS) and JP23 (BCFS) are not used. Therefore, JP22 (MKFS) should be set to “x1” and JP23 (BCFS) should be set to “64fs”. JP20 (PHASE) is jumper which decides polarity of BICK, “THR” or “INV” should be selected according to the audio interface format. DIP Switch set up [S1] : Mode Setting of AK4114 and AK4645A ON is “H”, OFF is “L”. No. 1 2 3 Name DIF0 DIF1 DIF2 ON (“H”) OFF (“L”) 4 OCKS1 AK4114 Master Clock Setting See Table 3 OFF 5 6 CAD0 I2C See Table 4 OFF OFF AK4114 Audio Format Setting See Table 2 default OFF OFF ON Table 1. Mode Setting for AK4645A and AK4114 DIF2 DIF1 DIF0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 AK4114DAUX 24bit, Left justified 24bit, Left justified 24bit, Left justified 24bit, Left justified 24bit, Left justified 24bit, I2S 24bit, Left justified 24bit, I2S AK4114SDTO 16bit, Right justified 18bit, Right justified 20bit, Right justified 24bit, Right justified 24bit, Left justified 24bit, I2S 24bit, Left justified 24bit, I2S LRCK I/O H/L O H/L O H/L O H/L O H/L O L/H O H/L I L/H I BICK 64fs 64fs 64fs 64fs 64fs 64fs 64-128fs 64-128fs I/O O O O O O O I I <default> Table 2. Setting for AK4114 Audio Interface Format < KM094901> 2009/10 -5- ASAHI KASEI [AKD4645A-A] OCKS1 0 1 X’tal 256fs 512fs <default> Table 3. AK4114 Master Clock Setting Other jumper pins set up [JP1] (GND) : Analog ground and Digital ground OPEN : Separated. SHORT : Common. (The connector “DGND” can be open.) <default> [JP2] : Selection of MIN path or LIN3 path MIN : MIN path (AIN3 bit=“0” : Register Address 21H) LIN3 : LIN3 path (AIN3 bit=“1” : Register Address 21H) [JP5, 4] : Selection of using MIC-power supply for L/RIN1 path SHORT : MIC-power is supplied. OPEN : MIC-power is not supplied. <default> [JP3,6,7,8] : power AVDD,DVDD,HVDD,TVDD short : for regulator (typ. 5.0V)<default> open : Separated. [JP11] (HPL) : Analog Output BNC: Output from J1. <default> HP: Output from J2. [JP12] (LIN-SEL): LIN2: LIN3: LIN4: Analog Input LIN2 Input.<default> LIN3 Input. LIN4 Input. [JP13] (HPR) : Analog Output BNC: Output from J4. <default> HP: Output from J2. [JP14] (RIN-SEL): LIN2 : LIN3: LIN4: Analog Input RIN2 Input.<default> RIN3 Input. RIN4 Input [JP15] (LOUT-SEL) : Analog Output BNC: Output from J6. <default> Mini-Jack: Output from J2. [JP16] (ROUT-SEL) : Analog Output BNC: Output from J8<default> Mini-Jack: Output from J2. [JP22] (MKFS) : MCLK Frequency x1 : 256fs <default> x2 : 512fs x4 : 1024fs [JP23] (BCFS) : BICK Frequency 32fs : 32fs frequency 64fs : 64fs frequency <default> < KM094901> 2009/10 -6- ASAHI KASEI [AKD4645A-A] [JP31] (MODE_SEL) : Serial Control Interface 3-WIRE : 3-WIRE Serial Control Mode <default> I2C : I2C-bus Control Mode [JP34] (DAUX_SEL): Presence of external device connection via PORT3(DSP) SHORT : connection OPEN : non-connection <default> The function of the toggle SW [SW1] (PDN): Power down of AK4645A. Keep “H” during normal operation. [SW2] (DIR): Power down of AK4114. Keep “H” during normal operation. Keep “L” when AK4114 is not used. Indication for LED [LED1] (ERF): Monitor INT0 pin of the AK4114. LED turns on when some error has occurred to AK4114. < KM094901> 2009/10 -7- ASAHI KASEI [AKD4645A-A] Serial Control The AK4645A can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT4 (CTRL) with PC by 10 wire flat cable packed with the AKD4645A.Table 4 shows switch and jumper settings for serial control. Connect PC 10 wire flat cable 10pin Connector CSN CCLK CDTI AKD4645A 10pin Header Figure 3. Connect of 10 wire flat cable S1 I2C CAD0 3-WIRE OFF OFF CAD0=0 ON OFF I2C CAD0=1 ON ON Table 4. Serial Control Setting Mode < KM094901> 2009/10 -8- ASAHI KASEI [AKD4645A-A] Analog Input/Output Circuits (1) Input Circuits (1-1) LIN1/RIN1, LIN2/RIN2, LIN3/RIN3, LIN4/RIN4 Input Circuit MPWR J9 LIN1/RIN1 R4 2.2k R3 2.2k JP4 RIN1 JP5 LIN1 6 RIN1 4 3 LIN1 LIN3 C25 1u R14 short JP12 LIN3 LIN2 LIN4 1 1 TP31 LIN + 2 3 4 5 J3 LIN LIN2 LIN_SEL LIN4 RIN3 1 TP32 RIN C27 1u R17 short JP14 RIN3 RIN2 RIN4 1 J5 RIN + 2 3 4 5 RIN2 RIN_SEL RIN4 Figure 4. LIN1/RIN1, LIN2/RIN2, LIN3/RIN3, LIN4/RIN4 Input Circuit LIN2/RIN2, LIN3/RIN3, LIN4/RIN4 shares J3/J5. JP12(LIN_SEL) and JP14(RIN_SEL) select each path. When LIN3/RIN3 paths of AK4645A are used, JP2 and JP9 should be set as below. AIN3bit =“1” (Register Address 21H) M IN VCOC R IN 3 LIN 3 JP 2 JP 9 When microphone is connected to J9, JP4 and JP5 should be short. < KM094901> 2009/10 -9- ASAHI KASEI (1-2) [AKD4645A-A] MIN Input Curcuits C29 1u 1 R21 20k + 2 3 4 5 J7 MIN MIN Figure 5 . MIN Input Circuit When MIN Input path of AK4645A is used, JP2 should be set as below. AIN3bit =“0” (Register Address 21H) MIN LIN3 JP2 < KM094901> 2009/10 - 10 - ASAHI KASEI [AKD4645A-A] (2) Output Circuits (2-1) HP Output Circuit 1 + BNC R12 C24 47u 6.8 JP11 HPL R13 16 2 3 4 5 HP HPL J1 HPL 6 J2 HP/LINE R15 C26 47u 6.8 HP + 4 3 JP13 HPR HPR 1 BNC R16 16 J4 HPR 2 3 4 5 Figure 6 . HP Output Circuit (2-1-1) In case that signal is output from J1 and J4. JP13 HPR JP11 HPL BNC HP BNC HP (2-1-2) In case that signal is output from J2. JP13 HPR JP11 HPL BNC HP BNC < KM094901> HP 2009/10 - 11 - ASAHI KASEI (2-2) [AKD4645A-A] LOUT/ROUT(LOP/LON) Output Circuit 6 J2 HP/LINE 4 3 R18 open Mini-Jack C28 1u JP15 LOUT_SEL R19 220 + BNC LOUT 1 R20 20k Mini-Jack J6 LOUT 2 3 4 5 JP16 ROUT_SEL C30 1u R22 220 + BNC ROUT R23 20k 1 J8 ROUT 2 3 4 5 Figure 7 . LOUT/ROUT(LOP/LON) Output Circuit (2-1-1) In case that signal is output from J6 and J8. JP16 JP15 LOUT_SEL BNC ROUT_SEL Mini-Jack BNC Mini-Jack (2-1-1) In case that signal is output from J2. JP15 LOUT_SEL BNC JP16 ROUT_SEL Mini-Jack BNC Mini-Jack ∗ AKM assumes no responsibility for the trouble when using the above circuit examples. < KM094901> 2009/10 - 12 - ASAHI KASEI [AKD4645A-A] Control Software Manual Set-up of evaluation board and control software 1. Set up the AKD4645A-A according to previous term. 2. Connect IBM-AT compatible PC with AKD4645A-A by 10-line type flat cable (packed with AKD4645A-A). Take care of the direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on Windows 2000/XP. Please refer “Installation Manual of Control Software Driver by AKM device control software”. In case of Windows95/98/ME, this installation is not needed. This control software does not operate on Windows NT.) 3. Insert the CD-ROM labeled “AK4645A-A Evaluation Kit” into the CD-ROM drive. 4. Access the CD-ROM drive and double-click the icon of “AKD4645A.exe” to set up the control program. 5. Then please evaluate according to the follows. Operation flow Keep the following flow. 1. Set up the control program according to explanation above. 2. Click “Port Reset” button. Explanation of each buttons [Port Reset] [Write default] : [All Write] : [Function1] : [Function2] : [Function3] : [Function4] : [Function5]: [SAVE] : [OPEN] : [Write] : [Filter] : Set up the USB interface board (AKDUSBIF-A) . Initialize the register of AK4645A. Write all registers that is currently displayed. Dialog to write data by keyboard operation. Dialog to write data by keyboard operation. The sequence of register setting can be set and executed. The sequence that is created on [Function3] can be assigned to buttons and executed. The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. Save the current register setting. Write the saved values to all register. Dialog to write data by mouse operation. Set Programmable Filter (FIL1, FIL3, EQ) of AK4645A easily. Indication of data Input data is indicated on the register map. Red letter indicates “H” or “1” and blue one indicates “L” or “0”. Blank is the part that is not defined in the datasheet. < KM094901> 2009/10 - 13 - ASAHI KASEI [AKD4645A-A] Explanation of each dialog 1. [Write Dialog]: Dialog to write data by mouse operation There are dialogs corresponding to each register. Click the [Write] button corresponding to each register to set up the dialog. If you check the check box, data becomes “H” or “1”. If not, “L” or “0”. If you want to write the input data to AK4645A, click [OK] button. If not, click [Cancel] button. 2. [Function1 Dialog] : Dialog to write data by keyboard operation Address Box: Data Box: Input registers address in 2 figures of hexadecimal. Input registers data in 2 figures of hexadecimal. If you want to write the input data to AK4645A, click [OK] button. If not, click [Cancel] button. 3. [Function2 Dialog] : Dialog to evaluate IVOL and DVOL Address Box: Input registers address in 2 figures of hexadecimal. Start Data Box: Input starts data in 2 figures of hexadecimal. End Data Box: Input end data in 2 figures of hexadecimal. Interval Box: Data is written to AK4645A by this interval. Step Box: Data changes by this step. Mode Select Box: If you check this check box, data reaches end data, and returns to start data. [Example] Start Data = 00, End Data = 09 Data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00 If you do not check this check box, data reaches end data, but does not return to start data. [Example] Start Data = 00, End Data = 09 Data flow: 00 01 02 03 04 05 06 07 08 09 If you want to write the input data to AK4645A, click [OK] button. If not, click [Cancel] button. < KM094901> 2009/10 - 14 - ASAHI KASEI [AKD4645A-A] 4. [Save] and [Open] 4-1. [Save] Save the current register setting data. The extension of file name is “akr”. (Operation flow) (1) Click [Save] Button. (2) Set the file name and push [Save] Button. The extension of file name is “akr”. 4-2. [Open] The register setting data saved by [Save] is written to AK4645A. The file type is the same as [Save]. (Operation flow) (1) Click [Open] Button. (2) Select the file (*.akr) and Click [Open] Button. < KM094901> 2009/10 - 15 - ASAHI KASEI [AKD4645A-A] 5. [Function3 Dialog] The sequence of register setting can be set and executed. (1) Click [F3] Button. (2) Set the control sequence. Set the address, Data and Interval time. Set “-1” to the address of the step where the sequence should be paused. (3) Click [Start] button. Then this sequence is executed. The sequence is paused at the step of Interval="-1". Click [START] button, the sequence restarts from the paused step. This sequence can be saved and opened by [Save] and [Open] button on the Function3 window. The extension of file name is “aks”. Figure 8. Window of [F3] < KM094901> 2009/10 - 16 - ASAHI KASEI [AKD4645A-A] 6. [Function4 Dialog] The sequence that is created on [Function3] can be assigned to buttons and executed. When [F4] button is clicked, the window as shown in Figure 9 opens. Figure 9. [F4] window < KM094901> 2009/10 - 17 - ASAHI KASEI [AKD4645A-A] 6-1. [OPEN] buttons on left side and [START] buttons (1) Click [OPEN] button and select the sequence file (*.aks). The sequence file name is displayed as shown in Figure 10. Figure 10. [F4] window(2) (2) Click [START] button, then the sequence is executed. 3-2. [SAVE] and [OPEN] buttons on right side [SAVE] : The sequence file names can assign be saved. The file name is *.ak4. [OPEN] : The sequence file names assign that are saved in *.ak4 are loaded. 3-3. Note (1) This function doesn't support the pause function of sequence function. (2) All files need to be in same folder used by [SAVE] and [OPEN] function on right side. (3) When the sequence is changed in [Function3], the file should be loaded again in order to reflect the change. < KM094901> 2009/10 - 18 - ASAHI KASEI [AKD4645A-A] 7. [Function5 Dialog] The register setting that is created by [SAVE] function on main window can be assigned to buttons and executed. When [F5] button is clicked, the following window as shown in Figure 11 opens. Figure 11. [F5] window 7-1. [OPEN] buttons on left side and [WRITE] button (1) Click [OPEN] button and select the register setting file (*.akr). The register setting file name is displayed as shown in Figure 12. (2) Click [WRITE] button, then the register setting is executed. < KM094901> 2009/10 - 19 - ASAHI KASEI [AKD4645A-A] Figure 12. [F5] windows(2) 7-2. [SAVE] and [OPEN] buttons on right side [SAVE] : The register setting file names assign can be saved. The file name is *.ak5. [OPEN] : The register setting file names assign that are saved in *.ak5 are loaded. 7-3. Note (1) All files need to be in same folder used by [SAVE] and [OPEN] function on right side. (2) When the register setting is changed by [Save] Button in main window, the file should be loaded again in order to reflect the change. < KM094901> 2009/10 - 20 - ASAHI KASEI [AKD4645A-A] 8. [Filter Dialog] This dialog can easily set the AK4645A’s programmable filter. Figure 13 . [Filter] window 8-1. Value input columns on left side [Sampling Rate] [Cut Off Frequency of FIL1] [Cut Off Frequency of FIL3] [Pole Frequency of EQ] [Zero Frequency of EQ] [FIL3 GAIN] [EQ GAIN] Æ Input value of sampling frequency [unit : Hz] <default : 44100> Æ Input value of cut off frequency of FIL1 [unit : Hz] <default : 150> Æ Input value of cut off frequency of FIL3 [unit : Hz] <default : 4000> Æ Input value of pole frequency of EQ [unit : Hz] Æ Input value of zero frequency of EQ [unit : Hz] Æ Input value of gain of FIL3 (0~−10dB) [unit : dB] Æ Input value of gain of EQ (+12~0dB) [unit : dB] 8-2. Check box on left side Check Box FIL1 FIL3 EQ LPF of FIL1 LPF of FIL3 Check FIL1 bit =“1” FIL3 bit =“1” EQ bit =“1” F1AS bit =“1”(LPF) F3AS bit =“1”(LPF) Check off FIL1 bit =“0” FIL3 bit =“0” EQ bit =“0” F1AS bit =“0”(HPF) F3AS bit =“0”(HPF) 8-2. [Register Setting] panel and [Register Setting] button on right side Click [Register setting] button, then filter coefficient set by 8-1 and 8-2 is written on [Register setting] panel. (It is also written to the actual control register of the AK4645A.) < KM094901> 2009/10 - 21 - ASAHI KASEI [AKD4645A-A] MEASUREMENT RESULTS 1. EXT mode (slave mode) [Measurement condition] ● Measurement unit: Audio Precision, System two Cascade ● EXT Slave Mode ● MCLK: 256fs ● BICK: 64fs ● Bit: 16bit ● Measurement Frequency: 20Hz ∼ 20kHz ● Power Supply: AVDD=DVDD=HVDD=TVDD=3.3V ● Temperature: Room ● Input Frequency: 1kHz ● Sampling Frequency: 44.1kHz [Measurement Results] ADC (LIN2/RIN2) characteristics (IVOL=0dB, ALC1 = OFF, LIN2/RIN2 Æ ADC Æ IVOL) L[dB] R[dB] MIC-Amp Gain 0dB +20dB 0dB +20dB S/(N+D) 20kHzLPF (−1dB) DR 20kHzLPF + A-weighted S/N 20kHzLPF + A-weighted 90.1 95.6 95.9 84.1 87.4 87.4 89.7 95.7 95.9 83.7 87.4 87.4 DAC (LOUT/ROUT) characteristics (RL=20kΩ, DAC Æ LOUT/ROUT) L[dB] R[dB] S/(N+D) 20kHzLPF (−3dB) 88.7 88.9 S/N 20kHzLPF + A-weighted 94.3 94.1 DAC (HPL/ HPR) characteristics (RL=22.8Ω, DAC Æ HPL/ HPR) L[dB] R[dB] S/(N+D) 20kHzLPF (−3dB) 66.8 67.3 S/N 20kHzLPF + A-weighted 91.3 91.4 < KM094901> 2009/10 - 22 - ASAHI KASEI [AKD4645A-A] 2. PLOT DATA 2-1 ADC (LIN2/RIN2 Æ ADC) (0dB) AK4645A LIN2->ADC FFT fs=44.1kHz,fin=1kHz,-1dB input +0 -10 -20 -30 -40 -50 -60 d B F S -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k 5k 10k 20k 5k 10k 20k Hz Figure 14. FFT Plot (Input level= 0dBFs) AK4645A LIN2->ADC FFT fs=44.1kHz,fin=1kHz,-60dB input +0 -10 -20 -30 -40 -50 -60 d B F S -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k Hz Figure 15. FFT Plot (Input level= -60dBFs) < KM094901> 2009/10 - 23 - ASAHI KASEI [AKD4645A-A] AK4645A LIN2->ADC FFT fs=44.1kHz,fin=1kHz,No Signal +0 -10 -20 -30 -40 -50 -60 d B F S -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 16. FFT Plot (No signal) AK4645A LIN2->ADC THD+N vs. Input Level fs=44.1kHz,fin=1kHz -70 -72 -74 -76 -78 -80 -82 d B F S -84 -86 -88 -90 -92 -94 -96 -98 -100 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dBr Figure 17. THD+N vs. Input Level < KM094901> 2009/10 - 24 - ASAHI KASEI [AKD4645A-A] AK4645A LIN2->ADC THD+N vs. Input Frequency fs=44.1kHz -70 -72 -74 -76 -78 -80 -82 d B F S -84 -86 -88 -90 -92 -94 -96 -98 -100 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 18. THD+N vs. Input Frequency AK4645A LIN2->ADC Linearity fs=44.1kHz,fin=1kHz +0 T -10 -20 -30 -40 d B F S -50 -60 -70 -80 -90 -100 -110 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 dBr Figure 19. Linearity < KM094901> 2009/10 - 25 - ASAHI KASEI [AKD4645A-A] AK4645A LIN2->ADC Frequency Response fs=44.1kHz,-1dB Input +0 -0.2 -0.4 -0.6 -0.8 -1 -1.2 d B F S -1.4 -1.6 -1.8 -2 -2.2 -2.4 -2.6 -2.8 -3 20 50 100 200 500 1k 2k 5k 10k 20k 2k 5k 10k 20k Hz Figure 20. Frequency Response AK4645A LIN2->ADC Crosstalk fs=44.1kHz,-1dB Input -70 T T -75 -80 -85 -90 -95 -100 d B -105 -110 -115 -120 -125 -130 -135 -140 20 50 100 200 500 1k Hz Figure 21. Crosstalk Plot < KM094901> 2009/10 - 26 - ASAHI KASEI [AKD4645A-A] 2-2 ADC (LIN2/RIN2 Æ ADC) (+20dB) AK4645A LIN2->ADC(MIC=+20dB) FFT fs=44.1kHz,fin=1kHz,-1dB Input +0 -10 -20 -30 -40 -50 -60 d B F S -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k 5k 10k 20k 5k 10k 20k Hz Figure 22. FFT Plot (Input level= 0dBFs) AK4645A LIN2->ADC(MIC=+20dB) FFT fs=44.1kHz,fin=1kHz,-60dB Input +0 -10 -20 -30 -40 -50 -60 d B F S -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k Hz Figure 23. FFT Plot (Input level= -60dBFs) < KM094901> 2009/10 - 27 - ASAHI KASEI [AKD4645A-A] AK4645A LIN2->ADC(MIC=+20dB) FFT fs=44.1kHz,fin=1kHz,No Signal +0 -10 -20 -30 -40 -50 -60 d B F S -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 24. FFT Plot (No signal) AK4645A LIN2->ADC(MIC=+20dB) THD+N vs. Input Level fs=44.1kHz,fin=1kHz -70 -72 -74 -76 -78 -80 -82 d B F S -84 -86 -88 -90 -92 -94 -96 -98 -100 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dBr Figure 25. THD+N vs. Input Level < KM094901> 2009/10 - 28 - ASAHI KASEI [AKD4645A-A] AK4645A LIN2->ADC(MIC=+20dB) THD+N vs. Input Frequency fs=44.1kHz,-1dB Input -70 -72 -74 -76 -78 -80 -82 d B F S -84 -86 -88 -90 -92 -94 -96 -98 -100 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 26. THD+N vs. Input Frequency AK4645A LIN2->ADC(MIC=+20dB) Linearity fs=44.1kHz,fin=1kHz +0 T -10 -20 -30 -40 d B F S -50 -60 -70 -80 -90 -100 -110 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 dBr Figure 27. Linearity < KM094901> 2009/10 - 29 - ASAHI KASEI [AKD4645A-A] AK4645A LIN2->ADC(MIC=+20dB) Frequency Response fs=44.1kHz,-1dB Input +0 -0.2 -0.4 -0.6 -0.8 -1 -1.2 d B F S -1.4 -1.6 -1.8 -2 -2.2 -2.4 -2.6 -2.8 -3 20 50 100 200 500 1k 2k 5k 10k 20k 5k 10k 20k Hz Figure 28. Frequency Response AK4645A LIN2->ADC(MIC=+20dB) Crosstalk fs=44.1kHz,-1dB Input -70 TTTT T TTTTTTTTTTT TTTTT T TTT TTT TT T TTT T TT T -75 -80 -85 -90 -95 -100 d B -105 -110 -115 -120 -125 -130 -135 -140 20 50 100 200 500 1k 2k Hz Figure 29. Crosstalk Plot < KM094901> 2009/10 - 30 - ASAHI KASEI [AKD4645A-A] 2-3 DAC (DACÆ LOUT/ROUT) AK4645A DAC LOUT/ROUT FFT fs=44.1kHz,fin=1kHz,0dB Input +0 -10 -20 -30 -40 -50 -60 d B r -70 A -90 -80 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k 5k 10k 20k 5k 10k 20k Hz Figure 30. FFT Plot (Input level= 0dBFs) AK4645A DAC LOUT/ROUT FFT fs=44.1kHz,fin=1kHz,-60dB Input +0 -10 -20 -30 -40 -50 -60 d B r -70 A -90 -80 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k Hz Figure 31. FFT Plot (Input level= -60dBFs) < KM094901> 2009/10 - 31 - ASAHI KASEI [AKD4645A-A] AK4645A DAC LOUT/ROUT FFT fs=44.1kHz,fin=1kHz,No Signal +0 -10 -20 -30 -40 -50 -60 d B r -70 A -90 -80 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 32. FFT Plot (No signal) AK4645A DAC LOUT/ROUT THD+N vs. Input Level fs=44.1kHz,fin=1kHz -70 -72 -74 -76 -78 -80 -82 d B r -84 -86 A -88 -90 -92 -94 -96 -98 -100 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 dBFS Figure 33. THD+N vs. Input Level < KM094901> 2009/10 - 32 - ASAHI KASEI [AKD4645A-A] AK4645A DAC LOUT/ROUT THD+N vs. Input Frequency fs=44.1kHz,0dB Input -70 -72 -74 -76 -78 -80 -82 d B r -84 -86 A -88 -90 -92 -94 -96 -98 -100 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 34. THD+N vs. Input Frequency AK4645A DAC LOUT/ROUT Linearity fs=44.1kHz,fin=1kHz +0 -10 -20 -30 -40 d B r -50 -60 A -70 -80 -90 -100 -110 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 dBFS Figure 35. Linearity < KM094901> 2009/10 - 33 - ASAHI KASEI [AKD4645A-A] AK4645A DAC LOUT/ROUT Frequency Response fs=44.1kHz,0dB Input +1 +0.8 +0.6 +0.4 +0.2 d B r A +0 -0.2 -0.4 -0.6 -0.8 -1 20 50 100 200 500 1k 2k 5k 10k 20k 5k 10k 20k Hz Figure 36. Frequency Response AK4645A DAC LOUT/ROUT Crosstalk fs=44.1kHz,0dB Input -70 T -75 -80 -85 -90 -95 -100 d B -105 -110 -115 -120 -125 -130 -135 -140 20 50 100 200 500 1k 2k Hz Figure 37. Crosstalk Plot < KM094901> 2009/10 - 34 - ASAHI KASEI [AKD4645A-A] 2-4 DAC (DACÆ HPL/HPR) AK4645A DAC HPL/HPR FFT fs=44.1kHz,fin=1kHz,0dB Input +0 -10 -20 -30 -40 -50 -60 d B r -70 A -90 -80 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k 5k 10k 20k 5k 10k 20k Hz Figure 38. FFT Plot (Input level= 0dBFs) AK4645A DAC HPL/HPR FFT fs=44.1kHz,fin=1kHz,-60dB Input +0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k Hz Figure 39. FFT Plot (Input level= -60dBFs) < KM094901> 2009/10 - 35 - ASAHI KASEI [AKD4645A-A] AK4645A DAC HPL/HPR FFT fs=44.1kHz,fin=1kHz,No Signal +0 -10 -20 -30 -40 -50 -60 d B r -70 A -90 -80 -100 -110 -120 -130 -140 -150 -160 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 40. FFT Plot (No signal) AK4645A DAC HPL/HPR THD+N vs. Input Level fs=44.1kHz,fin=1kHz -60 -62.5 -65 -67.5 -70 -72.5 -75 d B r -77.5 A -82.5 -80 -85 -87.5 -90 -92.5 -95 -97.5 -100 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 dBFS Figure 41. THD+N vs. Input Level < KM094901> 2009/10 - 36 - ASAHI KASEI [AKD4645A-A] AK4645A DAC HPL/HPR THD+N vs. Input Frequency fs=44.1kHz,0dB Input +0 -10 -20 -30 -40 d B r A -50 -60 -70 -80 -90 -100 20 50 100 200 500 1k 2k 5k 10k 20k Hz Figure 42. THD+N vs. Input Frequency AK4645A DAC HPL/HPR Linearity fs=44.1kHz,fin=1kHz +0 -10 -20 -30 -40 d B r -50 -60 A -70 -80 -90 -100 -110 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 dBFS Figure 43. Linearity < KM094901> 2009/10 - 37 - ASAHI KASEI [AKD4645A-A] AK4645A DAC HPL/HPR Frequency Response fs=44.1kHz,0dB Input -0 -2 -4 -6 d B r -8 A -10 -12 -14 -16 -18 20 50 100 200 500 1k 2k 5k 10k 20k 5k 10k 20k Hz *Cut-off frequency of HPF on board: 148.5Hz Figure 44. Frequency Response AK4645A DAC HPL/HPR Crosstalk fs=44.1kHz,0dB Input -60 -62.5 -65 -67.5 -70 -72.5 -75 -77.5 d B -80 -82.5 -85 -87.5 -90 -92.5 -95 -97.5 -100 20 50 100 200 500 1k 2k Hz Figure 45. Crosstalk Plot < KM094901> 2009/10 - 38 - ASAHI KASEI [AKD4645A-A] Revision History Date (YY/MM/DD) 08/05/29 09/10/15 Manual Revision KM094900 KM094901 Board Revision 0 1 Reason Contents First edition Change A block diagram was modified. Circuit diagram were changed. R5,C13,TP20:Open. Measurement results and Plots were updated. Default Jumper settings were changed. IMPORTANT NOTICE z These products and their specifications are subject to change without notice. When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei Microdevices Corporation (AKM) or authorized distributors as to current status of the products. z AKM assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of any information contained herein. z Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. z AKM products are neither intended nor authorized for use as critical componentsNote1) in any safety, life support, or other hazard related device or systemNote2), and AKM assumes no responsibility for such use, except for the use approved with the express written consent by Representative Director of AKM. As used here: Note1) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. z It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification. < KM094901> 2009/10 - 39 - A B C E D E E TP1 RIN3 1 TP2 LIN3 1 TP3 RIN1 1 TP4 LIN1 1 TP5 LIN2 1 TP6 RIN2 1 37 38 39 40 41 42 43 44 45 46 47 48 CN1 TP7 TP9 TP10 MIN TP8 ROUT/LON LIN4 1 1 1 1 LOUT / LOP MIN JP2 LIN3 CN2 25 RIN4/IN4- 24 1 ROUT/LON LIN4/IN4+ 26 27 29 28 LOUT/LOP 36 TP13 RIN4 AVSS HPL 22 C12 0.1u 1 AVDD HPR AK4645AEZ JP9 5 VCOC RIN3 6 I2C 7 PDN 8 CSN/CAD0 21 1 1 RIN3 32 C TP19 HVDD HVDD 20 C14 0.1u HVSS 19 TESTO 18 MCKI 17 10u +C15 1 + TP20 open 33 TP18 HPR 4 R5 open C13 open 34 TP16 HPL 31 TP21 HVSS 1 C11 10u 7 9 23 1 1 3 8 MUTET + C9 0.1u C7 2.2u TP17 AVDD VCOM + 1 2 TP15 AVSS 30 1 TP22 PDN TP23 CSN 29 28 TP24 TESTO 1 TVDD DVDD BICK LRCK 51 SDTO 11 SDTI 1 R6 CDTI/SDA 10 CCLK/SCL 6 35 TP11 C8 MUTET 1u 1 TP14 VCOM 5 C MPWR MIN/LIN3 1 4 D CN3 RIN2/IN2- U1 31 R3 2.2k 32 R4 2.2k 1 JP5 LIN1 LIN1/IN1- TP12 MPWR 3 JP4 RIN1 RIN1/IN1+ 2 R2 open C5 1u 30 C4 1u LIN2/IN2+ 1 D 1 B R9 51 R10 51 C22 10u 24 23 22 18 1 21 17 C20 10u TP29 TP30 LRCK BICK 1 20 1 19 1 16 15 14 13 TP26 TP27 TP28 CCLK CDTI SDTI 1 R11 51 B 26 25 C21 0.1u + R8 51 C18 0.1u + R7 51 27 TP25 MCKI 16 15 14 13 12 11 10 9 12 CN4 A A Title Size A3 Date: A B C D AKD4645AEZ_SUB_32QFN Document Number Rev 0 AK4645AEZ Monday, August 31, 2009 Sheet E 1 of 1 D E 1 1 C4 1u VD_IN DGND AGND T45_BK T45_BK 37 38 39 HPR 5 AK4645A VCOC/RIN3 1 21 1 AVDD JP9 VCOC HVDD 20 C14 0.1u 6 I2C HVSS 19 7 PDN MCKO 18 8 CSN/CAD0 MCKI 17 10u +C15 1 1 JP7 REG HVDD C L3 2 31 1 (short) 30 29 SPP 28 SPN 27 4645_MCKO 26 EXT_MCLK TP24 MCKO + C16 47u 16 15 14 .13 12 TP25 MCKI 1 R7 51 LVC (short) 11 10 9 JP10 TVDD LVC_SEL R8 51 R9 51 R10 51 R11 51 C18 B 25 0.1u VD 10u + 2 47u + HPR TP27 TP26 CDTI TP28 CCLK1 SDTI 1 TP29 LRCK TP30 BICK 1 1 C20 C21 0.1u 1 C22 10u + C19 32 TP21 HVSS 1 51 B 2 HPL TP19 HVDD 12 L5 33 R6 1 11 1 REG_OUT 1 1 22 TVDD TP23 CSN (short) LVC_IN 1 25 1 ROUT/LON LIN4/IN4+ 26 27 MIN/LIN3 LOUT/LOP 28 29 30 HPL DVDD 10 2 AVSS BICK 4645_TVDD 34 TP16 HPL 2 RIN3 1 2 RIN4 TP22 PDN L4 1 35 1 TP20 VCOC 1 R5 open 9 HVDD TP18 HPR 4 C13 4.7n 23 C12 0.1u LRCK 8 MUTET SDTO 4645_PDN 24 1 C11 10u 1 7 RIN4/IN4- VCOM SDTI 2 1 3 TP17 AVDD + 4645_I2C 4645_CSN/CAD0 TVDD 1 LVC_IN 36 + C9 0.1u C7 2.2u JP8 + T45_OR TP13 RIN4 + TP15 AVSS 6 TVDD_SEL 47u HVDD T45_OR TP11 C8 MUTET 1u 2 5 4645_DVDD (short) MPWR CCLK/SCL 2 C C17 VD_IN T45_OR E D TP14 VCOM 1 L2 1 4 DVDD_SEL 1 47u LVC_IN TVDD CN3 RIN2/IN2- 1 + DVDD R2 open LIN2/IN2+ 1 R3 2.2k 31 U1 LIN1/IN1- TP12 R4 MPWR 2.2k 3 JP6 DVDD C10 LOUT / LOP C5 1u CDTI/SDA R1 10 JP5 LIN1 32 JP4 RIN1 2 2 47u AVDD 2 (short) RIN1/IN1+ 1 1 + REG 1 1 L1 C6 T45_OR 1 JP2 LIN3 CN2 AVDD D 40 1 MIN JP3 AVDD_SEL 41 TP7 TP9 MIN ROUT/LON TP10 TP6 RIN2 1 LIN4 TP8 1 1 TVDD T45_OR 1 TP5 LIN2 TP4 LIN1 1 42 43 44 45 TP3 RIN1 TP2 LIN3 1 DVDD T45_OR 1 TP1 RIN3 46 47 48 CN1 1 AVDD T45_RED 1 E OPEN REG LIN4 ROUT LOUT MIN RIN2 LIN2 LIN1 C2 0.1u RIN1 1 C1 0.1u JP1 GND C3 + 47u LIN3 REG_OUT OUT 2 IN RIN3 GND T1 TA48033F REG 1 C 1 B 1 A 24 23 22 21 20 19 18 17 16 CN4 4645_TVDD 4645_DVDD 4645_BICK 4645_LRCK 4645_SDTO A 4645_SDTI 47u VD 2 A 2 (short) 4645_CDTI/SDA + 4645_CCLK/SCL 1 C23 15 L6 1 14 13 VD_IN Title Size A3 Date: A B C D AKD4645A-A Document Number Rev AK4645A Monday, August 31, 2009 Sheet E 0 1 of 5 A B C D E J1 HPL + BNC R12 C24 47u 6.8 JP11 HPL R13 16 J2 HP/LINE 4 3 JP12 LIN3 LIN2 LIN4 LIN2 LIN4 + LIN_SEL R15 C26 47u 6.8 HP R14 short 1 1 C25 1u + 2 3 4 5 TP31 LIN E 6 LIN3 J3 LIN 2 3 4 5 HP HPL E 1 JP13 HPR HPR J4 HPR 1 2 3 4 5 BNC R16 16 D D RIN3 TP32 RIN 1 C27 1u R17 short 1 J5 RIN + 2 3 4 5 R18 open JP14 RIN3 RIN2 RIN4 RIN2 RIN_SEL RIN4 Mini-Jack JP15 LOUT_SEL R19 220 BNC + C28 1u J6 LOUT 1 LOUT J7 MIN C 1 + 2 3 4 5 C29 1u R21 20k 2 3 4 5 R20 20k Mini-Jack JP16 ROUT_SEL C30 1u R22 220 + BNC J8 ROUT 1 ROUT 2 3 4 5 R23 20k B J9 LIN1/RIN1 C MIN RIN1 B 6 LIN1 (open) C31 + JP17 SPP 2 SPP 2 3 3 1 (short) R27 short C32 + R26 (open) J10 SPK R24 R25 short 1 4 3 SPN JP18 SPN A (short) R28 (open) A Title Size A3 Date: A B C D AKD4645A-A Document Number Rev Input/Output Friday, August 28, 2009 Sheet E 0 2 of 5 A B C D E E E THR JP19 PHASE EXT_BICK INV EXT_MCLK THR D U2 4114_MCLK_OUT JP24 MCLK DIR EXT 1 2 3 4 5 6 x1 x2 x4 MCKO 13 12 11 10 9 8 1CLR 2CLR 1D 2D 1CK 2CK 1PR 2PR 1Q 2Q 1Q 2Q JP22 MKFS U3 10 CLK 11 RST J11 EXT 2 3 4 5 1 14 7 VD R29 51 C33 0.1u MCKO Vcc GND 16 8 VD C53 0.1u 74AC74 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 VD Q11 DGND Q12 JP23 BCFS 9 7 6 5 3 2 4 13 12 14 15 1 JP20 PHASE DIR 4114_BICK_OUT JP21 BICK 64fs 32fs D INV 4040 U4 X_LRCK 1 2 3 4 5 6 74HC4040 JP25 EXT BICK 14 7 VD VD C34 0.1u C 1A 1Y 2A 2Y 3A 3Y 4Y 4A 5Y 5A 6Y 6A 8 9 10 11 12 13 4114_PDN Vcc GND 74HC14 C 1 2 VD D1 HSU119 R30 10k 2 PDN 1 D2 HSU119 C35 0.1u H 1 L 3 2 SW1 PDN 1 R31 10k H 3 L C36 0.1u SW2 DIR B 2 B A A Title Size A3 Date: A B C D AKD4645A-A Document Number Rev CLOCK Friday, August 28, 2009 Sheet E 0 3 of 5 A B C D E C37 0.1u L7 short E 2 E C38 0.1u 1 VD PORT1 C39 0.1u C40 10u R32 470 C41 0.1u 1 R 37 INT1 40 39 R33 18k VCOM 41 AVSS 42 RX0 43 NC 44 RX1 46 45 TEST1 NC RX2 12 11 10 9 8 7 47 U5 S1 1 2 3 4 5 6 RX3 DIF0 DIF1 DIF2 OCKS1 CAD0 I2C 48 C42 0.47u D VD + TORX141 38 3 2 1 AVDD VCC GND OUT IPS0 D R34 1k INT0 LED1 ERF 2 36 1 VD U6 SW DIP-6 2 NC OCKS0 35 3 DIF0 OCKS1 34 OCKS1 4 TEST2 CM1 33 VD 1 2 3 4 5 6 RP1 OCKS1 CAD0 I2C 47k 5 DIF1 CM0 32 6 NC PDN 31 7 DIF2 XTI 30 8 IPS1 XTO 29 9 P/SN DAUX 28 10 XTL0 MCKO2 27 11 XTL1 BICK 26 SDTO 25 AK4114 C 14 7 VD JP26 4114_MCKI_IN MCKO C43 0.1u C44 5p C48 10u C49 10u VD 2 C45 5p DAUX OUT VD A IN VCC GND 1 4114_BICK_OUT JP27 4114BICK_SEL B IN LRCK 4114_BICK_IN 24 MCKO1 4114_SDTI OUT 4114_LRCK_IN PORT2 3 2 23 22 DVSS DVDD + 21 VOUT 20 UOUT 19 COUT 18 BOUT 17 TX1 16 TX0 15 14 + 13 DVSS TVDD VIN C47 0.1u Vcc GND 74HC04 C B C46 0.1u 8 9 10 11 12 13 4114_PDN X1 11.2896MHz 12 4Y 4A 5Y 5A 6Y 6A 1 7 6 5 4 3 2 1 1A 1Y 2A 2Y 3A 3Y 4114_LRCK_OUT JP28 4114LRCK_SEL IN 4114_MCLK_OUT VD C50 0.1u A TOTX141 Title Size A3 Date: A B C D AKD4645A-A Document Number Rev DIR/DIT Monday, August 31, 2009 Sheet E 0 4 of 5 A B C D E U7 11 Y8 A8 9 12 Y7 A7 8 13 Y6 A6 7 BICK E E 4645_SDTI DIR JP29 LRCK 4114_LRCK_OUT 4645_I2C 14 4645_CCLK/SCL 15 4645_CSN/CAD0 16 4645_PDN 17 Y5 A5 6 Y4 A4 5 Y3 A3 4 Y2 A2 3 I2C X_LRCK 4040 EXT_MCLK MCLK BICK LRCK SDTI VCC EXT_BICK Y1 A1 2 10 GND G2 19 20 VCC G1 1 10 9 8 7 6 DSP PDN D 18 PORT3 1 2 3 4 5 D R35 VD 10k C51 0.1u 4040 DAUX JP30 SDTI IN OUT JP34 DAUX_SEL 74LVC541 JP33 LRCK_SEL 4114_SDTI DIR LVC 4645_LRCK 3-WIRE C IN OUT 4645_BICK JP32 BICK_SEL C MODE_SEL VD JP31 R36 R38 R40 10k 10k 10k R37 R39 R41 CAD0 470 470 470 I2C PORT4 6 7 8 9 10 5 4 3 2 1 CSN CCLK/SCI CDTI/SDA CDTO/SDA(ACK) CTRL RP2 1 2 3 4 5 B VD R44 1k B R42 1k 330 U8 2 4 6 8 10 12 DAUX 1Y 2Y 3Y 4Y 5Y 6Y 1A 2A 3A 4A 5A 6A 1 3 5 9 11 13 Vcc GND 14 7 4645_SDTO 4645_MCKO MCKO JP35 4114_LRCK_IN LRCK_MODE 74LVC07 LVC C52 0.1u R43 1.8k JP36 A 4114_BICK_IN A BICK_MODE Title 4645_CDTI/SDA Size A3 Date: A B C D AKD4645A-A Document Number Rev LOGIC Friday, August 28, 2009 0 Sheet E 5 of 5